lantiq: add 3.18 support
[openwrt/svn-archive/archive.git] / target / linux / lantiq / dts / vr9.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "lantiq,xway", "lantiq,vr9";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips34Kc";
9 };
10 };
11
12 memory@0 {
13 device_type = "memory";
14 };
15
16 biu@1F800000 {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 compatible = "lantiq,biu", "simple-bus";
20 reg = <0x1F800000 0x800000>;
21 ranges = <0x0 0x1F800000 0x7FFFFF>;
22
23 icu0: icu@80200 {
24 #interrupt-cells = <1>;
25 interrupt-controller;
26 compatible = "lantiq,icu";
27 reg = <0x80200 0x28
28 0x80228 0x28
29 0x80250 0x28
30 0x80278 0x28
31 0x802a0 0x28>;
32 };
33
34 watchdog@803F0 {
35 compatible = "lantiq,wdt";
36 reg = <0x803F0 0x10>;
37 };
38 };
39
40 sram@1F000000 {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 compatible = "lantiq,sram", "simple-bus";
44 reg = <0x1F000000 0x800000>;
45 ranges = <0x0 0x1F000000 0x7FFFFF>;
46
47 eiu0: eiu@101000 {
48 #interrupt-cells = <1>;
49 interrupt-controller;
50 compatible = "lantiq,eiu-xway";
51 reg = <0x101000 0x1000>;
52 interrupt-parent = <&icu0>;
53 interrupts = <166 135 66 40 41 42>;
54 };
55
56 pmu0: pmu@102000 {
57 compatible = "lantiq,pmu-xway";
58 reg = <0x102000 0x1000>;
59 };
60
61 cgu0: cgu@103000 {
62 compatible = "lantiq,cgu-xway";
63 reg = <0x103000 0x1000>;
64 };
65
66 dcdc@106a00 {
67 compatible = "lantiq,dcdc-xrx200";
68 reg = <0x106a00 0x200>;
69 };
70
71 rcu0: rcu@203000 {
72 compatible = "lantiq,rcu-xrx200";
73 reg = <0x203000 0x1000>;
74 /* irq for thermal sensor */
75 interrupt-parent = <&icu0>;
76 interrupts = <115>;
77 };
78 };
79
80 fpi@10000000 {
81 #address-cells = <1>;
82 #size-cells = <1>;
83 compatible = "lantiq,fpi", "simple-bus";
84 ranges = <0x0 0x10000000 0xEEFFFFF>;
85 reg = <0x10000000 0xEF00000>;
86
87 localbus@0 {
88 #address-cells = <2>;
89 #size-cells = <1>;
90 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
91 1 0 0x4000000 0x4000010>; /* addsel1 */
92 compatible = "lantiq,localbus", "simple-bus";
93 };
94
95 gptu@E100A00 {
96 compatible = "lantiq,gptu-xway";
97 reg = <0xE100A00 0x100>;
98 interrupt-parent = <&icu0>;
99 interrupts = <126 127 128 129 130 131>;
100 };
101
102 asc0: serial@E100400 {
103 compatible = "lantiq,asc";
104 reg = <0xE100400 0x400>;
105 interrupt-parent = <&icu0>;
106 interrupts = <104 105 106>;
107 status = "disabled";
108 };
109
110 gpio: pinmux@E100B10 {
111 compatible = "lantiq,pinctrl-xr9";
112 #gpio-cells = <2>;
113 gpio-controller;
114 reg = <0xE100B10 0xA0>;
115 };
116
117 asc1: serial@E100C00 {
118 compatible = "lantiq,asc";
119 reg = <0xE100C00 0x400>;
120 interrupt-parent = <&icu0>;
121 interrupts = <112 113 114>;
122 };
123
124 deu@E103100 {
125 compatible = "lantiq,deu-xrx200";
126 reg = <0xE103100 0xf00>;
127 };
128
129 dma0: dma@E104100 {
130 compatible = "lantiq,dma-xway";
131 reg = <0xE104100 0x800>;
132 };
133
134 ebu0: ebu@E105300 {
135 compatible = "lantiq,ebu-xway";
136 reg = <0xE105300 0x100>;
137 };
138
139 ifxhcd@E101000 {
140 status = "disabled";
141 compatible = "lantiq,ifxhcd-xrx200";
142 reg = <0xE101000 0x1000
143 0xE120000 0x3f000>;
144 interrupt-parent = <&icu0>;
145 interrupts = <62 91>;
146 };
147
148 mei@E116000 {
149 compatible = "lantiq,mei-xrx200";
150 interrupt-parent = <&icu0>;
151 interrupts = <63>;
152 };
153
154 ppe@E234000 {
155 compatible = "lantiq,ppe-xrx200";
156 interrupt-parent = <&icu0>;
157 interrupts = <96>;
158 };
159
160 pcie@d900000 {
161 interrupt-parent = <&icu0>;
162 interrupts = <161 144>;
163 compatible = "lantiq,pcie-xrx200";
164 };
165
166 pci0: pci@E105400 {
167 #address-cells = <3>;
168 #size-cells = <2>;
169 #interrupt-cells = <1>;
170 compatible = "lantiq,pci-xway";
171 bus-range = <0x0 0x0>;
172 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
173 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
174 reg = <0x7000000 0x8000 /* config space */
175 0xE105400 0x400>; /* pci bridge */
176 status = "disabled";
177 };
178
179 };
180
181 vdsl {
182 compatible = "lantiq,vdsl-vrx200";
183 };
184 };