lantiq: add lzma-loader source
[openwrt/svn-archive/archive.git] / target / linux / lantiq / image / vr9.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "lantiq,xway", "lantiq,vr9";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips34Kc";
9 };
10 };
11
12 biu@1F800000 {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "lantiq,biu", "simple-bus";
16 reg = <0x1F800000 0x800000>;
17 ranges = <0x0 0x1F800000 0x7FFFFF>;
18
19 icu0: icu@80200 {
20 #interrupt-cells = <1>;
21 interrupt-controller;
22 compatible = "lantiq,icu";
23 reg = <0x80200 0x28
24 0x80228 0x28
25 0x80250 0x28
26 0x80278 0x28
27 0x802a0 0x28>;
28 };
29
30 watchdog@803F0 {
31 compatible = "lantiq,wdt";
32 reg = <0x803F0 0x10>;
33 };
34 };
35
36 sram@1F000000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "lantiq,sram", "simple-bus";
40 reg = <0x1F000000 0x800000>;
41 ranges = <0x0 0x1F000000 0x7FFFFF>;
42
43 eiu0: eiu@101000 {
44 #interrupt-cells = <1>;
45 interrupt-controller;
46 compatible = "lantiq,eiu-xway";
47 reg = <0x101000 0x1000>;
48 interrupt-parent = <&icu0>;
49 interrupts = <166 135 66 40 41 42>;
50 };
51
52 pmu0: pmu@102000 {
53 compatible = "lantiq,pmu-xway";
54 reg = <0x102000 0x1000>;
55 };
56
57 cgu0: cgu@103000 {
58 compatible = "lantiq,cgu-xway";
59 reg = <0x103000 0x1000>;
60 };
61
62 dcdc@106a00 {
63 compatible = "lantiq,dcdc-xrx200";
64 reg = <0x106a00 0x200>;
65 };
66
67 rcu0: rcu@203000 {
68 compatible = "lantiq,rcu-xrx200";
69 reg = <0x203000 0x1000>;
70 /* irq for thermal sensor */
71 interrupt-parent = <&icu0>;
72 interrupts = <115>;
73 };
74 };
75
76 fpi@10000000 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "lantiq,fpi", "simple-bus";
80 ranges = <0x0 0x10000000 0xEEFFFFF>;
81 reg = <0x10000000 0xEF00000>;
82
83 localbus@0 {
84 #address-cells = <2>;
85 #size-cells = <1>;
86 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
87 1 0 0x4000000 0x4000010>; /* addsel1 */
88 compatible = "lantiq,localbus", "simple-bus";
89 };
90
91 gptu@E100A00 {
92 compatible = "lantiq,gptu-xway";
93 reg = <0xE100A00 0x100>;
94 interrupt-parent = <&icu0>;
95 interrupts = <126 127 128 129 130 131>;
96 };
97
98 asc0: serial@E100400 {
99 compatible = "lantiq,asc";
100 reg = <0xE100400 0x400>;
101 interrupt-parent = <&icu0>;
102 interrupts = <104 105 106>;
103 status = "disabled";
104 };
105
106 gpio: pinmux@E100B10 {
107 compatible = "lantiq,pinctrl-xr9";
108 #gpio-cells = <2>;
109 gpio-controller;
110 reg = <0xE100B10 0xA0>;
111 };
112
113 asc1: serial@E100C00 {
114 compatible = "lantiq,asc";
115 reg = <0xE100C00 0x400>;
116 interrupt-parent = <&icu0>;
117 interrupts = <112 113 114>;
118 };
119
120 deu@E103100 {
121 compatible = "lantiq,deu-xrx200";
122 reg = <0xE103100 0xf00>;
123 };
124
125 dma0: dma@E104100 {
126 compatible = "lantiq,dma-xway";
127 reg = <0xE104100 0x800>;
128 };
129
130 ebu0: ebu@E105300 {
131 compatible = "lantiq,ebu-xway";
132 reg = <0xE105300 0x100>;
133 };
134
135 ifxhcd@E101000 {
136 status = "disabled";
137 compatible = "lantiq,ifxhcd-xrx200";
138 reg = <0xE101000 0x1000
139 0xE120000 0x3f000>;
140 interrupt-parent = <&icu0>;
141 interrupts = <62 91>;
142 };
143
144 mei@E116000 {
145 compatible = "lantiq,mei-xrx200";
146 interrupt-parent = <&icu0>;
147 interrupts = <63>;
148 };
149
150 ppe@E234000 {
151 compatible = "lantiq,ppe-xrx200";
152 interrupt-parent = <&icu0>;
153 interrupts = <96>;
154 };
155
156 pcie@d900000 {
157 interrupt-parent = <&icu0>;
158 interrupts = <161 144>;
159 compatible = "lantiq,pcie-xrx200";
160 };
161
162 pci0: pci@E105400 {
163 #address-cells = <3>;
164 #size-cells = <2>;
165 #interrupt-cells = <1>;
166 compatible = "lantiq,pci-xway";
167 bus-range = <0x0 0x0>;
168 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
169 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
170 reg = <0x7000000 0x8000 /* config space */
171 0xE105400 0x400>; /* pci bridge */
172 status = "disabled";
173 };
174
175 };
176
177 vdsl {
178 compatible = "lantiq,vdsl-vrx200";
179 };
180 };