[lantiq] adds dts files and make devicetree images buildable
[openwrt/svn-archive/archive.git] / target / linux / lantiq / image / vr9.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "lantiq,xway", "lantiq,vr9";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips34Kc";
9 };
10 };
11
12 biu@1F800000 {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "lantiq,biu", "simple-bus";
16 reg = <0x1F800000 0x800000>;
17 ranges = <0x0 0x1F800000 0x7FFFFF>;
18
19 icu0: icu@80200 {
20 #interrupt-cells = <1>;
21 interrupt-controller;
22 compatible = "lantiq,icu";
23 reg = <0x80200 0x28
24 0x80228 0x28
25 0x80250 0x28
26 0x80278 0x28
27 0x802a0 0x28>;
28 };
29
30 watchdog@803F0 {
31 compatible = "lantiq,wdt";
32 reg = <0x803F0 0x10>;
33 };
34 };
35
36 sram@1F000000 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "lantiq,sram";
40 reg = <0x1F000000 0x800000>;
41 ranges = <0x0 0x1F000000 0x7FFFFF>;
42
43 eiu0: eiu@101000 {
44 #interrupt-cells = <1>;
45 interrupt-controller;
46 interrupt-parent;
47 compatible = "lantiq,eiu-xway";
48 reg = <0x101000 0x1000>;
49 };
50
51 pmu0: pmu@102000 {
52 compatible = "lantiq,pmu-xway";
53 reg = <0x102000 0x1000>;
54 };
55
56 cgu0: cgu@103000 {
57 compatible = "lantiq,cgu-xway";
58 reg = <0x103000 0x1000>;
59 #clock-cells = <1>;
60 };
61
62 rcu0: rcu@203000 {
63 compatible = "lantiq,rcu-xway";
64 reg = <0x203000 0x1000>;
65 /* irq for thermal sensor */
66 interrupt-parent = <&icu0>;
67 interrupts = <115>;
68 };
69 };
70
71 fpi@10000000 {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 compatible = "lantiq,fpi", "simple-bus";
75 ranges = <0x0 0x10000000 0xEEFFFFF>;
76 reg = <0x10000000 0xEF00000>;
77
78 gptu@E100A00 {
79 compatible = "lantiq,gptu-xway";
80 reg = <0xE100A00 0x100>;
81 interrupt-parent = <&icu0>;
82 interrupts = <126 127 128 129 130 131>;
83 };
84
85 asc1: serial@E100C00 {
86 compatible = "lantiq,asc";
87 reg = <0xE100C00 0x400>;
88 interrupt-parent = <&icu0>;
89 interrupts = <112 113 114>;
90 };
91
92 dma0: dma@E104100 {
93 compatible = "lantiq,dma-xway";
94 reg = <0xE104100 0x800>;
95 };
96
97 ebu0: ebu@E105300 {
98 compatible = "lantiq,ebu-xway";
99 reg = <0xE105300 0x100>;
100 };
101
102 pci0: pci@E105400 {
103 #address-cells = <3>;
104 #size-cells = <2>;
105 #interrupt-cells = <1>;
106 compatible = "lantiq,pci-xway";
107 bus-range = <0x0 0x0>;
108 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
109 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
110 reg = <0x7000000 0x8000 /* config space */
111 0xE105400 0x400>; /* pci bridge */
112 };
113
114 };
115 };