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lantiq: add v3.10 patches
[openwrt/svn-archive/archive.git] / target / linux / lantiq / patches-3.10 / 0009-MIPS-lantiq-add-atm-hack.patch
1 From 65c07535b97006d7bd50ec14871a116e793a24ad Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 3 Aug 2012 10:27:25 +0200
4 Subject: [PATCH 09/34] MIPS: lantiq: add atm hack
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 arch/mips/include/asm/mach-lantiq/lantiq_atm.h | 196 +++++++++++++++++++++++
9 arch/mips/include/asm/mach-lantiq/lantiq_ptm.h | 203 ++++++++++++++++++++++++
10 arch/mips/lantiq/irq.c | 2 +
11 arch/mips/mm/cache.c | 2 +
12 include/uapi/linux/atm.h | 6 +
13 net/atm/common.c | 6 +
14 net/atm/proc.c | 2 +-
15 7 files changed, 416 insertions(+), 1 deletion(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_atm.h
17 create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
18
19 diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_atm.h b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
20 new file mode 100644
21 index 0000000..bf045a9
22 --- /dev/null
23 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h
24 @@ -0,0 +1,196 @@
25 +/******************************************************************************
26 +**
27 +** FILE NAME : ifx_atm.h
28 +** PROJECT : UEIP
29 +** MODULES : ATM
30 +**
31 +** DATE : 17 Jun 2009
32 +** AUTHOR : Xu Liang
33 +** DESCRIPTION : Global ATM driver header file
34 +** COPYRIGHT : Copyright (c) 2006
35 +** Infineon Technologies AG
36 +** Am Campeon 1-12, 85579 Neubiberg, Germany
37 +**
38 +** This program is free software; you can redistribute it and/or modify
39 +** it under the terms of the GNU General Public License as published by
40 +** the Free Software Foundation; either version 2 of the License, or
41 +** (at your option) any later version.
42 +**
43 +** HISTORY
44 +** $Date $Author $Comment
45 +** 07 JUL 2009 Xu Liang Init Version
46 +*******************************************************************************/
47 +
48 +#ifndef IFX_ATM_H
49 +#define IFX_ATM_H
50 +
51 +
52 +
53 +/*!
54 + \defgroup IFX_ATM UEIP Project - ATM driver module
55 + \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9.
56 + */
57 +
58 +/*!
59 + \defgroup IFX_ATM_IOCTL IOCTL Commands
60 + \ingroup IFX_ATM
61 + \brief IOCTL Commands used by user application.
62 + */
63 +
64 +/*!
65 + \defgroup IFX_ATM_STRUCT Structures
66 + \ingroup IFX_ATM
67 + \brief Structures used by user application.
68 + */
69 +
70 +/*!
71 + \file ifx_atm.h
72 + \ingroup IFX_ATM
73 + \brief ATM driver header file
74 + */
75 +
76 +
77 +
78 +/*
79 + * ####################################
80 + * Definition
81 + * ####################################
82 + */
83 +
84 +/*!
85 + \addtogroup IFX_ATM_STRUCT
86 + */
87 +/*@{*/
88 +
89 +/*
90 + * ATM MIB
91 + */
92 +
93 +/*!
94 + \struct atm_cell_ifEntry_t
95 + \brief Structure used for Cell Level MIB Counters.
96 +
97 + User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL".
98 + */
99 +typedef struct {
100 + __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */
101 + __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */
102 + __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */
103 + __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */
104 + __u32 ifInErrors; /*!< counter of error ingress cells */
105 + __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */
106 + __u32 ifOutErrors; /*!< counter of error egress cells */
107 +} atm_cell_ifEntry_t;
108 +
109 +/*!
110 + \struct atm_aal5_ifEntry_t
111 + \brief Structure used for AAL5 Frame Level MIB Counters.
112 +
113 + User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5".
114 + */
115 +typedef struct {
116 + __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */
117 + __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */
118 + __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */
119 + __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */
120 + __u32 ifInUcastPkts; /*!< counter of ingress packets */
121 + __u32 ifOutUcastPkts; /*!< counter of egress packets */
122 + __u32 ifInErrors; /*!< counter of error ingress packets */
123 + __u32 ifInDiscards; /*!< counter of dropped ingress packets */
124 + __u32 ifOutErros; /*!< counter of error egress packets */
125 + __u32 ifOutDiscards; /*!< counter of dropped egress packets */
126 +} atm_aal5_ifEntry_t;
127 +
128 +/*!
129 + \struct atm_aal5_vcc_t
130 + \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
131 +
132 + This structure is a part of structure "atm_aal5_vcc_x_t".
133 + */
134 +typedef struct {
135 + __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */
136 + __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet
137 + __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */
138 +} atm_aal5_vcc_t;
139 +
140 +/*!
141 + \struct atm_aal5_vcc_x_t
142 + \brief Structure used for per PVC AAL5 Frame Level MIB Counters.
143 +
144 + User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC".
145 + */
146 +typedef struct {
147 + int vpi; /*!< VPI of the VCC to get MIB counters */
148 + int vci; /*!< VCI of the VCC to get MIB counters */
149 + atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */
150 +} atm_aal5_vcc_x_t;
151 +
152 +/*@}*/
153 +
154 +
155 +
156 +/*
157 + * ####################################
158 + * IOCTL
159 + * ####################################
160 + */
161 +
162 +/*!
163 + \addtogroup IFX_ATM_IOCTL
164 + */
165 +/*@{*/
166 +
167 +/*
168 + * ioctl Command
169 + */
170 +/*!
171 + \brief ATM IOCTL Magic Number
172 + */
173 +#define PPE_ATM_IOC_MAGIC 'o'
174 +/*!
175 + \brief ATM IOCTL Command - Get Cell Level MIB Counters
176 +
177 + This command is obsolete. User can get cell level MIB from DSL API.
178 + This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters.
179 + */
180 +#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t)
181 +/*!
182 + \brief ATM IOCTL Command - Get AAL5 Level MIB Counters
183 +
184 + Get AAL5 packet counters.
185 + This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters.
186 + */
187 +#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t)
188 +/*!
189 + \brief ATM IOCTL Command - Get Per PVC MIB Counters
190 +
191 + Get AAL5 packet counters for each PVC.
192 + This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters.
193 + */
194 +#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
195 +/*!
196 + \brief Total Number of ATM IOCTL Commands
197 + */
198 +#define PPE_ATM_IOC_MAXNR 3
199 +
200 +/*@}*/
201 +
202 +
203 +
204 +/*
205 + * ####################################
206 + * API
207 + * ####################################
208 + */
209 +
210 +#ifdef __KERNEL__
211 +struct port_cell_info {
212 + unsigned int port_num;
213 + unsigned int tx_link_rate[2];
214 +};
215 +#endif
216 +
217 +
218 +
219 +#endif // IFX_ATM_H
220 +
221 diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
222 new file mode 100644
223 index 0000000..698e5c3
224 --- /dev/null
225 +++ b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h
226 @@ -0,0 +1,203 @@
227 +/******************************************************************************
228 +**
229 +** FILE NAME : ifx_ptm.h
230 +** PROJECT : UEIP
231 +** MODULES : PTM
232 +**
233 +** DATE : 17 Jun 2009
234 +** AUTHOR : Xu Liang
235 +** DESCRIPTION : Global PTM driver header file
236 +** COPYRIGHT : Copyright (c) 2006
237 +** Infineon Technologies AG
238 +** Am Campeon 1-12, 85579 Neubiberg, Germany
239 +**
240 +** This program is free software; you can redistribute it and/or modify
241 +** it under the terms of the GNU General Public License as published by
242 +** the Free Software Foundation; either version 2 of the License, or
243 +** (at your option) any later version.
244 +**
245 +** HISTORY
246 +** $Date $Author $Comment
247 +** 07 JUL 2009 Xu Liang Init Version
248 +*******************************************************************************/
249 +
250 +#ifndef IFX_PTM_H
251 +#define IFX_PTM_H
252 +
253 +
254 +
255 +/*!
256 + \defgroup IFX_PTM UEIP Project - PTM driver module
257 + \brief UEIP Project - PTM driver module, support Danube, Amazon-SE, AR9, VR9.
258 + */
259 +
260 +/*!
261 + \defgroup IFX_PTM_IOCTL IOCTL Commands
262 + \ingroup IFX_PTM
263 + \brief IOCTL Commands used by user application.
264 + */
265 +
266 +/*!
267 + \defgroup IFX_PTM_STRUCT Structures
268 + \ingroup IFX_PTM
269 + \brief Structures used by user application.
270 + */
271 +
272 +/*!
273 + \file ifx_ptm.h
274 + \ingroup IFX_PTM
275 + \brief PTM driver header file
276 + */
277 +
278 +
279 +
280 +/*
281 + * ####################################
282 + * Definition
283 + * ####################################
284 + */
285 +
286 +
287 +
288 +/*
289 + * ####################################
290 + * IOCTL
291 + * ####################################
292 + */
293 +
294 +/*!
295 + \addtogroup IFX_PTM_IOCTL
296 + */
297 +/*@{*/
298 +
299 +/*
300 + * ioctl Command
301 + */
302 +/*!
303 + \brief PTM IOCTL Command - Get codeword MIB counters.
304 +
305 + This command uses structure "PTM_CW_IF_ENTRY_T" to get codeword level MIB counters.
306 + */
307 +#define IFX_PTM_MIB_CW_GET SIOCDEVPRIVATE + 1
308 +/*!
309 + \brief PTM IOCTL Command - Get packet MIB counters.
310 +
311 + This command uses structure "PTM_FRAME_MIB_T" to get packet level MIB counters.
312 + */
313 +#define IFX_PTM_MIB_FRAME_GET SIOCDEVPRIVATE + 2
314 +/*!
315 + \brief PTM IOCTL Command - Get firmware configuration (CRC).
316 +
317 + This command uses structure "IFX_PTM_CFG_T" to get firmware configuration (CRC).
318 + */
319 +#define IFX_PTM_CFG_GET SIOCDEVPRIVATE + 3
320 +/*!
321 + \brief PTM IOCTL Command - Set firmware configuration (CRC).
322 +
323 + This command uses structure "IFX_PTM_CFG_T" to set firmware configuration (CRC).
324 + */
325 +#define IFX_PTM_CFG_SET SIOCDEVPRIVATE + 4
326 +/*!
327 + \brief PTM IOCTL Command - Program priority value to TX queue mapping.
328 +
329 + This command uses structure "IFX_PTM_PRIO_Q_MAP_T" to program priority value to TX queue mapping.
330 + */
331 +#define IFX_PTM_MAP_PKT_PRIO_TO_Q SIOCDEVPRIVATE + 14
332 +
333 +/*@}*/
334 +
335 +
336 +/*!
337 + \addtogroup IFX_PTM_STRUCT
338 + */
339 +/*@{*/
340 +
341 +/*
342 + * ioctl Data Type
343 + */
344 +
345 +/*!
346 + \typedef PTM_CW_IF_ENTRY_T
347 + \brief Wrapping of structure "ptm_cw_ifEntry_t".
348 + */
349 +/*!
350 + \struct ptm_cw_ifEntry_t
351 + \brief Structure used for CodeWord level MIB counters.
352 + */
353 +typedef struct ptm_cw_ifEntry_t {
354 + uint32_t ifRxNoIdleCodewords; /*!< output, number of ingress user codeword */
355 + uint32_t ifRxIdleCodewords; /*!< output, number of ingress idle codeword */
356 + uint32_t ifRxCodingViolation; /*!< output, number of error ingress codeword */
357 + uint32_t ifTxNoIdleCodewords; /*!< output, number of egress user codeword */
358 + uint32_t ifTxIdleCodewords; /*!< output, number of egress idle codeword */
359 +} PTM_CW_IF_ENTRY_T;
360 +
361 +/*!
362 + \typedef PTM_FRAME_MIB_T
363 + \brief Wrapping of structure "ptm_frame_mib_t".
364 + */
365 +/*!
366 + \struct ptm_frame_mib_t
367 + \brief Structure used for packet level MIB counters.
368 + */
369 +typedef struct ptm_frame_mib_t {
370 + uint32_t RxCorrect; /*!< output, number of ingress packet */
371 + uint32_t TC_CrcError; /*!< output, number of egress packet with CRC error */
372 + uint32_t RxDropped; /*!< output, number of dropped ingress packet */
373 + uint32_t TxSend; /*!< output, number of egress packet */
374 +} PTM_FRAME_MIB_T;
375 +
376 +/*!
377 + \typedef IFX_PTM_CFG_T
378 + \brief Wrapping of structure "ptm_cfg_t".
379 + */
380 +/*!
381 + \struct ptm_cfg_t
382 + \brief Structure used for ETH/TC CRC configuration.
383 + */
384 +typedef struct ptm_cfg_t {
385 + uint32_t RxEthCrcPresent; /*!< input/output, ingress packet has ETH CRC */
386 + uint32_t RxEthCrcCheck; /*!< input/output, check ETH CRC of ingress packet */
387 + uint32_t RxTcCrcCheck; /*!< input/output, check TC CRC of ingress codeword */
388 + uint32_t RxTcCrcLen; /*!< input/output, length of TC CRC of ingress codeword */
389 + uint32_t TxEthCrcGen; /*!< input/output, generate ETH CRC for egress packet */
390 + uint32_t TxTcCrcGen; /*!< input/output, generate TC CRC for egress codeword */
391 + uint32_t TxTcCrcLen; /*!< input/output, length of TC CRC of egress codeword */
392 +} IFX_PTM_CFG_T;
393 +
394 +/*!
395 + \typedef IFX_PTM_PRIO_Q_MAP_T
396 + \brief Wrapping of structure "ppe_prio_q_map".
397 + */
398 +/*!
399 + \struct ppe_prio_q_map
400 + \brief Structure used for Priority Value to TX Queue mapping.
401 + */
402 +typedef struct ppe_prio_q_map {
403 + int pkt_prio;
404 + int qid;
405 + int vpi; // ignored in eth interface
406 + int vci; // ignored in eth interface
407 +} IFX_PTM_PRIO_Q_MAP_T;
408 +
409 +/*@}*/
410 +
411 +
412 +
413 +/*
414 + * ####################################
415 + * API
416 + * ####################################
417 + */
418 +
419 +#ifdef __KERNEL__
420 +struct port_cell_info {
421 + unsigned int port_num;
422 + unsigned int tx_link_rate[2];
423 +};
424 +#endif
425 +
426 +
427 +
428 +#endif // IFX_PTM_H
429 +
430 diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
431 index 5119487..6d2c486 100644
432 --- a/arch/mips/lantiq/irq.c
433 +++ b/arch/mips/lantiq/irq.c
434 @@ -14,6 +14,7 @@
435 #include <linux/of_platform.h>
436 #include <linux/of_address.h>
437 #include <linux/of_irq.h>
438 +#include <linux/module.h>
439
440 #include <asm/bootinfo.h>
441 #include <asm/irq_cpu.h>
442 @@ -99,6 +100,7 @@ void ltq_mask_and_ack_irq(struct irq_data *d)
443 ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier);
444 ltq_icu_w32(im, BIT(offset), isr);
445 }
446 +EXPORT_SYMBOL(ltq_mask_and_ack_irq);
447
448 static void ltq_ack_irq(struct irq_data *d)
449 {
450 diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
451 index 5aeb3eb..11aa4e6 100644
452 --- a/arch/mips/mm/cache.c
453 +++ b/arch/mips/mm/cache.c
454 @@ -58,6 +58,8 @@ void (*_dma_cache_wback)(unsigned long start, unsigned long size);
455 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
456
457 EXPORT_SYMBOL(_dma_cache_wback_inv);
458 +EXPORT_SYMBOL(_dma_cache_wback);
459 +EXPORT_SYMBOL(_dma_cache_inv);
460
461 #endif /* CONFIG_DMA_NONCOHERENT */
462
463 diff --git a/include/uapi/linux/atm.h b/include/uapi/linux/atm.h
464 index 88399db..78c8bbc 100644
465 --- a/include/uapi/linux/atm.h
466 +++ b/include/uapi/linux/atm.h
467 @@ -130,8 +130,14 @@
468 #define ATM_ABR 4
469 #define ATM_ANYCLASS 5 /* compatible with everything */
470
471 +#define ATM_VBR_NRT ATM_VBR
472 +#define ATM_VBR_RT 6
473 +#define ATM_UBR_PLUS 7
474 +#define ATM_GFR 8
475 +
476 #define ATM_MAX_PCR -1 /* maximum available PCR */
477
478 +
479 struct atm_trafprm {
480 unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */
481 int max_pcr; /* maximum PCR in cells per second */
482 diff --git a/net/atm/common.c b/net/atm/common.c
483 index 737bef5..959008d 100644
484 --- a/net/atm/common.c
485 +++ b/net/atm/common.c
486 @@ -62,11 +62,17 @@ static void vcc_remove_socket(struct sock *sk)
487 write_unlock_irq(&vcc_sklist_lock);
488 }
489
490 +struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL;
491 +EXPORT_SYMBOL(ifx_atm_alloc_tx);
492 +
493 static struct sk_buff *alloc_tx(struct atm_vcc *vcc, unsigned int size)
494 {
495 struct sk_buff *skb;
496 struct sock *sk = sk_atm(vcc);
497
498 + if (ifx_atm_alloc_tx != NULL)
499 + return ifx_atm_alloc_tx(vcc, size);
500 +
501 if (sk_wmem_alloc_get(sk) && !atm_may_send(vcc, size)) {
502 pr_debug("Sorry: wmem_alloc = %d, size = %d, sndbuf = %d\n",
503 sk_wmem_alloc_get(sk), size, sk->sk_sndbuf);
504 diff --git a/net/atm/proc.c b/net/atm/proc.c
505 index bbb6461..ecb584a 100644
506 --- a/net/atm/proc.c
507 +++ b/net/atm/proc.c
508 @@ -154,7 +154,7 @@ static void *vcc_seq_next(struct seq_file *seq, void *v, loff_t *pos)
509 static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc)
510 {
511 static const char *const class_name[] = {
512 - "off", "UBR", "CBR", "VBR", "ABR"};
513 + "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"};
514 static const char *const aal_name[] = {
515 "---", "1", "2", "3/4", /* 0- 3 */
516 "???", "5", "???", "???", /* 4- 7 */
517 --
518 1.7.10.4
519
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