1 From 1e4f35a2ec92447818e89432ec297f14ac66c7c1 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 28 Jul 2013 18:06:39 +0200
4 Subject: [PATCH 16/34] MTD: lantiq: xway: the latched command should be
7 Signed-off-by: John Crispin <blogic@openwrt.org>
9 drivers/mtd/nand/xway_nand.c | 12 ++++++------
10 1 file changed, 6 insertions(+), 6 deletions(-)
12 diff --git a/drivers/mtd/nand/xway_nand.c b/drivers/mtd/nand/xway_nand.c
13 index 169a91d..7f2bdd1 100644
14 --- a/drivers/mtd/nand/xway_nand.c
15 +++ b/drivers/mtd/nand/xway_nand.c
17 #define NAND_CON_CSMUX (1 << 1)
18 #define NAND_CON_NANDM 1
20 +static u32 xway_latchcmd;
22 static void xway_reset_chip(struct nand_chip *chip)
24 unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W;
25 @@ -94,17 +96,15 @@ static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
28 if (ctrl & NAND_CTRL_CHANGE) {
29 - nandaddr &= ~(NAND_WRITE_CMD | NAND_WRITE_ADDR);
31 - nandaddr |= NAND_WRITE_CMD;
33 - nandaddr |= NAND_WRITE_ADDR;
34 - this->IO_ADDR_W = (void __iomem *) nandaddr;
35 + xway_latchcmd = NAND_WRITE_CMD;
36 + else if (ctrl & NAND_ALE)
37 + xway_latchcmd = NAND_WRITE_ADDR;
40 if (cmd != NAND_CMD_NONE) {
41 spin_lock_irqsave(&ebu_lock, flags);
42 - writeb(cmd, this->IO_ADDR_W);
43 + writeb(cmd, (void __iomem *) (nandaddr | xway_latchcmd));
44 while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
46 spin_unlock_irqrestore(&ebu_lock, flags);