target/linux/lantiq/patches-3.18/0014-MTD-lantiq-xway-the-latched-command-should-be-persis.patch

   1 From b454cefd675fc1bd3d8c690c1bd1d8f4678e9922 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 28 Jul 2013 18:06:39 +0200
   4 Subject: [PATCH 14/36] MTD: lantiq: xway: the latched command should be
   5  persistent
   6
   7 Signed-off-by: John Crispin <blogic@openwrt.org>
   8 ---
   9  drivers/mtd/nand/xway_nand.c |   12 ++++++------
  10  1 file changed, 6 insertions(+), 6 deletions(-)
  11
  12 --- a/drivers/mtd/nand/xway_nand.c
  13 +++ b/drivers/mtd/nand/xway_nand.c
  14 @@ -54,6 +54,8 @@
  15  #define NAND_CON_CSMUX         (1 << 1)
  16  #define NAND_CON_NANDM         1
  17
  18 +static u32 xway_latchcmd;
  19 +
  20  static void xway_reset_chip(struct nand_chip *chip)
  21  {
  22         unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W;
  23 @@ -94,17 +96,15 @@ static void xway_cmd_ctrl(struct mtd_inf
  24         unsigned long flags;
  25
  26         if (ctrl & NAND_CTRL_CHANGE) {
  27 -               nandaddr &= ~(NAND_WRITE_CMD | NAND_WRITE_ADDR);
  28                 if (ctrl & NAND_CLE)
  29 -                       nandaddr |= NAND_WRITE_CMD;
  30 -               else
  31 -                       nandaddr |= NAND_WRITE_ADDR;
  32 -               this->IO_ADDR_W = (void __iomem *) nandaddr;
  33 +                       xway_latchcmd = NAND_WRITE_CMD;
  34 +               else if (ctrl & NAND_ALE)
  35 +                       xway_latchcmd = NAND_WRITE_ADDR;
  36         }
  37
  38         if (cmd != NAND_CMD_NONE) {
  39                 spin_lock_irqsave(&ebu_lock, flags);
  40 -               writeb(cmd, this->IO_ADDR_W);
  41 +               writeb(cmd, (void __iomem *) (nandaddr | xway_latchcmd));
  42                 while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
  43                         ;
  44                 spin_unlock_irqrestore(&ebu_lock, flags);