target/linux/lantiq/patches-3.18/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch

   1 From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 10 Sep 2014 22:42:14 +0200
   4 Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h  |    6 +
   9  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 +
  10  arch/mips/lantiq/xway/Makefile                     |    3 +
  11  arch/mips/lantiq/xway/ath_eep.c                    |  282 ++++++++++++++++++++
  12  arch/mips/lantiq/xway/eth_mac.c                    |   76 ++++++
  13  arch/mips/lantiq/xway/pci-ath-fixup.c              |  109 ++++++++
  14  arch/mips/lantiq/xway/rt_eep.c                     |   60 +++++
  15  7 files changed, 539 insertions(+)
  16  create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  17  create mode 100644 arch/mips/lantiq/xway/ath_eep.c
  18  create mode 100644 arch/mips/lantiq/xway/eth_mac.c
  19  create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
  20  create mode 100644 arch/mips/lantiq/xway/rt_eep.c
  21
  22 --- /dev/null
  23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  24 @@ -0,0 +1,6 @@
  25 +#ifndef _PCI_ATH_FIXUP
  26 +#define _PCI_ATH_FIXUP
  27 +
  28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
  29 +
  30 +#endif /* _PCI_ATH_FIXUP */
  31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  33 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
  34  extern void ltq_pmu_enable(unsigned int module);
  35  extern void ltq_pmu_disable(unsigned int module);
  36
  37 +/* allow the ethernet driver to load a flash mapped mac addr */
  38 +const u8* ltq_get_eth_mac(void);
  39 +
  40  #endif /* CONFIG_SOC_TYPE_XWAY */
  41  #endif /* _LTQ_XWAY_H__ */
  42 --- a/arch/mips/lantiq/xway/Makefile
  43 +++ b/arch/mips/lantiq/xway/Makefile
  44 @@ -2,4 +2,7 @@ obj-y := prom.o sysctrl.o clk.o reset.o
  45
  46  obj-y += vmmc.o tffs.o
  47
  48 +obj-y += eth_mac.o
  49 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
  50 +
  51  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
  52 --- /dev/null
  53 +++ b/arch/mips/lantiq/xway/ath_eep.c
  54 @@ -0,0 +1,282 @@
  55 +/*
  56 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
  57 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  58 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
  59 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
  60 + *  Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
  61 + *
  62 + *  This program is free software; you can redistribute it and/or modify it
  63 + *  under the terms of the GNU General Public License version 2 as published
  64 + *  by the Free Software Foundation.
  65 + */
  66 +
  67 +#include <linux/init.h>
  68 +#include <linux/module.h>
  69 +#include <linux/platform_device.h>
  70 +#include <linux/etherdevice.h>
  71 +#include <linux/ath5k_platform.h>
  72 +#include <linux/ath9k_platform.h>
  73 +#include <linux/pci.h>
  74 +#include <linux/err.h>
  75 +#include <linux/mtd/mtd.h>
  76 +#include <pci-ath-fixup.h>
  77 +#include <lantiq_soc.h>
  78 +
  79 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
  80 +struct ath5k_platform_data ath5k_pdata;
  81 +struct ath9k_platform_data ath9k_pdata = {
  82 +       .led_pin = -1,
  83 +};
  84 +static u8 athxk_eeprom_mac[6];
  85 +
  86 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
  87 +{
  88 +       dev->dev.platform_data = &ath9k_pdata;
  89 +       return 0;
  90 +}
  91 +
  92 +static int ath9k_eep_load;
  93 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
  94 +{
  95 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
  96 +       struct resource *eep_res, *mac_res = NULL;
  97 +       void __iomem *eep, *mac;
  98 +       int mac_offset, led_pin;
  99 +       u32 mac_inc = 0, pci_slot = 0;
 100 +       int i;
 101 +       struct mtd_info *the_mtd;
 102 +       size_t flash_readlen;
 103 +       const __be32 *list;
 104 +       const char *part;
 105 +       phandle phandle;
 106 +
 107 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 108 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 109 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 110 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 111 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 112 +                       != ERR_PTR(-ENODEV)) {
 113 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 114 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 115 +                               (void *) ath9k_pdata.eeprom_data);
 116 +               if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 117 +                       size_t mac_readlen;
 118 +                       mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
 119 +                               (void *) athxk_eeprom_mac);
 120 +               }
 121 +               put_mtd_device(the_mtd);
 122 +               if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
 123 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 124 +                       return -ENODEV;
 125 +               }
 126 +       } else {
 127 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 128 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 129 +
 130 +               if (!eep_res) {
 131 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 132 +                       return -ENODEV;
 133 +               }
 134 +               if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
 135 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 136 +                       return -EINVAL;
 137 +               }
 138 +
 139 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 140 +               memcpy_fromio(ath9k_pdata.eeprom_data, eep,
 141 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1);
 142 +       }
 143 +
 144 +       if (of_find_property(np, "ath,eep-swap", NULL))
 145 +               for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
 146 +                       ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
 147 +
 148 +       if (of_find_property(np, "ath,eep-endian", NULL)) {
 149 +               ath9k_pdata.endian_check = true;
 150 +
 151 +               dev_info(&pdev->dev, "endian check enabled.\n");
 152 +       }
 153 +
 154 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 155 +               if (mac_res) {
 156 +                       if (resource_size(mac_res) != 6) {
 157 +                               dev_err(&pdev->dev, "mac has an invalid size\n");
 158 +                               return -EINVAL;
 159 +                       }
 160 +                       mac = ioremap(mac_res->start, resource_size(mac_res));
 161 +                       memcpy_fromio(athxk_eeprom_mac, mac, 6);
 162 +               } else if (ltq_get_eth_mac()) {
 163 +                       memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 164 +               }
 165 +       }
 166 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 167 +               dev_warn(&pdev->dev, "using random mac\n");
 168 +               random_ether_addr(athxk_eeprom_mac);
 169 +       }
 170 +
 171 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 172 +               athxk_eeprom_mac[5] += mac_inc;
 173 +
 174 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
 175 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
 176 +
 177 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 178 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 179 +
 180 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
 181 +                if (ath9k_eep_load) {
 182 +                        struct pci_dev *d = NULL;
 183 +                        while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
 184 +                                        PCI_ANY_ID, d)) != NULL)
 185 +                                pci_fixup_device(pci_fixup_early, d);
 186 +                }
 187 +
 188 +       }
 189 +
 190 +       if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
 191 +               ath9k_pdata.led_pin = led_pin;
 192 +               dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
 193 +       }
 194 +
 195 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
 196 +
 197 +       return 0;
 198 +}
 199 +
 200 +static struct of_device_id ath9k_eeprom_ids[] = {
 201 +       { .compatible = "ath9k,eeprom" },
 202 +       { }
 203 +};
 204 +
 205 +static struct platform_driver ath9k_eeprom_driver = {
 206 +       .driver         = {
 207 +               .name           = "ath9k,eeprom",
 208 +               .owner  = THIS_MODULE,
 209 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
 210 +       },
 211 +};
 212 +
 213 +static int __init of_ath9k_eeprom_init(void)
 214 +{
 215 +        int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 216 +
 217 +        if (ret)
 218 +                ath9k_eep_load = 1;
 219 +
 220 +        return ret;
 221 +}
 222 +
 223 +static int __init of_ath9k_eeprom_init_late(void)
 224 +{
 225 +        if (!ath9k_eep_load)
 226 +                return 0;
 227 +        return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 228 +}
 229 +late_initcall(of_ath9k_eeprom_init_late);
 230 +subsys_initcall(of_ath9k_eeprom_init);
 231 +
 232 +
 233 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
 234 +{
 235 +       dev->dev.platform_data = &ath5k_pdata;
 236 +       return 0;
 237 +}
 238 +
 239 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
 240 +{
 241 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
 242 +       struct resource *eep_res, *mac_res = NULL;
 243 +       void __iomem *eep, *mac;
 244 +       int mac_offset;
 245 +       u32 mac_inc = 0;
 246 +       int i;
 247 +       struct mtd_info *the_mtd;
 248 +       size_t flash_readlen;
 249 +       const __be32 *list;
 250 +       const char *part;
 251 +       phandle phandle;
 252 +
 253 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 254 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 255 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 256 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 257 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 258 +                       != ERR_PTR(-ENODEV)) {
 259 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 260 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 261 +                               (void *) ath5k_pdata.eeprom_data);
 262 +               put_mtd_device(the_mtd);
 263 +               if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
 264 +                               || i) {
 265 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 266 +                       return -ENODEV;
 267 +               }
 268 +       } else {
 269 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 270 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 271 +
 272 +               if (!eep_res) {
 273 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 274 +                       return -ENODEV;
 275 +               }
 276 +               if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
 277 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 278 +                       return -EINVAL;
 279 +               }
 280 +
 281 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 282 +               ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
 283 +                               GFP_KERNEL);
 284 +               memcpy_fromio(ath5k_pdata.eeprom_data, eep,
 285 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1);
 286 +       }
 287 +
 288 +       if (of_find_property(np, "ath,eep-swap", NULL))
 289 +               for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
 290 +                       ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
 291 +
 292 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 293 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
 294 +       } else if (mac_res) {
 295 +               if (resource_size(mac_res) != 6) {
 296 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
 297 +                       return -EINVAL;
 298 +               }
 299 +               mac = ioremap(mac_res->start, resource_size(mac_res));
 300 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
 301 +       } else if (ltq_get_eth_mac())
 302 +               memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 303 +       else {
 304 +               dev_warn(&pdev->dev, "using random mac\n");
 305 +               random_ether_addr(athxk_eeprom_mac);
 306 +       }
 307 +
 308 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 309 +               athxk_eeprom_mac[5] += mac_inc;
 310 +
 311 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
 312 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
 313 +
 314 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
 315 +
 316 +       return 0;
 317 +}
 318 +
 319 +static struct of_device_id ath5k_eeprom_ids[] = {
 320 +       { .compatible = "ath5k,eeprom" },
 321 +       { }
 322 +};
 323 +
 324 +static struct platform_driver ath5k_eeprom_driver = {
 325 +       .driver         = {
 326 +               .name           = "ath5k,eeprom",
 327 +               .owner  = THIS_MODULE,
 328 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
 329 +       },
 330 +};
 331 +
 332 +static int __init of_ath5k_eeprom_init(void)
 333 +{
 334 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 335 +}
 336 +device_initcall(of_ath5k_eeprom_init);
 337 --- /dev/null
 338 +++ b/arch/mips/lantiq/xway/eth_mac.c
 339 @@ -0,0 +1,76 @@
 340 +/*
 341 + *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
 342 + *
 343 + *  This program is free software; you can redistribute it and/or modify it
 344 + *  under the terms of the GNU General Public License version 2 as published
 345 + *  by the Free Software Foundation.
 346 + */
 347 +
 348 +#include <linux/init.h>
 349 +#include <linux/module.h>
 350 +#include <linux/of_platform.h>
 351 +#include <linux/if_ether.h>
 352 +
 353 +static u8 eth_mac[6];
 354 +static int eth_mac_set;
 355 +
 356 +const u8* ltq_get_eth_mac(void)
 357 +{
 358 +       return eth_mac;
 359 +}
 360 +
 361 +static int __init setup_ethaddr(char *str)
 362 +{
 363 +       eth_mac_set = mac_pton(str, eth_mac);
 364 +       return !eth_mac_set;
 365 +}
 366 +__setup("ethaddr=", setup_ethaddr);
 367 +
 368 +int __init of_eth_mac_probe(struct platform_device *pdev)
 369 +{
 370 +       struct device_node *np = pdev->dev.of_node;
 371 +       struct resource *mac_res;
 372 +       void __iomem *mac;
 373 +       u32 mac_inc = 0;
 374 +
 375 +       if (eth_mac_set) {
 376 +               dev_err(&pdev->dev, "mac was already set by bootloader\n");
 377 +               return -EINVAL;
 378 +       }
 379 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 380 +
 381 +       if (!mac_res) {
 382 +               dev_err(&pdev->dev, "failed to load mac\n");
 383 +               return -EINVAL;
 384 +       }
 385 +       if (resource_size(mac_res) != 6) {
 386 +               dev_err(&pdev->dev, "mac has an invalid size\n");
 387 +               return -EINVAL;
 388 +       }
 389 +       mac = ioremap(mac_res->start, resource_size(mac_res));
 390 +       memcpy_fromio(eth_mac, mac, 6);
 391 +
 392 +       if (!of_property_read_u32(np, "mac-increment", &mac_inc))
 393 +               eth_mac[5] += mac_inc;
 394 +
 395 +       return 0;
 396 +}
 397 +
 398 +static struct of_device_id eth_mac_ids[] = {
 399 +       { .compatible = "lantiq,eth-mac" },
 400 +       { /* sentinel */ }
 401 +};
 402 +
 403 +static struct platform_driver eth_mac_driver = {
 404 +       .driver         = {
 405 +               .name           = "lantiq,eth-mac",
 406 +               .owner  = THIS_MODULE,
 407 +               .of_match_table = of_match_ptr(eth_mac_ids),
 408 +       },
 409 +};
 410 +
 411 +static int __init of_eth_mac_init(void)
 412 +{
 413 +       return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
 414 +}
 415 +device_initcall(of_eth_mac_init);
 416 --- /dev/null
 417 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
 418 @@ -0,0 +1,109 @@
 419 +/*
 420 + *  Atheros AP94 reference board PCI initialization
 421 + *
 422 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
 423 + *
 424 + *  This program is free software; you can redistribute it and/or modify it
 425 + *  under the terms of the GNU General Public License version 2 as published
 426 + *  by the Free Software Foundation.
 427 + */
 428 +
 429 +#include <linux/pci.h>
 430 +#include <linux/init.h>
 431 +#include <linux/delay.h>
 432 +#include <lantiq_soc.h>
 433 +
 434 +#define LTQ_PCI_MEM_BASE               0x18000000
 435 +
 436 +struct ath_fixup {
 437 +       u16             *cal_data;
 438 +       unsigned        slot;
 439 +};
 440 +
 441 +static int ath_num_fixups;
 442 +static struct ath_fixup ath_fixups[2];
 443 +
 444 +static void ath_pci_fixup(struct pci_dev *dev)
 445 +{
 446 +       void __iomem *mem;
 447 +       u16 *cal_data = NULL;
 448 +       u16 cmd;
 449 +       u32 bar0;
 450 +       u32 val;
 451 +       unsigned i;
 452 +
 453 +       for (i = 0; i < ath_num_fixups; i++) {
 454 +               if (ath_fixups[i].cal_data == NULL)
 455 +                       continue;
 456 +
 457 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
 458 +                       continue;
 459 +
 460 +               cal_data = ath_fixups[i].cal_data;
 461 +               break;
 462 +       }
 463 +
 464 +       if (cal_data == NULL)
 465 +               return;
 466 +
 467 +       if (*cal_data != 0xa55a) {
 468 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
 469 +               return;
 470 +       }
 471 +
 472 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 473 +
 474 +       mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
 475 +       if (!mem) {
 476 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
 477 +               return;
 478 +       }
 479 +
 480 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
 481 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
 482 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 483 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 484 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 485 +
 486 +       /* set pointer to first reg address */
 487 +       cal_data += 3;
 488 +       while (*cal_data != 0xffff) {
 489 +               u32 reg;
 490 +               reg = *cal_data++;
 491 +               val = *cal_data++;
 492 +               val |= (*cal_data++) << 16;
 493 +
 494 +               ltq_w32(swab32(val), mem + reg);
 495 +               udelay(100);
 496 +       }
 497 +
 498 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
 499 +       dev->vendor = val & 0xffff;
 500 +       dev->device = (val >> 16) & 0xffff;
 501 +
 502 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
 503 +       dev->revision = val & 0xff;
 504 +       dev->class = val >> 8; /* upper 3 bytes */
 505 +
 506 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
 507 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
 508 +
 509 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 510 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 511 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 512 +
 513 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 514 +
 515 +       iounmap(mem);
 516 +}
 517 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
 518 +
 519 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
 520 +{
 521 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
 522 +               return;
 523 +
 524 +       ath_fixups[ath_num_fixups].slot = slot;
 525 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
 526 +       ath_num_fixups++;
 527 +}
 528 --- /dev/null
 529 +++ b/arch/mips/lantiq/xway/rt_eep.c
 530 @@ -0,0 +1,60 @@
 531 +/*
 532 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 533 + *
 534 + *  This program is free software; you can redistribute it and/or modify it
 535 + *  under the terms of the GNU General Public License version 2 as published
 536 + *  by the Free Software Foundation.
 537 + */
 538 +
 539 +#include <linux/init.h>
 540 +#include <linux/module.h>
 541 +#include <linux/pci.h>
 542 +#include <linux/platform_device.h>
 543 +#include <linux/rt2x00_platform.h>
 544 +
 545 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
 546 +static struct rt2x00_platform_data rt2x00_pdata;
 547 +
 548 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
 549 +{
 550 +       dev->dev.platform_data = &rt2x00_pdata;
 551 +       return 0;
 552 +}
 553 +
 554 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
 555 +{
 556 +       struct device_node *np = pdev->dev.of_node;
 557 +       const char *eeprom;
 558 +
 559 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
 560 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
 561 +               return 0;
 562 +       }
 563 +
 564 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
 565 +//     rt2x00_pdata.mac_address = mac;
 566 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
 567 +
 568 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
 569 +
 570 +       return 0;
 571 +}
 572 +
 573 +static struct of_device_id ralink_eeprom_ids[] = {
 574 +       { .compatible = "ralink,eeprom" },
 575 +       { }
 576 +};
 577 +
 578 +static struct platform_driver ralink_eeprom_driver = {
 579 +       .driver         = {
 580 +               .name           = "ralink,eeprom",
 581 +               .owner  = THIS_MODULE,
 582 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
 583 +       },
 584 +};
 585 +
 586 +static int __init of_ralink_eeprom_init(void)
 587 +{
 588 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
 589 +}
 590 +device_initcall(of_ralink_eeprom_init);
 591 --- a/drivers/net/ethernet/lantiq_etop.c
 592 +++ b/drivers/net/ethernet/lantiq_etop.c
 593 @@ -161,7 +161,7 @@ struct ltq_etop_priv {
 594         int tx_irq;
 595         int rx_irq;
 596
 597 -       const void *mac;
 598 +       void *mac;
 599         int mii_mode;
 600
 601         spinlock_t lock;
 602 @@ -840,7 +840,11 @@ ltq_etop_init(struct net_device *dev)
 603         if (err)
 604                 goto err_hw;
 605
 606 -       memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
 607 +       if (priv->mac)
 608 +               memcpy(&mac, priv->mac, sizeof(struct sockaddr));
 609 +       else
 610 +               memcpy(&mac, ltq_get_eth_mac(), sizeof(struct sockaddr));
 611 +
 612         if (!is_valid_ether_addr(mac.sa_data)) {
 613                 pr_warn("etop: invalid MAC, using random\n");
 614                 eth_random_addr(mac.sa_data);