target/linux/lantiq/patches-3.2/0027-MIPS-lantiq-convert-falcon-to-clkdev-api.patch

   1 From 07c4da1cf419022e5874c881511f051bb81e984e Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 8 Mar 2012 11:19:11 +0100
   4 Subject: [PATCH 27/70] MIPS: lantiq: convert falcon to clkdev api
   5
   6 Unify sysctrl/clock code and add clkdev hooks to sysctrl.c
   7
   8 Signed-off-by: John Crispin <blogic@openwrt.org>
   9 ---
  10  .../include/asm/mach-lantiq/falcon/lantiq_soc.h    |    8 +-
  11  arch/mips/lantiq/falcon/Makefile                   |    2 +-
  12  arch/mips/lantiq/falcon/sysctrl.c                  |  129 ++++++++++++--------
  13  3 files changed, 80 insertions(+), 59 deletions(-)
  14
  15 diff --git a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
  16 index 0aa1f16..120c56c 100644
  17 --- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
  18 +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
  19 @@ -95,6 +95,7 @@
  20
  21  /* Activation Status Register */
  22  #define ACTS_ASC1_ACT  0x00000800
  23 +#define ACTS_I2C_ACT   0x00004000
  24  #define ACTS_P0                0x00010000
  25  #define ACTS_P1                0x00010000
  26  #define ACTS_P2                0x00020000
  27 @@ -106,13 +107,6 @@
  28  #define ACTS_PADCTRL3  0x00200000
  29  #define ACTS_PADCTRL4  0x00400000
  30
  31 -extern void ltq_sysctl_activate(int module, unsigned int mask);
  32 -extern void ltq_sysctl_deactivate(int module, unsigned int mask);
  33 -extern void ltq_sysctl_clken(int module, unsigned int mask);
  34 -extern void ltq_sysctl_clkdis(int module, unsigned int mask);
  35 -extern void ltq_sysctl_reboot(int module, unsigned int mask);
  36 -extern int ltq_gpe_is_activated(unsigned int mask);
  37 -
  38  /* global register ranges */
  39  extern __iomem void *ltq_ebu_membase;
  40  extern __iomem void *ltq_sys1_membase;
  41 diff --git a/arch/mips/lantiq/falcon/Makefile b/arch/mips/lantiq/falcon/Makefile
  42 index 56b22eb..3634154 100644
  43 --- a/arch/mips/lantiq/falcon/Makefile
  44 +++ b/arch/mips/lantiq/falcon/Makefile
  45 @@ -1,2 +1,2 @@
  46 -obj-y := clk.o prom.o reset.o sysctrl.o devices.o gpio.o
  47 +obj-y := prom.o reset.o sysctrl.o devices.o gpio.o
  48  obj-$(CONFIG_LANTIQ_MACH_EASY98000) += mach-easy98000.o
  49 diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c
  50 index 905a142..900f0e5 100644
  51 --- a/arch/mips/lantiq/falcon/sysctrl.c
  52 +++ b/arch/mips/lantiq/falcon/sysctrl.c
  53 @@ -9,11 +9,13 @@
  54
  55  #include <linux/ioport.h>
  56  #include <linux/export.h>
  57 +#include <linux/clkdev.h>
  58  #include <asm/delay.h>
  59
  60  #include <lantiq_soc.h>
  61
  62  #include "devices.h"
  63 +#include "../clk.h"
  64
  65  /* infrastructure control register */
  66  #define SYS1_INFRAC            0x00bc
  67 @@ -38,6 +40,10 @@
  68  #define LTQ_SYSCTL_DEACT       0x0028
  69  /* reboot Register */
  70  #define LTQ_SYSCTL_RBT         0x002c
  71 +/* CPU0 Clock Control Register */
  72 +#define LTQ_SYS1_CPU0CC         0x0040
  73 +/* clock divider bit */
  74 +#define LTQ_CPU0CC_CPUDIV       0x0001
  75
  76  static struct resource ltq_sysctl_res[] = {
  77         MEM_RES("sys1", LTQ_SYS1_BASE_ADDR, LTQ_SYS1_SIZE),
  78 @@ -64,79 +70,67 @@ void __iomem *ltq_ebu_membase;
  79  #define ltq_status_r32(x)      ltq_r32(ltq_status_membase + (x))
  80
  81  static inline void
  82 -ltq_sysctl_wait(int module, unsigned int mask,
  83 +ltq_sysctl_wait(struct clk *clk,
  84                 unsigned int test, unsigned int reg)
  85  {
  86         int err = 1000000;
  87
  88 -       do {} while (--err && ((ltq_reg_r32(module, reg)
  89 -                                       & mask) != test));
  90 +       do {} while (--err && ((ltq_reg_r32(clk->module, reg)
  91 +                                       & clk->bits) != test));
  92         if (!err)
  93 -               pr_err("module de/activation failed %d %08X %08X\n",
  94 -                                                       module, mask, test);
  95 +               pr_err("module de/activation failed %d %08X %08X %08X\n",
  96 +                               clk->module, clk->bits, test,
  97 +                               ltq_reg_r32(clk->module, reg) & clk->bits);
  98  }
  99
 100 -void
 101 -ltq_sysctl_activate(int module, unsigned int mask)
 102 +static int
 103 +ltq_sysctl_activate(struct clk *clk)
 104  {
 105 -       if (module > SYSCTL_SYSGPE)
 106 -               return;
 107 -
 108 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
 109 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_ACT);
 110 -       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
 111 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN);
 112 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_ACT);
 113 +       ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS);
 114 +       return 0;
 115  }
 116 -EXPORT_SYMBOL(ltq_sysctl_activate);
 117
 118 -void
 119 -ltq_sysctl_deactivate(int module, unsigned int mask)
 120 +static void
 121 +ltq_sysctl_deactivate(struct clk *clk)
 122  {
 123 -       if (module > SYSCTL_SYSGPE)
 124 -               return;
 125 -
 126 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
 127 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_DEACT);
 128 -       ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_ACTS);
 129 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR);
 130 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_DEACT);
 131 +       ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_ACTS);
 132  }
 133 -EXPORT_SYMBOL(ltq_sysctl_deactivate);
 134
 135 -void
 136 -ltq_sysctl_clken(int module, unsigned int mask)
 137 +static int
 138 +ltq_sysctl_clken(struct clk *clk)
 139  {
 140 -       if (module > SYSCTL_SYSGPE)
 141 -               return;
 142 -
 143 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
 144 -       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_CLKS);
 145 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKEN);
 146 +       ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_CLKS);
 147 +       return 0;
 148  }
 149 -EXPORT_SYMBOL(ltq_sysctl_clken);
 150
 151 -void
 152 -ltq_sysctl_clkdis(int module, unsigned int mask)
 153 +static void
 154 +ltq_sysctl_clkdis(struct clk *clk)
 155  {
 156 -       if (module > SYSCTL_SYSGPE)
 157 -               return;
 158 -
 159 -       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
 160 -       ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_CLKS);
 161 +       ltq_reg_w32(clk->module, clk->bits, LTQ_SYSCTL_CLKCLR);
 162 +       ltq_sysctl_wait(clk, 0, LTQ_SYSCTL_CLKS);
 163  }
 164 -EXPORT_SYMBOL(ltq_sysctl_clkdis);
 165
 166 -void
 167 -ltq_sysctl_reboot(int module, unsigned int mask)
 168 +static void
 169 +ltq_sysctl_reboot(struct clk *clk)
 170  {
 171         unsigned int act;
 172 -
 173 -       if (module > SYSCTL_SYSGPE)
 174 -               return;
 175 -
 176 -       act = ltq_reg_r32(module, LTQ_SYSCTL_ACT);
 177 -       if ((~act & mask) != 0)
 178 -               ltq_sysctl_activate(module, ~act & mask);
 179 -       ltq_reg_w32(module, act & mask, LTQ_SYSCTL_RBT);
 180 -       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
 181 +       unsigned int bits;
 182 +
 183 +       act = ltq_reg_r32(clk->module, LTQ_SYSCTL_ACT);
 184 +       bits = ~act & clk->bits;
 185 +       if (bits != 0) {
 186 +               ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_CLKEN);
 187 +               ltq_reg_w32(clk->module, bits, LTQ_SYSCTL_ACT);
 188 +               ltq_sysctl_wait(clk, bits, LTQ_SYSCTL_ACTS);
 189 +       }
 190 +       ltq_reg_w32(clk->module, act & clk->bits, LTQ_SYSCTL_RBT);
 191 +       ltq_sysctl_wait(clk, clk->bits, LTQ_SYSCTL_ACTS);
 192  }
 193 -EXPORT_SYMBOL(ltq_sysctl_reboot);
 194
 195  /* enable the ONU core */
 196  static void
 197 @@ -167,6 +161,24 @@ ltq_gpe_enable(void)
 198         udelay(1);
 199  }
 200
 201 +static inline void
 202 +clkdev_add_sys(const char *dev, unsigned int module,
 203 +                               unsigned int bits)
 204 +{
 205 +       struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
 206 +
 207 +       clk->cl.dev_id = dev;
 208 +       clk->cl.con_id = NULL;
 209 +       clk->cl.clk = clk;
 210 +       clk->module = module;
 211 +       clk->activate = ltq_sysctl_activate;
 212 +       clk->deactivate = ltq_sysctl_deactivate;
 213 +       clk->enable = ltq_sysctl_clken;
 214 +       clk->disable = ltq_sysctl_clkdis;
 215 +       clk->reboot = ltq_sysctl_reboot;
 216 +       clkdev_add(&clk->cl);
 217 +}
 218 +
 219  void __init
 220  ltq_soc_init(void)
 221  {
 222 @@ -180,4 +192,19 @@ ltq_soc_init(void)
 223         ltq_ebu_membase = ltq_remap_resource(&ltq_ebu_res);
 224
 225         ltq_gpe_enable();
 226 +
 227 +       /* get our 3 static rates for cpu, fpi and io clocks */
 228 +       if (ltq_sys1_r32(LTQ_SYS1_CPU0CC) & LTQ_CPU0CC_CPUDIV)
 229 +               clkdev_add_static(CLOCK_200M, CLOCK_100M, CLOCK_200M);
 230 +       else
 231 +               clkdev_add_static(CLOCK_400M, CLOCK_100M, CLOCK_200M);
 232 +
 233 +       /* add our clock domains */
 234 +       clkdev_add_sys("falcon_gpio.0", SYSCTL_SYSETH, ACTS_PADCTRL0 | ACTS_P0);
 235 +       clkdev_add_sys("falcon_gpio.1", SYSCTL_SYS1, ACTS_PADCTRL1 | ACTS_P1);
 236 +       clkdev_add_sys("falcon_gpio.2", SYSCTL_SYSETH, ACTS_PADCTRL2 | ACTS_P2);
 237 +       clkdev_add_sys("falcon_gpio.3", SYSCTL_SYS1, ACTS_PADCTRL3 | ACTS_P3);
 238 +       clkdev_add_sys("falcon_gpio.4", SYSCTL_SYS1, ACTS_PADCTRL4 | ACTS_P4);
 239 +       clkdev_add_sys("ltq_asc.1", SYSCTL_SYS1, ACTS_ASC1_ACT);
 240 +       clkdev_add_sys("falcon_i2c", SYSCTL_SYS1, ACTS_I2C_ACT);
 241  }
 242 --
 243 1.7.7.1
 244