605063fc23aae27ae8e179453d48514d738a48b5
[openwrt/svn-archive/archive.git] / target / linux / lantiq / patches-3.3 / 0031-MIPS-lantiq-unify-xway-prom-code.patch
1 From 707d76cc9dc4ddfcea280b91df83bd726407518a Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 8 Mar 2012 11:44:55 +0100
4 Subject: [PATCH 31/70] MIPS: lantiq: unify xway prom code
5
6 The xway prom-ase.c and prom-xway.c files are redundant. Unify the 2 files.
7
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 ---
10 arch/mips/lantiq/xway/Makefile | 5 +--
11 arch/mips/lantiq/xway/Makefile.rej | 11 -----
12 arch/mips/lantiq/xway/prom-ase.c | 48 ----------------------
13 arch/mips/lantiq/xway/prom-xway.c | 64 -----------------------------
14 arch/mips/lantiq/xway/prom.c | 79 ++++++++++++++++++++++++++++++++++++
15 5 files changed, 80 insertions(+), 127 deletions(-)
16 delete mode 100644 arch/mips/lantiq/xway/Makefile.rej
17 delete mode 100644 arch/mips/lantiq/xway/prom-ase.c
18 delete mode 100644 arch/mips/lantiq/xway/prom-xway.c
19 create mode 100644 arch/mips/lantiq/xway/prom.c
20
21 --- a/arch/mips/lantiq/xway/Makefile
22 +++ b/arch/mips/lantiq/xway/Makefile
23 @@ -1,7 +1,4 @@
24 -obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o
25 -
26 -obj-$(CONFIG_SOC_XWAY) += prom-xway.o
27 -obj-$(CONFIG_SOC_AMAZON_SE) += prom-ase.o
28 +obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o prom.o
29
30 obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
31 obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o
32 --- a/arch/mips/lantiq/xway/Makefile.rej
33 +++ /dev/null
34 @@ -1,11 +0,0 @@
35 ---- arch/mips/lantiq/xway/Makefile
36 -+++ arch/mips/lantiq/xway/Makefile
37 -@@ -1,7 +1,4 @@
38 --obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o
39 --
40 --obj-$(CONFIG_SOC_XWAY) += prom-xway.o
41 --obj-$(CONFIG_SOC_AMAZON_SE) += prom-ase.o
42 -+obj-y := prom.o sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o
43 -
44 - obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
45 - obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o
46 --- a/arch/mips/lantiq/xway/prom-ase.c
47 +++ /dev/null
48 @@ -1,48 +0,0 @@
49 -/*
50 - * This program is free software; you can redistribute it and/or modify it
51 - * under the terms of the GNU General Public License version 2 as published
52 - * by the Free Software Foundation.
53 - *
54 - * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
55 - */
56 -
57 -#include <linux/export.h>
58 -#include <linux/clk.h>
59 -#include <asm/bootinfo.h>
60 -#include <asm/time.h>
61 -
62 -#include <lantiq_soc.h>
63 -
64 -#include "devices.h"
65 -#include "../prom.h"
66 -
67 -#define SOC_AMAZON_SE "Amazon_SE"
68 -
69 -#define PART_SHIFT 12
70 -#define PART_MASK 0x0FFFFFFF
71 -#define REV_SHIFT 28
72 -#define REV_MASK 0xF0000000
73 -
74 -void __init ltq_soc_detect(struct ltq_soc_info *i)
75 -{
76 - i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
77 - i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
78 - sprintf(i->rev_type, "1.%d", i->rev);
79 - switch (i->partnum) {
80 - case SOC_ID_AMAZON_SE:
81 - i->name = SOC_AMAZON_SE;
82 - i->type = SOC_TYPE_AMAZON_SE;
83 - break;
84 -
85 - default:
86 - unreachable();
87 - break;
88 - }
89 -}
90 -
91 -void __init ltq_soc_setup(void)
92 -{
93 - ltq_register_ase_asc();
94 - ltq_register_gpio();
95 - ltq_register_wdt();
96 -}
97 --- a/arch/mips/lantiq/xway/prom-xway.c
98 +++ /dev/null
99 @@ -1,64 +0,0 @@
100 -/*
101 - * This program is free software; you can redistribute it and/or modify it
102 - * under the terms of the GNU General Public License version 2 as published
103 - * by the Free Software Foundation.
104 - *
105 - * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
106 - */
107 -
108 -#include <linux/export.h>
109 -#include <linux/clk.h>
110 -#include <asm/bootinfo.h>
111 -#include <asm/time.h>
112 -
113 -#include <lantiq_soc.h>
114 -
115 -#include "devices.h"
116 -#include "../prom.h"
117 -
118 -#define SOC_DANUBE "Danube"
119 -#define SOC_TWINPASS "Twinpass"
120 -#define SOC_AR9 "AR9"
121 -
122 -#define PART_SHIFT 12
123 -#define PART_MASK 0x0FFFFFFF
124 -#define REV_SHIFT 28
125 -#define REV_MASK 0xF0000000
126 -
127 -void __init ltq_soc_detect(struct ltq_soc_info *i)
128 -{
129 - i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
130 - i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
131 - sprintf(i->rev_type, "1.%d", i->rev);
132 - switch (i->partnum) {
133 - case SOC_ID_DANUBE1:
134 - case SOC_ID_DANUBE2:
135 - i->name = SOC_DANUBE;
136 - i->type = SOC_TYPE_DANUBE;
137 - break;
138 -
139 - case SOC_ID_TWINPASS:
140 - i->name = SOC_TWINPASS;
141 - i->type = SOC_TYPE_DANUBE;
142 - break;
143 -
144 - case SOC_ID_ARX188:
145 - case SOC_ID_ARX168:
146 - case SOC_ID_ARX182:
147 - i->name = SOC_AR9;
148 - i->type = SOC_TYPE_AR9;
149 - break;
150 -
151 - default:
152 - unreachable();
153 - break;
154 - }
155 -}
156 -
157 -void __init ltq_soc_setup(void)
158 -{
159 - ltq_register_asc(0);
160 - ltq_register_asc(1);
161 - ltq_register_gpio();
162 - ltq_register_wdt();
163 -}
164 --- /dev/null
165 +++ b/arch/mips/lantiq/xway/prom.c
166 @@ -0,0 +1,79 @@
167 +/*
168 + * This program is free software; you can redistribute it and/or modify it
169 + * under the terms of the GNU General Public License version 2 as published
170 + * by the Free Software Foundation.
171 + *
172 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
173 + */
174 +
175 +#include <linux/export.h>
176 +#include <linux/clk.h>
177 +#include <asm/bootinfo.h>
178 +#include <asm/time.h>
179 +
180 +#include <lantiq_soc.h>
181 +
182 +#include "../prom.h"
183 +#include "devices.h"
184 +
185 +#define SOC_DANUBE "Danube"
186 +#define SOC_TWINPASS "Twinpass"
187 +#define SOC_AR9 "AR9"
188 +#define SOC_VR9 "VR9"
189 +
190 +#define PART_SHIFT 12
191 +#define PART_MASK 0x0FFFFFFF
192 +#define REV_SHIFT 28
193 +#define REV_MASK 0xF0000000
194 +
195 +#define SOC_AMAZON_SE "Amazon_SE"
196 +
197 +void __init ltq_soc_detect(struct ltq_soc_info *i)
198 +{
199 + i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
200 + i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
201 + sprintf(i->rev_type, "1.%d", i->rev);
202 + switch (i->partnum) {
203 + case SOC_ID_DANUBE1:
204 + case SOC_ID_DANUBE2:
205 + i->name = SOC_DANUBE;
206 + i->type = SOC_TYPE_DANUBE;
207 + break;
208 +
209 + case SOC_ID_TWINPASS:
210 + i->name = SOC_TWINPASS;
211 + i->type = SOC_TYPE_DANUBE;
212 + break;
213 +
214 + case SOC_ID_ARX188:
215 + case SOC_ID_ARX168:
216 + case SOC_ID_ARX182:
217 + i->name = SOC_AR9;
218 + i->type = SOC_TYPE_AR9;
219 + break;
220 +
221 + case SOC_ID_AMAZON_SE:
222 + i->name = SOC_AMAZON_SE;
223 + i->type = SOC_TYPE_AMAZON_SE;
224 +#ifdef CONFIG_PCI
225 + panic("ase is only supported for non pci kernels");
226 +#endif
227 + break;
228 +
229 + default:
230 + unreachable();
231 + break;
232 + }
233 +}
234 +
235 +void __init ltq_soc_setup(void)
236 +{
237 + if (ltq_is_ase()) {
238 + ltq_register_ase_asc();
239 + } else {
240 + ltq_register_asc(0);
241 + ltq_register_asc(1);
242 + }
243 + ltq_register_gpio();
244 + ltq_register_wdt();
245 +}