target/linux/lantiq/patches/100-board.patch

   1 --- a/arch/mips/Kconfig
   2 +++ b/arch/mips/Kconfig
   3 @@ -139,6 +139,9 @@ config MACH_DECSTATION
   4
   5           otherwise choose R3000.
   6
   7 +config LANTIQ
   8 +       bool "Lantiq MIPS"
   9 +
  10  config MACH_JAZZ
  11         bool "Jazz family of machines"
  12         select ARC
  13 @@ -693,6 +696,7 @@ source "arch/mips/txx9/Kconfig"
  14  source "arch/mips/vr41xx/Kconfig"
  15  source "arch/mips/cavium-octeon/Kconfig"
  16  source "arch/mips/loongson/Kconfig"
  17 +source "arch/mips/lantiq/Kconfig"
  18
  19  endmenu
  20
  21 --- a/arch/mips/Makefile
  22 +++ b/arch/mips/Makefile
  23 @@ -317,6 +317,17 @@ cflags-$(CONFIG_MIPS_COBALT)       += -I$(srct
  24  load-$(CONFIG_MIPS_COBALT)     += 0xffffffff80080000
  25
  26  #
  27 +# Lantiq
  28 +#
  29 +load-$(CONFIG_LANTIQ) += 0xffffffff80002000
  30 +core-$(CONFIG_LANTIQ) += arch/mips/lantiq/
  31 +cflags-$(CONFIG_LANTIQ)   += -I$(srctree)/arch/mips/include/asm/mach-lantiq
  32 +core-$(CONFIG_SOC_LANTIQ_FALCON) += arch/mips/lantiq/falcon/
  33 +cflags-$(CONFIG_SOC_LANTIQ_FALCON)   += -I$(srctree)/arch/mips/include/asm/mach-lantiq/falcon
  34 +core-$(CONFIG_SOC_LANTIQ_XWAY) += arch/mips/lantiq/xway/
  35 +cflags-$(CONFIG_SOC_LANTIQ_XWAY)   += -I$(srctree)/arch/mips/include/asm/mach-lantiq/xway
  36 +
  37 +#
  38  # DECstation family
  39  #
  40  core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
  41 --- /dev/null
  42 +++ b/arch/mips/lantiq/Kconfig
  43 @@ -0,0 +1,36 @@
  44 +if LANTIQ
  45 +
  46 +config SOC_LANTIQ
  47 +       bool
  48 +       select DMA_NONCOHERENT
  49 +       select IRQ_CPU
  50 +       select CEVT_R4K
  51 +       select CSRC_R4K
  52 +       select SYS_HAS_CPU_MIPS32_R1
  53 +       select SYS_HAS_CPU_MIPS32_R2
  54 +       select SYS_SUPPORTS_BIG_ENDIAN
  55 +       select SYS_SUPPORTS_32BIT_KERNEL
  56 +       select SYS_SUPPORTS_MULTITHREADING
  57 +       select SYS_HAS_EARLY_PRINTK
  58 +       select HW_HAS_PCI
  59 +       select ARCH_REQUIRE_GPIOLIB
  60 +       select SWAP_IO_SPACE
  61 +       select MIPS_MACHINE
  62 +
  63 +choice
  64 +       prompt "SoC Type"
  65 +       default SOC_LANTIQ_XWAY
  66 +
  67 +#config SOC_LANTIQ_FALCON
  68 +#      bool "FALCON"
  69 +#      select SOC_LANTIQ
  70 +
  71 +config SOC_LANTIQ_XWAY
  72 +       bool "XWAY"
  73 +       select SOC_LANTIQ
  74 +endchoice
  75 +
  76 +#source "arch/mips/lantiq/falcon/Kconfig"
  77 +source "arch/mips/lantiq/xway/Kconfig"
  78 +
  79 +endif
  80 --- /dev/null
  81 +++ b/arch/mips/lantiq/Makefile
  82 @@ -0,0 +1,2 @@
  83 +obj-y := irq.o setup.o clk.o prom.o
  84 +obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
  85 --- /dev/null
  86 +++ b/arch/mips/lantiq/setup.c
  87 @@ -0,0 +1,47 @@
  88 +/*
  89 + *  This program is free software; you can redistribute it and/or modify it
  90 + *  under the terms of the GNU General Public License version 2 as published
  91 + *  by the Free Software Foundation.
  92 + *
  93 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  94 + */
  95 +
  96 +#include <linux/kernel.h>
  97 +#include <linux/module.h>
  98 +#include <linux/io.h>
  99 +#include <linux/ioport.h>
 100 +
 101 +#include <lantiq.h>
 102 +#include <lantiq_regs.h>
 103 +
 104 +void __init
 105 +plat_mem_setup(void)
 106 +{
 107 +       /* assume 16M as default */
 108 +       int memsize = 16;
 109 +       char **envp = (char **) KSEG1ADDR(fw_arg2);
 110 +       u32 status;
 111 +
 112 +       /* make sure to have no "reverse endian" for user mode! */
 113 +       status = read_c0_status();
 114 +       status &= (~(1<<25));
 115 +       write_c0_status(status);
 116 +
 117 +       ioport_resource.start = IOPORT_RESOURCE_START;
 118 +       ioport_resource.end = IOPORT_RESOURCE_END;
 119 +       iomem_resource.start = IOMEM_RESOURCE_START;
 120 +       iomem_resource.end = IOMEM_RESOURCE_END;
 121 +
 122 +       while (*envp)
 123 +       {
 124 +               char *e = (char *)KSEG1ADDR(*envp);
 125 +               if (!strncmp(e, "memsize=", 8))
 126 +               {
 127 +                       e += 8;
 128 +                       memsize = simple_strtoul(e, NULL, 10);
 129 +               }
 130 +               envp++;
 131 +       }
 132 +       memsize *= 1024 * 1024;
 133 +       add_memory_region(0x00000000, memsize, BOOT_MEM_RAM);
 134 +}
 135 --- /dev/null
 136 +++ b/arch/mips/lantiq/clk.c
 137 @@ -0,0 +1,141 @@
 138 +/*
 139 + *  This program is free software; you can redistribute it and/or modify it
 140 + *  under the terms of the GNU General Public License version 2 as published
 141 + *  by the Free Software Foundation.
 142 + *
 143 + * Copyright (C) 2010 Thomas Langer, Lantiq Deutschland
 144 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 145 + */
 146 +
 147 +#include <linux/io.h>
 148 +#include <linux/module.h>
 149 +#include <linux/init.h>
 150 +#include <linux/kernel.h>
 151 +#include <linux/types.h>
 152 +#include <linux/clk.h>
 153 +#include <linux/err.h>
 154 +#include <linux/list.h>
 155 +
 156 +#include <asm/time.h>
 157 +#include <asm/irq.h>
 158 +#include <asm/div64.h>
 159 +
 160 +#include <lantiq.h>
 161 +#ifdef CONFIG_SOC_LANTIQ_XWAY
 162 +#include <xway.h>
 163 +#endif
 164 +
 165 +extern unsigned long lq_get_cpu_hz(void);
 166 +extern unsigned long lq_get_fpi_hz(void);
 167 +extern unsigned long lq_get_io_region_clock(void);
 168 +
 169 +struct clk {
 170 +       const char *name;
 171 +       unsigned long rate;
 172 +       unsigned long (*get_rate) (void);
 173 +};
 174 +
 175 +static struct clk *cpu_clk = 0;
 176 +static int cpu_clk_cnt = 0;
 177 +
 178 +static unsigned int r4k_offset;
 179 +static unsigned int r4k_cur;
 180 +
 181 +static struct clk cpu_clk_generic[] = {
 182 +       {
 183 +               .name = "cpu",
 184 +               .get_rate = lq_get_cpu_hz,
 185 +       }, {
 186 +               .name = "fpi",
 187 +               .get_rate = lq_get_fpi_hz,
 188 +       }, {
 189 +               .name = "io",
 190 +               .get_rate = lq_get_io_region_clock,
 191 +       },
 192 +};
 193 +
 194 +void
 195 +clk_init(void)
 196 +{
 197 +       int i;
 198 +       cpu_clk = cpu_clk_generic;
 199 +       cpu_clk_cnt = ARRAY_SIZE(cpu_clk_generic);
 200 +       for(i = 0; i < cpu_clk_cnt; i++)
 201 +               printk("%s: %ld\n", cpu_clk[i].name, clk_get_rate(&cpu_clk[i]));
 202 +}
 203 +
 204 +static inline int
 205 +clk_good(struct clk *clk)
 206 +{
 207 +       return clk && !IS_ERR(clk);
 208 +}
 209 +
 210 +unsigned long
 211 +clk_get_rate(struct clk *clk)
 212 +{
 213 +       if (unlikely(!clk_good(clk)))
 214 +               return 0;
 215 +
 216 +       if (clk->rate != 0)
 217 +               return clk->rate;
 218 +
 219 +       if (clk->get_rate != NULL)
 220 +               return clk->get_rate();
 221 +
 222 +       return 0;
 223 +}
 224 +EXPORT_SYMBOL(clk_get_rate);
 225 +
 226 +struct clk*
 227 +clk_get(struct device *dev, const char *id)
 228 +{
 229 +       int i;
 230 +       for(i = 0; i < cpu_clk_cnt; i++)
 231 +               if (!strcmp(id, cpu_clk[i].name))
 232 +                       return &cpu_clk[i];
 233 +       BUG();
 234 +       return ERR_PTR(-ENOENT);
 235 +}
 236 +EXPORT_SYMBOL(clk_get);
 237 +
 238 +void
 239 +clk_put(struct clk *clk)
 240 +{
 241 +       /* not used */
 242 +}
 243 +EXPORT_SYMBOL(clk_put);
 244 +
 245 +static inline u32
 246 +lq_get_counter_resolution(void)
 247 +{
 248 +       u32 res;
 249 +       __asm__ __volatile__(
 250 +               ".set   push\n"
 251 +               ".set   mips32r2\n"
 252 +               ".set   noreorder\n"
 253 +               "rdhwr  %0, $3\n"
 254 +               "ehb\n"
 255 +               ".set pop\n"
 256 +               : "=&r" (res)
 257 +               : /* no input */
 258 +               : "memory");
 259 +       instruction_hazard();
 260 +       return res;
 261 +}
 262 +
 263 +void __init
 264 +plat_time_init(void)
 265 +{
 266 +       struct clk *clk = clk_get(0, "cpu");
 267 +       mips_hpt_frequency = clk_get_rate(clk) / lq_get_counter_resolution();
 268 +       r4k_cur = (read_c0_count() + r4k_offset);
 269 +       write_c0_compare(r4k_cur);
 270 +
 271 +#ifdef CONFIG_SOC_LANTIQ_XWAY
 272 +#define LQ_GPTU_GPT_CLC                        ((u32 *)(LQ_GPTU_BASE_ADDR + 0x0000))
 273 +       lq_pmu_enable(PMU_GPT);
 274 +       lq_pmu_enable(PMU_FPI);
 275 +
 276 +       lq_w32(0x100, LQ_GPTU_GPT_CLC);
 277 +#endif
 278 +}
 279 --- /dev/null
 280 +++ b/arch/mips/lantiq/prom.c
 281 @@ -0,0 +1,118 @@
 282 +/*
 283 + *  This program is free software; you can redistribute it and/or modify it
 284 + *  under the terms of the GNU General Public License version 2 as published
 285 + *  by the Free Software Foundation.
 286 + *
 287 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 288 + */
 289 +
 290 +#include <linux/module.h>
 291 +#include <linux/clk.h>
 292 +#include <asm/bootinfo.h>
 293 +#include <asm/time.h>
 294 +
 295 +#include <lantiq.h>
 296 +
 297 +#include "prom.h"
 298 +
 299 +static struct lq_soc_info soc_info;
 300 +
 301 +/* for Multithreading (APRP) on MIPS34K */
 302 +unsigned long physical_memsize;
 303 +
 304 +/* all access to the ebu must be locked */
 305 +DEFINE_SPINLOCK(ebu_lock);
 306 +EXPORT_SYMBOL_GPL(ebu_lock);
 307 +
 308 +extern void clk_init(void);
 309 +
 310 +unsigned int
 311 +lq_get_cpu_ver(void)
 312 +{
 313 +       return soc_info.rev;
 314 +}
 315 +EXPORT_SYMBOL(lq_get_cpu_ver);
 316 +
 317 +unsigned int
 318 +lq_get_soc_type(void)
 319 +{
 320 +       return soc_info.type;
 321 +}
 322 +EXPORT_SYMBOL(lq_get_soc_type);
 323 +
 324 +const char*
 325 +get_system_type(void)
 326 +{
 327 +       return soc_info.sys_type;
 328 +}
 329 +
 330 +void
 331 +prom_free_prom_memory(void)
 332 +{
 333 +}
 334 +
 335 +#ifdef CONFIG_IMAGE_CMDLINE_HACK
 336 +extern char __image_cmdline[];
 337 +
 338 +static void __init
 339 +prom_init_image_cmdline(void)
 340 +{
 341 +       char *p = __image_cmdline;
 342 +       int replace = 0;
 343 +
 344 +       if (*p == '-') {
 345 +               replace = 1;
 346 +               p++;
 347 +       }
 348 +
 349 +       if (*p == '\0')
 350 +               return;
 351 +
 352 +       if (replace) {
 353 +               strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline));
 354 +       } else {
 355 +               strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
 356 +               strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
 357 +       }
 358 +}
 359 +#else
 360 +static void __init prom_init_image_cmdline(void) { return; }
 361 +#endif
 362 +
 363 +static void __init
 364 +prom_init_cmdline(void)
 365 +{
 366 +       int argc = fw_arg0;
 367 +       char **argv = (char**)KSEG1ADDR(fw_arg1);
 368 +       int i;
 369 +
 370 +       arcs_cmdline[0] = '\0';
 371 +       if(argc)
 372 +               for (i = 1; i < argc; i++)
 373 +               {
 374 +                       strlcat(arcs_cmdline, (char*)KSEG1ADDR(argv[i]), COMMAND_LINE_SIZE);
 375 +                       if(i + 1 != argc)
 376 +                               strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
 377 +               }
 378 +
 379 +       if (!*arcs_cmdline)
 380 +               strcpy(&(arcs_cmdline[0]),
 381 +                       "console=ttyS1,115200 rootfstype=squashfs,jffs2");
 382 +       prom_init_image_cmdline();
 383 +}
 384 +
 385 +void __init
 386 +prom_init(void)
 387 +{
 388 +       struct clk *clk;
 389 +       lq_soc_detect(&soc_info);
 390 +
 391 +       clk_init();
 392 +       clk = clk_get(0, "cpu");
 393 +       snprintf(soc_info.sys_type, LQ_SYS_TYPE_LEN - 1, "%s rev1.%d %ldMhz",
 394 +               soc_info.name, soc_info.rev, clk_get_rate(clk) / 1000000);
 395 +       soc_info.sys_type[LQ_SYS_TYPE_LEN - 1] = '\0';
 396 +       printk("SoC: %s\n", soc_info.sys_type);
 397 +
 398 +       prom_init_cmdline();
 399 +}
 400 --- /dev/null
 401 +++ b/arch/mips/lantiq/prom.h
 402 @@ -0,0 +1,24 @@
 403 +/*
 404 + *  This program is free software; you can redistribute it and/or modify it
 405 + *  under the terms of the GNU General Public License version 2 as published
 406 + *  by the Free Software Foundation.
 407 + *
 408 + * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 409 + */
 410 +
 411 +#ifndef _LQ_PROM_H__
 412 +#define _LQ_PROM_H__
 413 +
 414 +#define LQ_SYS_TYPE_LEN        0x100
 415 +
 416 +struct lq_soc_info {
 417 +       unsigned char *name;
 418 +       unsigned int rev;
 419 +       unsigned int partnum;
 420 +       unsigned int type;
 421 +       unsigned char sys_type[LQ_SYS_TYPE_LEN];
 422 +};
 423 +
 424 +void lq_soc_detect(struct lq_soc_info *i);
 425 +
 426 +#endif