e6df7f6408d34b56516626dd3c3b212c99af0c26
[openwrt/svn-archive/archive.git] / target / linux / magicbox / files / arch / ppc / platforms / 4xx / magicbox.c
1 /*
2 * Support for IBM PPC 405EP-based MagicBox board
3 * Copyright (C) 2006 Karol Lewandowski
4 *
5 * Heavily based on bubinga.c
6 *
7 * Author: SAW (IBM), derived from walnut.c.
8 * Maintained by MontaVista Software <source@mvista.com>
9 *
10 * 2003 (c) MontaVista Softare Inc. This file is licensed under the
11 * terms of the GNU General Public License version 2. This program is
12 * licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 */
15
16 #include <linux/init.h>
17 #include <linux/smp.h>
18 #include <linux/threads.h>
19 #include <linux/param.h>
20 #include <linux/string.h>
21 #include <linux/blkdev.h>
22 #include <linux/pci.h>
23 #include <linux/tty.h>
24 #include <linux/serial.h>
25 #include <linux/serial_core.h>
26 #include <linux/serial_8250.h>
27 #include <linux/platform_device.h>
28 #include <linux/mtd/partitions.h>
29 #include <linux/mtd/physmap.h>
30
31 #include <asm/system.h>
32 #include <asm/pci-bridge.h>
33 #include <asm/processor.h>
34 #include <asm/machdep.h>
35 #include <asm/page.h>
36 #include <asm/time.h>
37 #include <asm/io.h>
38 #include <asm/kgdb.h>
39 #include <asm/ocp.h>
40 #include <asm/ibm_ocp_pci.h>
41
42 #include <platforms/4xx/ibm405ep.h>
43
44 #undef DEBUG
45
46 #ifdef DEBUG
47 #define DBG(x...) printk(x)
48 #else
49 #define DBG(x...)
50 #endif
51
52 extern bd_t __res;
53
54 /* Some IRQs unique to the board
55 * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
56 */
57 int __init
58 ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
59 {
60 static char pci_irq_table[][4] =
61 /*
62 * PCI IDSEL/INTPIN->INTLINE
63 * A B C D
64 */
65 {
66 {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */
67 {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */
68 {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */
69 {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */
70 };
71
72 const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
73 return PCI_IRQ_TABLE_LOOKUP;
74 };
75
76 /* The serial clock for the chip is an internal clock determined by
77 * different clock speeds/dividers.
78 * Calculate the proper input baud rate and setup the serial driver.
79 */
80 static void __init
81 magicbox_early_serial_map(void)
82 {
83 u32 uart_div;
84 int uart_clock;
85 struct uart_port port;
86
87 /* Calculate the serial clock input frequency
88 *
89 * The base baud is the PLL OUTA (provided in the board info
90 * structure) divided by the external UART Divisor, divided
91 * by 16.
92 */
93 uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
94 uart_clock = __res.bi_procfreq / uart_div;
95
96 /* Setup serial port access */
97 memset(&port, 0, sizeof(port));
98 port.membase = (void*)ACTING_UART0_IO_BASE;
99 port.irq = ACTING_UART0_INT;
100 port.uartclk = uart_clock;
101 port.regshift = 0;
102 port.iotype = UPIO_MEM;
103 port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
104 port.line = 0;
105
106 if (early_serial_setup(&port) != 0) {
107 printk("Early serial init of port 0 failed\n");
108 }
109
110 port.membase = (void*)ACTING_UART1_IO_BASE;
111 port.irq = ACTING_UART1_INT;
112 port.line = 1;
113
114 if (early_serial_setup(&port) != 0) {
115 printk("Early serial init of port 1 failed\n");
116 }
117 }
118
119 void __init
120 bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
121 {
122 #ifdef CONFIG_PCI
123
124 unsigned int bar_response, bar;
125 /*
126 * Expected PCI mapping:
127 *
128 * PLB addr PCI memory addr
129 * --------------------- ---------------------
130 * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
131 * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
132 *
133 * PLB addr PCI io addr
134 * --------------------- ---------------------
135 * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
136 *
137 * The following code is simplified by assuming that the bootrom
138 * has been well behaved in following this mapping.
139 */
140
141 #ifdef DEBUG
142 int i;
143
144 printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
145 printk("PCI bridge regs before fixup \n");
146 for (i = 0; i <= 3; i++) {
147 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
148 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
149 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
150 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
151 }
152 printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
153 printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
154 printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
155 printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
156
157 #endif
158
159 /* added for IBM boot rom version 1.15 bios bar changes -AK */
160
161 /* Disable region first */
162 out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
163 /* PLB starting addr, PCI: 0x80000000 */
164 out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
165 /* PCI start addr, 0x80000000 */
166 out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
167 /* 512MB range of PLB to PCI */
168 out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
169 /* Enable no pre-fetch, enable region */
170 out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
171 (PPC405_PCI_UPPER_MEM -
172 PPC405_PCI_MEM_BASE)) | 0x01));
173
174 /* Disable region one */
175 out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
176 out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
177 out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
178 out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
179 out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
180 out_le32((void *) &(pcip->ptm1ms), 0x00000001);
181
182 /* Disable region two */
183 out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
184 out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
185 out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
186 out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
187 out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
188 out_le32((void *) &(pcip->ptm2ms), 0x00000000);
189 out_le32((void *) &(pcip->ptm2la), 0x00000000);
190
191 /* Zero config bars */
192 for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
193 early_write_config_dword(hose, hose->first_busno,
194 PCI_FUNC(hose->first_busno), bar,
195 0x00000000);
196 early_read_config_dword(hose, hose->first_busno,
197 PCI_FUNC(hose->first_busno), bar,
198 &bar_response);
199 DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
200 hose->first_busno, PCI_SLOT(hose->first_busno),
201 PCI_FUNC(hose->first_busno), bar, bar_response);
202 }
203 /* end workaround */
204
205 #ifdef DEBUG
206 printk("PCI bridge regs after fixup \n");
207 for (i = 0; i <= 3; i++) {
208 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
209 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
210 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
211 printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
212 }
213 printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
214 printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
215 printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
216 printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
217
218 #endif
219 #endif
220 }
221
222 static struct resource magicbox_flash_resource = {
223 .start = 0xffc00000,
224 .end = 0xffffffffULL,
225 .flags = IORESOURCE_MEM,
226 };
227
228 static struct mtd_partition magicbox_flash_parts[] = {
229 {
230 .name = "linux",
231 .offset = 0x0,
232 .size = 0x3c0000,
233 },
234 {
235 .name = "rootfs",
236 .offset = 0x100000,
237 .size = 0x2c0000,
238 }
239 };
240
241 static struct physmap_flash_data magicbox_flash_data = {
242 .width = 2,
243 .parts = magicbox_flash_parts,
244 .nr_parts = ARRAY_SIZE(magicbox_flash_parts),
245 };
246
247 static struct platform_device magicbox_flash_device = {
248 .name = "physmap-flash",
249 .id = 0,
250 .dev = {
251 .platform_data = &magicbox_flash_data,
252 },
253 .num_resources = 1,
254 .resource = &magicbox_flash_resource,
255 };
256
257 static int magicbox_setup_flash(void)
258 {
259 platform_device_register(&magicbox_flash_device);
260
261 return 0;
262 };
263
264 arch_initcall (magicbox_setup_flash);
265
266 void __init
267 magicbox_setup_arch(void)
268 {
269 ppc4xx_setup_arch();
270
271 ibm_ocp_set_emac(0, 1);
272
273 magicbox_early_serial_map();
274
275 /* Identify the system */
276 printk("MagicBox port (C) 2005 Karol Lewandowski <kl@jasmine.eu.org>\n");
277 }
278
279 void __init
280 magicbox_map_io(void)
281 {
282 ppc4xx_map_io();
283 }
284
285 void __init
286 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
287 unsigned long r6, unsigned long r7)
288 {
289 ppc4xx_init(r3, r4, r5, r6, r7);
290
291 ppc_md.setup_arch = magicbox_setup_arch;
292 ppc_md.setup_io_mappings = magicbox_map_io;
293
294 #ifdef CONFIG_KGDB
295 ppc_md.early_serial_map = bubinga_early_serial_map;
296 #endif
297 }
298