[mcs814x] add Moschip MSC814x support
[openwrt/svn-archive/archive.git] / target / linux / mcs814x / files-3.3 / arch / arm / boot / dts / mcs8140.dtsi
1 /*
2 * mcs8140.dtsi - Device Tree Include file for Moschip MCS8140 family SoC
3 *
4 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
5 *
6 * Licensed under GPLv2.
7 */
8
9 /include/ "skeleton.dtsi"
10
11 / {
12 model = "Moschip MCS8140 family SoC";
13 compatible = "moschip,mcs8140";
14 interrupt-parent = <&intc>;
15
16 aliases {
17 serial0 = &uart0;
18 eth0 = &eth0;
19 };
20
21 cpus {
22 cpu@0 {
23 compatible = "arm,arm926ejs";
24 };
25 };
26
27 ahb {
28 compatible = "simple-bus";
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
33 vci {
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <1>;
37 ranges;
38
39 eth0: ethernet@40084000 {
40 //compatible = "moschip,mcs814x-eth";
41 compatible = "moschip,nuport-mac";
42 reg = <0x40084000 0xd8 // mac
43 0x40080000 0x58>; // dma channels
44 interrupts = <4 5 29>; /* tx, rx, link */
45 };
46
47 tso@40088000 {
48 reg = <0x40088000 0x1c>;
49 };
50
51 i2s@4008c000 {
52 compatible = "moschip,mcs814x-i2s";
53 reg = <0x4008c000 0x18>;
54 };
55
56 ipsec@40094000 {
57 compatible = "moschip,mcs814x-ipsec";
58 reg = <0x40094000 0x1d8>;
59 };
60
61 rng@4009c000 {
62 compatible = "moschip,mcs814x-rng";
63 reg = <0x4009c000 0x8>;
64 };
65
66 memc@400a8000 {
67 reg = <0x400a8000 0x58>;
68 };
69
70 list-proc@400ac0c0 {
71 reg = <0x400ac0c0 0x38>;
72 };
73
74 pci@400b0000 {
75 reg = <0x400b0000 0x44 // PCI master
76 0x400d8000 0xe4>; // EEPROM emulator
77 interrupts = <25>; // abort interrupt
78 status = "disabled";
79 #address-cells = <3>;
80 #size-cells = <2>;
81
82 ranges = <0x01000000 0 0x80000000 0x80000000 0 0x04000000 // IO
83 0x42000000 0 0x90000000 0x90000000 0 0x20000000 // non-prefetch
84 0x02000000 0 0xb0000000 0xb0000000 0 0x10000000>; // prefecth
85
86 #interrupt-cells = <1>;
87 interrupt-map-mask = <>;
88 interrupt-map = <0 0 0 1 &intc 22 0
89 0 0 0 2 &intc 23 0
90 0 0 0 3 &intc 24 0
91 0 0 0 4 &intc 26 0>;
92 };
93
94 gpio: gpio@400d0000 {
95 compatible = "moschip,mcs814x-gpio";
96 reg = <0x400d0000 0x670>;
97 #gpio-cells = <2>;
98 gpio-controller;
99 num-gpios = <20>;
100 };
101
102 eepio: gpio@400d4000 {
103 compatible = "moschip,mcs814x-gpio";
104 reg = <0x400d4000 0x470>;
105 #gpio-cells = <2>;
106 gpio-controller;
107 num-gpios = <4>;
108 };
109
110 uart0: serial@400dc000 {
111 compatible = "ns16550";
112 reg = <0x400dc000 0x20>;
113 clock-frequency = <50000000>;
114 reg-shift = <2>;
115 interrupts = <21>;
116 status = "okay";
117 };
118
119 intc: interrupt-controller@400e4000 {
120 #interrupt-cells = <1>;
121 compatible = "moschip,mcs814x-intc";
122 interrupt-controller;
123 interrupt-parent;
124 reg = <0x400e4000 0x48>;
125 };
126
127 m2m@400e8000 {
128 reg = <0x400e8000 0x24>;
129 };
130
131 eth-filters@400ec000 {
132 reg = <0x400ec000 0x80>;
133 };
134
135 timer: timer@400f800c {
136 compatible = "moschip,mcs814x-timer";
137 interrupts = <0>;
138 reg = <0x400f800c 0x8>;
139 };
140
141 watchdog@400f8014 {
142 compatible = "moschip,mcs814x-wdt";
143 reg = <0x400f8014 0x8>;
144 };
145
146 adc {
147 compatible = "simple-bus";
148 #address-cells = <2>;
149 #size-cells = <1>;
150 // 8 64MB chip-selects
151 ranges = <0 0 0x00000000 0x4000000 // sdram
152 1 0 0x04000000 0x4000000 // sdram
153 2 0 0x08000000 0x4000000 // reserved
154 3 0 0x0c000000 0x4000000 // flash/localbus
155 4 0 0x10000000 0x4000000 // flash/localbus
156 5 0 0x14000000 0x4000000 // flash/localbus
157 6 0 0x18000000 0x4000000 // flash/localbus
158 7 0 0x1c000000 0x4000000>; // flash/localbus
159
160 sdram: memory@0,0 {
161 reg = <0 0 0>;
162 };
163
164 nor: flash@7,0 {
165 reg = <7 0 0x4000000>;
166 compatible = "cfi-flash";
167 bank-width = <1>; // 8-bit external flash
168 #address-cells = <1>;
169 #size-cells = <1>;
170 };
171 };
172
173 usb0: ehci@400fc000 {
174 compatible = "moschip,mcs814x-ehci", "usb-ehci";
175 reg = <0x400fc000 0x74>;
176 interrupts = <2>;
177 };
178
179 usb1: ohci@400fd000 {
180 compatible = "moschip,mcs814x-ohci", "ohci-le";
181 reg = <0x400fd000 0x74>;
182 interrupts = <11>;
183 };
184
185 usb2: ohci@400fe000 {
186 compatible = "moschip,mcs814x-ohci", "ohci-le";
187 reg = <0x400fe000 0x74>;
188 interrupts = <12>;
189 };
190
191 usb3: otg@400ff000 {
192 compatible = "moschip,msc814x-otg", "usb-otg";
193 reg = <0x400ff000 0x1000>;
194 };
195 };
196
197 };
198 };