[mcs814x] remove platform specific initialization from ethernet driver
[openwrt/svn-archive/archive.git] / target / linux / mcs814x / files-3.3 / arch / arm / boot / dts / mcs8140.dtsi
1 /*
2 * mcs8140.dtsi - Device Tree Include file for Moschip MCS8140 family SoC
3 *
4 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
5 *
6 * Licensed under GPLv2.
7 */
8
9 /include/ "skeleton.dtsi"
10
11 / {
12 model = "Moschip MCS8140 family SoC";
13 compatible = "moschip,mcs8140";
14 interrupt-parent = <&intc>;
15
16 aliases {
17 serial0 = &uart0;
18 eth0 = &eth0;
19 };
20
21 cpus {
22 cpu@0 {
23 compatible = "arm,arm926ejs";
24 };
25 };
26
27 ahb {
28 compatible = "simple-bus";
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
33 vci {
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <1>;
37 ranges;
38
39 eth0: ethernet@40084000 {
40 compatible = "moschip,nuport-mac";
41 reg = <0x40084000 0xd8 // mac
42 0x40080000 0x58>; // dma channels
43 interrupts = <4 5 29>; /* tx, rx, link */
44 nuport-mac,buffer-shifting;
45 nuport-mac,link-activity = <0>;
46 };
47
48 tso@40088000 {
49 reg = <0x40088000 0x1c>;
50 };
51
52 i2s@4008c000 {
53 compatible = "moschip,mcs814x-i2s";
54 reg = <0x4008c000 0x18>;
55 };
56
57 ipsec@40094000 {
58 compatible = "moschip,mcs814x-ipsec";
59 reg = <0x40094000 0x1d8>;
60 };
61
62 rng@4009c000 {
63 compatible = "moschip,mcs814x-rng";
64 reg = <0x4009c000 0x8>;
65 };
66
67 memc@400a8000 {
68 reg = <0x400a8000 0x58>;
69 };
70
71 list-proc@400ac0c0 {
72 reg = <0x400ac0c0 0x38>;
73 };
74
75 pci@400b0000 {
76 reg = <0x400b0000 0x44 // PCI master
77 0x400d8000 0xe4>; // EEPROM emulator
78 interrupts = <25>; // abort interrupt
79 status = "disabled";
80 #address-cells = <3>;
81 #size-cells = <2>;
82
83 ranges = <0x01000000 0 0x80000000 0x80000000 0 0x04000000 // IO
84 0x42000000 0 0x90000000 0x90000000 0 0x20000000 // non-prefetch
85 0x02000000 0 0xb0000000 0xb0000000 0 0x10000000>; // prefecth
86
87 #interrupt-cells = <1>;
88 interrupt-map-mask = <>;
89 interrupt-map = <0 0 0 1 &intc 22 0
90 0 0 0 2 &intc 23 0
91 0 0 0 3 &intc 24 0
92 0 0 0 4 &intc 26 0>;
93 };
94
95 gpio: gpio@400d0000 {
96 compatible = "moschip,mcs814x-gpio";
97 reg = <0x400d0000 0x670>;
98 #gpio-cells = <2>;
99 gpio-controller;
100 num-gpios = <20>;
101 };
102
103 eepio: gpio@400d4000 {
104 compatible = "moschip,mcs814x-gpio";
105 reg = <0x400d4000 0x470>;
106 #gpio-cells = <2>;
107 gpio-controller;
108 num-gpios = <4>;
109 };
110
111 uart0: serial@400dc000 {
112 compatible = "ns16550";
113 reg = <0x400dc000 0x20>;
114 clock-frequency = <50000000>;
115 reg-shift = <2>;
116 interrupts = <21>;
117 status = "okay";
118 };
119
120 intc: interrupt-controller@400e4000 {
121 #interrupt-cells = <1>;
122 compatible = "moschip,mcs814x-intc";
123 interrupt-controller;
124 interrupt-parent;
125 reg = <0x400e4000 0x48>;
126 };
127
128 m2m@400e8000 {
129 reg = <0x400e8000 0x24>;
130 };
131
132 eth-filters@400ec000 {
133 reg = <0x400ec000 0x80>;
134 };
135
136 timer: timer@400f800c {
137 compatible = "moschip,mcs814x-timer";
138 interrupts = <0>;
139 reg = <0x400f800c 0x8>;
140 };
141
142 watchdog@400f8014 {
143 compatible = "moschip,mcs814x-wdt";
144 reg = <0x400f8014 0x8>;
145 };
146
147 adc {
148 compatible = "simple-bus";
149 #address-cells = <2>;
150 #size-cells = <1>;
151 // 8 64MB chip-selects
152 ranges = <0 0 0x00000000 0x4000000 // sdram
153 1 0 0x04000000 0x4000000 // sdram
154 2 0 0x08000000 0x4000000 // reserved
155 3 0 0x0c000000 0x4000000 // flash/localbus
156 4 0 0x10000000 0x4000000 // flash/localbus
157 5 0 0x14000000 0x4000000 // flash/localbus
158 6 0 0x18000000 0x4000000 // flash/localbus
159 7 0 0x1c000000 0x4000000>; // flash/localbus
160
161 sdram: memory@0,0 {
162 reg = <0 0 0>;
163 };
164
165 nor: flash@7,0 {
166 reg = <7 0 0x4000000>;
167 compatible = "cfi-flash";
168 bank-width = <1>; // 8-bit external flash
169 #address-cells = <1>;
170 #size-cells = <1>;
171 };
172 };
173
174 usb0: ehci@400fc000 {
175 compatible = "moschip,mcs814x-ehci", "usb-ehci";
176 reg = <0x400fc000 0x74>;
177 interrupts = <2>;
178 };
179
180 usb1: ohci@400fd000 {
181 compatible = "moschip,mcs814x-ohci", "ohci-le";
182 reg = <0x400fd000 0x74>;
183 interrupts = <11>;
184 };
185
186 usb2: ohci@400fe000 {
187 compatible = "moschip,mcs814x-ohci", "ohci-le";
188 reg = <0x400fe000 0x74>;
189 interrupts = <12>;
190 };
191
192 usb3: otg@400ff000 {
193 compatible = "moschip,msc814x-otg", "usb-otg";
194 reg = <0x400ff000 0x1000>;
195 };
196 };
197
198 };
199 };