cef67b8dec221341ee4fe46d664e3a38f3bba7d6
[openwrt/svn-archive/archive.git] / target / linux / mcs814x / files-3.3 / drivers / net / ethernet / mcs8140 / nuport_mac.c
1 /*
2 * Moschip MCS8140 Ethernet MAC driver
3 *
4 * Copyright (C) 2003, Moschip Semiconductors
5 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
6 *
7 * Licensed under GPLv2
8 */
9 #include <linux/module.h>
10 #include <linux/slab.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/ethtool.h>
17 #include <linux/mii.h>
18 #include <linux/io.h>
19 #include <linux/interrupt.h>
20 #include <linux/platform_device.h>
21 #include <linux/of.h>
22 #include <linux/irq.h>
23 #include <linux/err.h>
24 #include <linux/phy.h>
25 #include <linux/clk.h>
26 #include <linux/dma-mapping.h>
27
28 #include <asm/unaligned.h>
29 #include <asm/sizes.h>
30 #include <mach/hardware.h>
31
32 /* Hardware registers */
33 #define MAC_BASE_ADDR ((priv->mac_base))
34
35 #define CTRL_REG (MAC_BASE_ADDR)
36 #define MII_BUSY 0x00000001
37 #define MII_WRITE 0x00000002
38 #define MAC_ADDR_HIGH_REG (MAC_BASE_ADDR + 0x04)
39 #define MAC_ADDR_LOW_REG (MAC_BASE_ADDR + 0x08)
40 #define MII_ADDR_REG (MAC_BASE_ADDR + 0x14)
41 #define MII_DATA_REG (MAC_BASE_ADDR + 0x18)
42 /* Link interrupt registers */
43 #define LINK_INT_CSR (MAC_BASE_ADDR + 0xD0)
44 #define LINK_INT_POLL_TIME (MAC_BASE_ADDR + 0xD4)
45
46 #define DMA_CHAN_WIDTH 32
47 #define DMA_RX_CHAN 0
48 #define DMA_TX_CHAN 2
49
50 /* Receive DMA registers */
51 #define RX_DMA_BASE ((priv->dma_base) + \
52 (DMA_CHAN_WIDTH * DMA_RX_CHAN))
53 #define RX_BUFFER_ADDR (RX_DMA_BASE + 0x00)
54 #define RX_MAX_BYTES (RX_DMA_BASE + 0x04)
55 #define RX_ACT_BYTES (RX_DMA_BASE + 0x08)
56 #define RX_START_DMA (RX_DMA_BASE + 0x0C)
57 #define RX_DMA_ENH (RX_DMA_BASE + 0x14)
58
59 /* Transmit DMA registers */
60 #define TX_DMA_BASE ((priv->dma_base) + \
61 (DMA_CHAN_WIDTH * DMA_TX_CHAN))
62 #define TX_BUFFER_ADDR (TX_DMA_BASE + 0x00)
63 #define TX_PKT_BYTES (TX_DMA_BASE + 0x04)
64 #define TX_BYTES_SENT (TX_DMA_BASE + 0x08)
65 #define TX_START_DMA (TX_DMA_BASE + 0x0C)
66 #define TX_DMA_STATUS (TX_DMA_BASE + 0x10)
67 #define TX_DMA_ENH (TX_DMA_BASE + 0x14)
68
69 #define RX_ALLOC_SIZE SZ_2K
70 #define MAX_ETH_FRAME_SIZE 1536
71 #define RX_SKB_TAILROOM 128
72 #define RX_SKB_HEADROOM (RX_ALLOC_SIZE - \
73 (MAX_ETH_FRAME_SIZE + RX_SKB_TAILROOM) + 0)
74
75 /* WDT Late COL Lenght COL Type */
76 #define ERROR_FILTER_MASK ((1<<14) | (1<<15) | (1<<16) | (1<<17) | (0<<18) | \
77 /* MII Dribbling CRC Len/type Control */\
78 (1<<19) | (1<<20) | (1<<21) | (0<<24) | (1<<25) | \
79 /* Unsup Missed */\
80 (1<<26) | (0<<31))
81 #define TX_RING_SIZE 30
82 #define RX_RING_SIZE 30
83
84 static inline u32 nuport_mac_readl(void __iomem *reg)
85 {
86 return __raw_readl(reg);
87 }
88
89 static inline u8 nuport_mac_readb(void __iomem *reg)
90 {
91 return __raw_readb(reg);
92 }
93
94 static inline void nuport_mac_writel(u32 value, void __iomem *reg)
95 {
96 __raw_writel(value, reg);
97 }
98
99 static inline void nuport_mac_writeb(u8 value, void __iomem *reg)
100 {
101 __raw_writel(value, reg);
102 }
103
104 /* MAC private data */
105 struct nuport_mac_priv {
106 spinlock_t lock;
107
108 void __iomem *mac_base;
109 void __iomem *dma_base;
110
111 int rx_irq;
112 int tx_irq;
113 int link_irq;
114 struct clk *emac_clk;
115 struct clk *ephy_clk;
116
117 /* Transmit buffers */
118 struct sk_buff *tx_skb[TX_RING_SIZE];
119 unsigned int valid_txskb[TX_RING_SIZE];
120 unsigned int cur_tx;
121 unsigned int dma_tx;
122 unsigned int tx_full;
123
124 /* Receive buffers */
125 struct sk_buff *rx_skb[RX_RING_SIZE];
126 unsigned int irq_rxskb[RX_RING_SIZE];
127 int pkt_len[RX_RING_SIZE];
128 unsigned int cur_rx;
129 unsigned int dma_rx;
130 unsigned int rx_full;
131
132 unsigned int first_pkt;
133
134 /* Private data */
135 struct napi_struct napi;
136 struct net_device *dev;
137 struct platform_device *pdev;
138 struct mii_bus *mii_bus;
139 struct phy_device *phydev;
140 int old_link;
141 int old_duplex;
142 u32 msg_level;
143 };
144
145 static inline int nuport_mac_mii_busy_wait(struct nuport_mac_priv *priv)
146 {
147 unsigned long curr;
148 unsigned long finish = jiffies + 3 * HZ;
149
150 do {
151 curr = jiffies;
152 if (!(nuport_mac_readl(MII_ADDR_REG) & MII_BUSY))
153 return 0;
154 cpu_relax();
155 } while (!time_after_eq(curr, finish));
156
157 return -EBUSY;
158 }
159
160 /* Read from PHY registers */
161 static int nuport_mac_mii_read(struct mii_bus *bus,
162 int mii_id, int regnum)
163 {
164 struct net_device *dev = bus->priv;
165 struct nuport_mac_priv *priv = netdev_priv(dev);
166 int ret;
167 u32 val = 0;
168
169 ret = nuport_mac_mii_busy_wait(priv);
170 if (ret)
171 return ret;
172
173 val |= (mii_id << 11) | (regnum << 6) | MII_BUSY;
174 nuport_mac_writel(val, MII_ADDR_REG);
175 ret = nuport_mac_mii_busy_wait(priv);
176 if (ret)
177 return ret;
178
179 return nuport_mac_readl(MII_DATA_REG);
180 }
181
182 static int nuport_mac_mii_write(struct mii_bus *bus, int mii_id,
183 int regnum, u16 value)
184 {
185 struct net_device *dev = bus->priv;
186 struct nuport_mac_priv *priv = netdev_priv(dev);
187 int ret;
188 u32 val = 0;
189
190 ret = nuport_mac_mii_busy_wait(priv);
191 if (ret)
192 return ret;
193
194 val |= (mii_id << 11) | (regnum << 6) | MII_BUSY | MII_WRITE;
195 nuport_mac_writel(value, MII_DATA_REG);
196 nuport_mac_writel(val, MII_ADDR_REG);
197
198 return nuport_mac_mii_busy_wait(priv);
199 }
200
201 static int nuport_mac_mii_reset(struct mii_bus *bus)
202 {
203 return 0;
204 }
205
206 static int nuport_mac_start_tx_dma(struct nuport_mac_priv *priv,
207 struct sk_buff *skb)
208 {
209 dma_addr_t p;
210 u32 reg;
211 unsigned int timeout = 2048;
212
213 while (timeout--) {
214 reg = nuport_mac_readl(TX_START_DMA);
215 if (!(reg & 0x01)) {
216 netdev_dbg(priv->dev, "dma ready\n");
217 break;
218 }
219 cpu_relax();
220 }
221
222 if (!timeout)
223 return -EBUSY;
224
225 p = dma_map_single(&priv->pdev->dev, skb->data,
226 skb->len, DMA_TO_DEVICE);
227
228 /* enable enhanced mode */
229 nuport_mac_writel(0x01, TX_DMA_ENH);
230 nuport_mac_writel(p, TX_BUFFER_ADDR);
231 nuport_mac_writel((skb->len) - 1, TX_PKT_BYTES);
232 wmb();
233 nuport_mac_writel(0x0D, TX_START_DMA);
234
235 return 0;
236 }
237
238 static void nuport_mac_reset_tx_dma(struct nuport_mac_priv *priv)
239 {
240 u32 reg;
241
242 reg = nuport_mac_readl(TX_START_DMA);
243 reg |= (1 << 24);
244 nuport_mac_writel(reg, TX_START_DMA);
245 }
246
247 static int nuport_mac_start_rx_dma(struct nuport_mac_priv *priv,
248 struct sk_buff *skb)
249 {
250 dma_addr_t p;
251 u32 reg;
252 unsigned int timeout = 2048;
253
254 while (timeout--) {
255 reg = nuport_mac_readl(RX_START_DMA);
256 if (!(reg & 0x01)) {
257 netdev_dbg(priv->dev, "dma ready\n");
258 break;
259 }
260 cpu_relax();
261 }
262
263 if (!timeout)
264 return -EBUSY;
265
266 p = dma_map_single(&priv->pdev->dev, skb->data,
267 RX_ALLOC_SIZE, DMA_FROM_DEVICE);
268
269 nuport_mac_writel(p, RX_BUFFER_ADDR);
270 wmb();
271 nuport_mac_writel(0x01, RX_START_DMA);
272
273 return 0;
274 }
275
276 static void nuport_mac_reset_rx_dma(struct nuport_mac_priv *priv)
277 {
278 u32 reg;
279
280 reg = nuport_mac_readl(RX_START_DMA);
281 reg |= (1 << 1);
282 nuport_mac_writel(reg, RX_START_DMA);
283 }
284
285 /* I suppose this might do something, but I am not sure actually */
286 static void nuport_mac_disable_rx_dma(struct nuport_mac_priv *priv)
287 {
288 u32 reg;
289
290 reg = nuport_mac_readl(RX_DMA_ENH);
291 reg &= ~(1 << 1);
292 nuport_mac_writel(reg, RX_DMA_ENH);
293 }
294
295 static void nuport_mac_enable_rx_dma(struct nuport_mac_priv *priv)
296 {
297 u32 reg;
298
299 reg = nuport_mac_readl(RX_DMA_ENH);
300 reg |= (1 << 1);
301 nuport_mac_writel(reg, RX_DMA_ENH);
302 }
303
304 /* Add packets to the transmit queue */
305 static int nuport_mac_start_xmit(struct sk_buff *skb, struct net_device *dev)
306 {
307 unsigned long flags;
308 struct nuport_mac_priv *priv = netdev_priv(dev);
309 int ret;
310
311 if (netif_queue_stopped(dev)) {
312 netdev_warn(dev, "netif queue was stopped, restarting\n");
313 netif_start_queue(dev);
314 }
315
316 spin_lock_irqsave(&priv->lock, flags);
317 if (priv->first_pkt) {
318 ret = nuport_mac_start_tx_dma(priv, skb);
319 if (ret) {
320 netif_stop_queue(dev);
321 spin_unlock_irqrestore(&priv->lock, flags);
322 netdev_err(dev, "transmit path busy\n");
323 return NETDEV_TX_BUSY;
324 }
325 priv->first_pkt = 0;
326 }
327
328 priv->tx_skb[priv->cur_tx] = skb;
329 dev->stats.tx_bytes += skb->len;
330 dev->stats.tx_packets++;
331 priv->valid_txskb[priv->cur_tx] = 1;
332 priv->cur_tx++;
333 dev->trans_start = jiffies;
334
335 if (priv->cur_tx >= TX_RING_SIZE)
336 priv->cur_tx = 0;
337
338 spin_unlock_irqrestore(&priv->lock, flags);
339
340 if (priv->valid_txskb[priv->cur_tx]) {
341 priv->tx_full = 1;
342 netdev_err(dev, "stopping queue\n");
343 netif_stop_queue(dev);
344 }
345
346 return NETDEV_TX_OK;
347 }
348
349 static void nuport_mac_adjust_link(struct net_device *dev)
350 {
351 struct nuport_mac_priv *priv = netdev_priv(dev);
352 struct phy_device *phydev = priv->phydev;
353 unsigned int status_changed = 0;
354 u32 reg;
355
356 BUG_ON(!phydev);
357
358 if (priv->old_link != phydev->link) {
359 status_changed = 1;
360 priv->old_link = phydev->link;
361 }
362
363 if (phydev->link & (priv->old_duplex != phydev->duplex)) {
364 reg = nuport_mac_readl(CTRL_REG);
365 if (phydev->duplex == DUPLEX_FULL)
366 reg |= (1 << 20);
367 else
368 reg &= ~(1 << 20);
369 nuport_mac_writel(reg, CTRL_REG);
370
371 status_changed = 1;
372 priv->old_duplex = phydev->duplex;
373 }
374
375 if (!status_changed)
376 return;
377
378 pr_info("%s: link %s", dev->name, phydev->link ?
379 "UP" : "DOWN");
380 if (phydev->link) {
381 pr_cont(" - %d/%s", phydev->speed,
382 phydev->duplex == DUPLEX_FULL ? "full" : "half");
383 }
384 pr_cont("\n");
385 }
386
387 static irqreturn_t nuport_mac_link_interrupt(int irq, void *dev_id)
388 {
389 struct net_device *dev = dev_id;
390 struct nuport_mac_priv *priv = netdev_priv(dev);
391 u32 reg;
392 u8 phy_addr;
393
394 reg = nuport_mac_readl(LINK_INT_CSR);
395 phy_addr = (reg >> 1) & 0x0f;
396
397 if (phy_addr != priv->phydev->addr) {
398 netdev_err(dev, "spurious PHY irq (phy: %d)\n", phy_addr);
399 return IRQ_NONE;
400 }
401
402 priv->phydev->link = (reg & (1 << 16));
403 nuport_mac_adjust_link(dev);
404
405 return IRQ_HANDLED;
406 }
407
408 static irqreturn_t nuport_mac_tx_interrupt(int irq, void *dev_id)
409 {
410 struct net_device *dev = (struct net_device *)dev_id;
411 struct nuport_mac_priv *priv = netdev_priv(dev);
412 struct sk_buff *skb;
413 unsigned long flags;
414 int ret;
415 u32 reg;
416
417 spin_lock_irqsave(&priv->lock, flags);
418 /* clear status word available if ready */
419 reg = nuport_mac_readl(TX_START_DMA);
420 if (reg & (1 << 18)) {
421 nuport_mac_writel(reg, TX_START_DMA);
422 reg = nuport_mac_readl(TX_DMA_STATUS);
423
424 if (reg & 1)
425 dev->stats.tx_errors++;
426 } else
427 netdev_dbg(dev, "no status word: %08x\n", reg);
428
429 skb = priv->tx_skb[priv->dma_tx];
430 priv->tx_skb[priv->dma_tx] = NULL;
431 priv->valid_txskb[priv->dma_tx] = 0;
432 dev_kfree_skb_irq(skb);
433
434 priv->dma_tx++;
435 if (priv->dma_tx >= TX_RING_SIZE)
436 priv->dma_tx = 0;
437
438 if (!priv->valid_txskb[priv->dma_tx])
439 priv->first_pkt = 1;
440 else {
441 ret = nuport_mac_start_tx_dma(priv, priv->tx_skb[priv->dma_tx]);
442 if (ret)
443 netdev_err(dev, "failed to restart TX dma\n");
444 }
445
446 if (priv->tx_full) {
447 netdev_dbg(dev, "restarting transmit queue\n");
448 netif_wake_queue(dev);
449 priv->tx_full = 0;
450 }
451
452 spin_unlock_irqrestore(&priv->lock, flags);
453
454 return IRQ_HANDLED;
455 }
456
457 static unsigned int nuport_mac_has_work(struct nuport_mac_priv *priv)
458 {
459 unsigned int i;
460
461 for (i = 0; i < RX_RING_SIZE; i++)
462 if (priv->rx_skb[i])
463 return 1;
464
465 return 0;
466 }
467
468 static irqreturn_t nuport_mac_rx_interrupt(int irq, void *dev_id)
469 {
470 struct net_device *dev = (struct net_device *)dev_id;
471 struct nuport_mac_priv *priv = netdev_priv(dev);
472 unsigned long flags;
473 int ret;
474
475 spin_lock_irqsave(&priv->lock, flags);
476 if (!priv->rx_full) {
477 priv->pkt_len[priv->dma_rx] = nuport_mac_readl(RX_ACT_BYTES) - 4;
478 priv->irq_rxskb[priv->dma_rx] = 0;
479 priv->dma_rx++;
480
481 if (priv->dma_rx >= RX_RING_SIZE)
482 priv->dma_rx = 0;
483 } else
484 priv->rx_full = 0;
485
486 if (priv->irq_rxskb[priv->dma_rx] == 1) {
487 ret = nuport_mac_start_rx_dma(priv, priv->rx_skb[priv->dma_rx]);
488 if (ret)
489 netdev_err(dev, "failed to start rx dma\n");
490 } else {
491 priv->rx_full = 1;
492 netdev_dbg(dev, "RX ring full\n");
493 }
494
495 if (likely(nuport_mac_has_work(priv))) {
496 /* find a way to disable DMA rx irq */
497 nuport_mac_disable_rx_dma(priv);
498 napi_schedule(&priv->napi);
499 }
500 spin_unlock_irqrestore(&priv->lock, flags);
501
502 return IRQ_HANDLED;
503 }
504
505 /* Process received packets in tasklet */
506 static int nuport_mac_rx(struct net_device *dev, int limit)
507 {
508 struct nuport_mac_priv *priv = netdev_priv(dev);
509 struct sk_buff *skb;
510 int len, status;
511 int count = 0;
512
513 while (count < limit && !priv->irq_rxskb[priv->cur_rx]) {
514 skb = priv->rx_skb[priv->cur_rx];
515 len = priv->pkt_len[priv->cur_rx];
516
517 /* Remove 2 bytes added by RX buffer shifting */
518 len = len - 2;
519 skb->data = skb->data + 2;
520
521 /* Get packet status */
522 status = get_unaligned((u32 *) (skb->data + len));
523 skb->dev = dev;
524
525 /* packet filter failed */
526 if (!(status & (1 << 30))) {
527 dev_kfree_skb_irq(skb);
528 goto exit;
529 }
530
531 /* missed frame */
532 if (status & (1 << 31)) {
533 dev->stats.rx_missed_errors++;
534 dev_kfree_skb_irq(skb);
535 goto exit;
536 }
537
538 /* Not ethernet type */
539 if ((!(status & (1 << 18))) || (status & ERROR_FILTER_MASK))
540 dev->stats.rx_errors++;
541
542 if (len > MAX_ETH_FRAME_SIZE) {
543 dev_kfree_skb_irq(skb);
544 goto exit;
545 } else
546 skb_put(skb, len);
547
548 skb->protocol = eth_type_trans(skb, dev);
549 dev->stats.rx_packets++;
550
551 if (status & (1 << 29))
552 skb->pkt_type = PACKET_OTHERHOST;
553 if (status & (1 << 27))
554 skb->pkt_type = PACKET_MULTICAST;
555 if (status & (1 << 28))
556 skb->pkt_type = PACKET_BROADCAST;
557
558 skb->ip_summed = CHECKSUM_UNNECESSARY;
559
560 /* Pass the received packet to network layer */
561 netif_receive_skb(skb);
562
563 if (status != NET_RX_DROP)
564 dev->stats.rx_bytes += len - 4; /* Without CRC */
565 else
566 dev->stats.rx_dropped++;
567
568 dev->last_rx = jiffies;
569
570 exit:
571 skb = netdev_alloc_skb(dev, RX_ALLOC_SIZE);
572 skb_reserve(skb, RX_SKB_HEADROOM);
573 priv->rx_skb[priv->cur_rx] = skb;
574 priv->irq_rxskb[priv->cur_rx] = 1;
575 priv->cur_rx++;
576
577 if (priv->cur_rx >= RX_RING_SIZE)
578 priv->cur_rx = 0;
579 count++;
580 }
581
582 return count;
583 }
584
585 static int nuport_mac_poll(struct napi_struct *napi, int budget)
586 {
587 struct nuport_mac_priv *priv =
588 container_of(napi, struct nuport_mac_priv, napi);
589 struct net_device *dev = priv->dev;
590 int work_done;
591
592 work_done = nuport_mac_rx(dev, budget);
593
594 if (work_done < budget) {
595 napi_complete(napi);
596 nuport_mac_enable_rx_dma(priv);
597 }
598
599 return work_done;
600 }
601
602 static void nuport_mac_init_tx_ring(struct nuport_mac_priv *priv)
603 {
604 int i;
605
606 priv->cur_tx = priv->dma_tx = priv->tx_full = 0;
607 for (i = 0; i < TX_RING_SIZE; i++) {
608 priv->tx_skb[i] = NULL;
609 priv->valid_txskb[i] = 0;
610 }
611 priv->first_pkt = 1;
612 }
613
614 static int nuport_mac_init_rx_ring(struct net_device *dev)
615 {
616 struct nuport_mac_priv *priv = netdev_priv(dev);
617 struct sk_buff *skb;
618 int i;
619
620 priv->cur_rx = priv->dma_rx = priv->rx_full = 0;
621
622 for (i = 0; i < RX_RING_SIZE; i++) {
623 skb = netdev_alloc_skb(dev, RX_ALLOC_SIZE);
624 if (!skb)
625 return -ENOMEM;
626 skb_reserve(skb, RX_SKB_HEADROOM);
627 priv->rx_skb[i] = skb;
628 priv->irq_rxskb[i] = 1;
629 }
630
631 return 0;
632 }
633
634 static void nuport_mac_free_rx_ring(struct nuport_mac_priv *priv)
635 {
636 int i;
637
638 for (i = 0; i < RX_RING_SIZE; i++) {
639 if (!priv->rx_skb[i])
640 continue;
641
642 dev_kfree_skb(priv->rx_skb[i]);
643 priv->rx_skb[i] = NULL;
644 }
645 }
646
647 static void nuport_mac_read_mac_address(struct net_device *dev)
648 {
649 struct nuport_mac_priv *priv = netdev_priv(dev);
650 int i;
651
652 for (i = 0; i < 4; i++)
653 dev->dev_addr[i] = nuport_mac_readb(MAC_ADDR_LOW_REG + i);
654 dev->dev_addr[4] = nuport_mac_readb(MAC_ADDR_HIGH_REG);
655 dev->dev_addr[5] = nuport_mac_readb(MAC_ADDR_HIGH_REG + 1);
656
657 if (!is_valid_ether_addr(dev->dev_addr)) {
658 dev_info(&priv->pdev->dev, "using random address\n");
659 random_ether_addr(dev->dev_addr);
660 }
661 }
662
663 static int nuport_mac_change_mac_address(struct net_device *dev, void *mac_addr)
664 {
665 struct sockaddr *addr = mac_addr;
666 struct nuport_mac_priv *priv = netdev_priv(dev);
667 unsigned long *temp = (unsigned long *)dev->dev_addr;
668 u32 high, low;
669
670 if (netif_running(dev))
671 return -EBUSY;
672
673 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
674
675 spin_lock_irq(&priv->lock);
676
677 nuport_mac_writel(*temp, MAC_ADDR_LOW_REG);
678 temp = (unsigned long *)(dev->dev_addr + 4);
679 nuport_mac_writel(*temp, MAC_ADDR_HIGH_REG);
680
681 low = nuport_mac_readl(MAC_ADDR_LOW_REG);
682 high = nuport_mac_readl(MAC_ADDR_HIGH_REG);
683
684 spin_unlock_irq(&priv->lock);
685
686 return 0;
687 }
688
689 static int nuport_mac_open(struct net_device *dev)
690 {
691 int ret;
692 struct nuport_mac_priv *priv = netdev_priv(dev);
693 unsigned long flags;
694 u32 reg;
695 u8 tmp;
696
697 /* Enable hardware filters */
698 reg = nuport_mac_readl((void __iomem *)_CONFADDR_DBGLED);
699 reg |= 0x80;
700 nuport_mac_writel(reg, (void __iomem *)_CONFADDR_DBGLED);
701
702 /* Set LEDs to Link act and RX/TX mode */
703 reg = nuport_mac_readl((void __iomem *)(_CONFADDR_SYSDBG + 0x04));
704 reg |= 0x01;
705 nuport_mac_writel(reg, (void __iomem *)(_CONFADDR_SYSDBG + 0x04));
706
707 ret = clk_enable(priv->emac_clk);
708 if (ret) {
709 netdev_err(dev, "failed to enable EMAC clock\n");
710 return ret;
711 }
712
713 /* Set MAC into full duplex mode by default */
714 nuport_mac_writel(0x1010052C, CTRL_REG);
715
716 /* set mac address in hardware in case it was not already */
717 nuport_mac_change_mac_address(dev, dev->dev_addr);
718
719 ret = request_irq(priv->link_irq, &nuport_mac_link_interrupt,
720 0, dev->name, dev);
721 if (ret) {
722 netdev_err(dev, "unable to request link interrupt\n");
723 goto out_emac_clk;
724 }
725
726 phy_start(priv->phydev);
727
728 /* Enable link interrupt monitoring */
729 spin_lock_irqsave(&priv->lock, flags);
730 nuport_mac_writel(0x1041 | (priv->phydev->addr << 1), LINK_INT_CSR);
731 nuport_mac_writel(0xFFFFF, LINK_INT_POLL_TIME);
732 spin_unlock_irqrestore(&priv->lock, flags);
733
734 ret = request_irq(priv->tx_irq, &nuport_mac_tx_interrupt,
735 0, dev->name, dev);
736 if (ret) {
737 netdev_err(dev, "unable to request rx interrupt\n");
738 goto out_link_irq;
739 }
740
741 napi_enable(&priv->napi);
742
743 ret = request_irq(priv->rx_irq, &nuport_mac_rx_interrupt,
744 0, dev->name, dev);
745 if (ret) {
746 netdev_err(dev, "unable to request tx interrupt\n");
747 goto out_tx_irq;
748 }
749
750 /* Enable buffer shifting in RX */
751 tmp = nuport_mac_readb((void __iomem *)(_CONFADDR_SYSDBG + 0x1D));
752 tmp |= 0x01;
753 nuport_mac_writeb(tmp, (void __iomem *)(_CONFADDR_SYSDBG + 0x1D));
754
755 netif_start_queue(dev);
756
757 nuport_mac_init_tx_ring(priv);
758
759 ret = nuport_mac_init_rx_ring(dev);
760 if (ret) {
761 netdev_err(dev, "rx ring init failed\n");
762 goto out_rx_skb;
763 }
764
765 nuport_mac_reset_tx_dma(priv);
766 nuport_mac_reset_rx_dma(priv);
767
768 /* Start RX DMA */
769 return nuport_mac_start_rx_dma(priv, priv->rx_skb[0]);
770
771 out_rx_skb:
772 nuport_mac_free_rx_ring(priv);
773 free_irq(priv->rx_irq, dev);
774 out_tx_irq:
775 free_irq(priv->tx_irq, dev);
776 out_link_irq:
777 free_irq(priv->link_irq, dev);
778 out_emac_clk:
779 clk_disable(priv->emac_clk);
780 return ret;
781 }
782
783 static int nuport_mac_close(struct net_device *dev)
784 {
785 struct nuport_mac_priv *priv = netdev_priv(dev);
786
787 spin_lock_irq(&priv->lock);
788 napi_disable(&priv->napi);
789 netif_stop_queue(dev);
790
791 free_irq(priv->link_irq, dev);
792 nuport_mac_writel(0x00, LINK_INT_CSR);
793 nuport_mac_writel(0x00, LINK_INT_POLL_TIME);
794 phy_stop(priv->phydev);
795
796 free_irq(priv->tx_irq, dev);
797 free_irq(priv->rx_irq, dev);
798 spin_unlock_irq(&priv->lock);
799
800 nuport_mac_free_rx_ring(priv);
801
802 clk_disable(priv->emac_clk);
803
804 return 0;
805 }
806
807 static void nuport_mac_tx_timeout(struct net_device *dev)
808 {
809 struct nuport_mac_priv *priv = netdev_priv(dev);
810 unsigned int i;
811
812 netdev_warn(dev, "transmit timeout, attempting recovery\n");
813
814 netdev_info(dev, "TX DMA regs\n");
815 for (i = 0; i < DMA_CHAN_WIDTH; i += 4)
816 netdev_info(dev, "[%02x]: 0x%08x\n", i, nuport_mac_readl(TX_DMA_BASE + i));
817 netdev_info(dev, "RX DMA regs\n");
818 for (i = 0; i < DMA_CHAN_WIDTH; i += 4)
819 netdev_info(dev, "[%02x]: 0x%08x\n", i, nuport_mac_readl(RX_DMA_BASE + i));
820
821 nuport_mac_init_tx_ring(priv);
822 nuport_mac_reset_tx_dma(priv);
823
824 netif_wake_queue(dev);
825 }
826
827 static int nuport_mac_mii_probe(struct net_device *dev)
828 {
829 struct nuport_mac_priv *priv = netdev_priv(dev);
830 struct phy_device *phydev = NULL;
831 int ret;
832
833 ret = clk_enable(priv->ephy_clk);
834 if (ret) {
835 netdev_err(dev, "unable to enable ePHY clk\n");
836 return ret;
837 }
838
839 phydev = phy_find_first(priv->mii_bus);
840 if (!phydev) {
841 netdev_err(dev, "no PHYs found\n");
842 ret = -ENODEV;
843 goto out;
844 }
845
846 phydev = phy_connect(dev, dev_name(&phydev->dev),
847 nuport_mac_adjust_link, 0,
848 PHY_INTERFACE_MODE_MII);
849 if (IS_ERR(phydev)) {
850 netdev_err(dev, "could not attach PHY\n");
851 ret = PTR_ERR(phydev);
852 goto out;
853 }
854
855 phydev->supported &= PHY_BASIC_FEATURES;
856 phydev->advertising = phydev->supported;
857 priv->phydev = phydev;
858 priv->old_link = 0;
859 priv->old_duplex = -1;
860
861 dev_info(&priv->pdev->dev, "attached PHY driver [%s] "
862 "(mii_bus:phy_addr=%d)\n",
863 phydev->drv->name, phydev->addr);
864
865 return 0;
866
867 out:
868 /* disable the Ethernet PHY clock for the moment */
869 clk_disable(priv->ephy_clk);
870
871 return ret;
872 }
873
874 static void nuport_mac_ethtool_drvinfo(struct net_device *dev,
875 struct ethtool_drvinfo *info)
876 {
877 strncpy(info->driver, "nuport-mac", sizeof(info->driver));
878 strncpy(info->version, "0.1", sizeof(info->version));
879 strncpy(info->fw_version, "N/A", sizeof(info->fw_version));
880 strncpy(info->bus_info, "internal", sizeof(info->bus_info));
881 info->n_stats = 0;
882 info->testinfo_len = 0;
883 info->regdump_len = 0;
884 info->eedump_len = 0;
885 }
886
887 static int nuport_mac_ethtool_get_settings(struct net_device *dev,
888 struct ethtool_cmd *cmd)
889 {
890 struct nuport_mac_priv *priv = netdev_priv(dev);
891
892 if (priv->phydev)
893 return phy_ethtool_gset(priv->phydev, cmd);
894
895 return -EINVAL;
896 }
897
898 static int nuport_mac_ethtool_set_settings(struct net_device *dev,
899 struct ethtool_cmd *cmd)
900 {
901 struct nuport_mac_priv *priv = netdev_priv(dev);
902
903 if (priv->phydev)
904 return phy_ethtool_sset(priv->phydev, cmd);
905
906 return -EINVAL;
907 }
908
909 static void nuport_mac_set_msglevel(struct net_device *dev, u32 msg_level)
910 {
911 struct nuport_mac_priv *priv = netdev_priv(dev);
912
913 priv->msg_level = msg_level;
914 }
915
916 static u32 nuport_mac_get_msglevel(struct net_device *dev)
917 {
918 struct nuport_mac_priv *priv = netdev_priv(dev);
919
920 return priv->msg_level;
921 }
922
923 static const struct ethtool_ops nuport_mac_ethtool_ops = {
924 .get_drvinfo = nuport_mac_ethtool_drvinfo,
925 .get_link = ethtool_op_get_link,
926 .get_settings = nuport_mac_ethtool_get_settings,
927 .set_settings = nuport_mac_ethtool_set_settings,
928 .set_msglevel = nuport_mac_set_msglevel,
929 .get_msglevel = nuport_mac_get_msglevel,
930 };
931
932 static const struct net_device_ops nuport_mac_ops = {
933 .ndo_open = nuport_mac_open,
934 .ndo_stop = nuport_mac_close,
935 .ndo_start_xmit = nuport_mac_start_xmit,
936 .ndo_change_mtu = eth_change_mtu,
937 .ndo_validate_addr = eth_validate_addr,
938 .ndo_set_mac_address = nuport_mac_change_mac_address,
939 .ndo_tx_timeout = nuport_mac_tx_timeout,
940 };
941
942 static int __init nuport_mac_probe(struct platform_device *pdev)
943 {
944 struct net_device *dev;
945 struct nuport_mac_priv *priv = NULL;
946 struct resource *regs, *dma;
947 int ret = 0;
948 int rx_irq, tx_irq, link_irq;
949 int i;
950
951 dev = alloc_etherdev(sizeof(struct nuport_mac_priv));
952 if (!dev) {
953 dev_err(&pdev->dev, "no memory for net_device\n");
954 return -ENOMEM;
955 }
956
957 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
958 dma = platform_get_resource(pdev, IORESOURCE_MEM, 1);
959 if (!regs || !dma) {
960 dev_err(&pdev->dev, "failed to get regs resources\n");
961 ret = -ENODEV;
962 goto out;
963 }
964
965 rx_irq = platform_get_irq(pdev, 0);
966 tx_irq = platform_get_irq(pdev, 1);
967 link_irq = platform_get_irq(pdev, 2);
968 if (rx_irq < 0 || tx_irq < 0 || link_irq < 0) {
969 ret = -ENODEV;
970 goto out;
971 }
972
973 platform_set_drvdata(pdev, dev);
974 SET_NETDEV_DEV(dev, &pdev->dev);
975 priv = netdev_priv(dev);
976 priv->pdev = pdev;
977 priv->dev = dev;
978 spin_lock_init(&priv->lock);
979
980 priv->mac_base = devm_ioremap(&pdev->dev,
981 regs->start, resource_size(regs));
982 if (!priv->mac_base) {
983 dev_err(&pdev->dev, "failed to remap regs\n");
984 ret = -ENOMEM;
985 goto out_platform;
986 }
987
988 priv->dma_base = devm_ioremap(&pdev->dev,
989 dma->start, resource_size(dma));
990 if (!priv->dma_base) {
991 dev_err(&pdev->dev, "failed to remap dma-regs\n");
992 ret = -ENOMEM;
993 goto out_platform;
994 }
995
996 priv->emac_clk = clk_get(&pdev->dev, "emac");
997 if (IS_ERR_OR_NULL(priv->emac_clk)) {
998 dev_err(&pdev->dev, "failed to get emac clk\n");
999 ret = PTR_ERR(priv->emac_clk);
1000 goto out_platform;
1001 }
1002
1003 priv->ephy_clk = clk_get(&pdev->dev, "ephy");
1004 if (IS_ERR_OR_NULL(priv->ephy_clk)) {
1005 dev_err(&pdev->dev, "failed to get ephy clk\n");
1006 ret = PTR_ERR(priv->ephy_clk);
1007 goto out_platform;
1008 }
1009
1010 priv->link_irq = link_irq;
1011 priv->rx_irq = rx_irq;
1012 priv->tx_irq = tx_irq;
1013 priv->msg_level = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK;
1014 dev->netdev_ops = &nuport_mac_ops;
1015 dev->ethtool_ops = &nuport_mac_ethtool_ops;
1016 dev->watchdog_timeo = HZ;
1017 dev->flags = IFF_BROADCAST; /* Supports Broadcast */
1018 dev->tx_queue_len = TX_RING_SIZE / 2;
1019
1020 netif_napi_add(dev, &priv->napi, nuport_mac_poll, 64);
1021
1022 priv->mii_bus = mdiobus_alloc();
1023 if (!priv->mii_bus) {
1024 dev_err(&pdev->dev, "mii bus allocation failed\n");
1025 goto out;
1026 }
1027
1028 priv->mii_bus->priv = dev;
1029 priv->mii_bus->read = nuport_mac_mii_read;
1030 priv->mii_bus->write = nuport_mac_mii_write;
1031 priv->mii_bus->reset = nuport_mac_mii_reset;
1032 priv->mii_bus->name = "nuport-mac-mii";
1033 priv->mii_bus->phy_mask = (1 << 0);
1034 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
1035 priv->mii_bus->irq = kzalloc(PHY_MAX_ADDR * sizeof(int), GFP_KERNEL);
1036 if (!priv->mii_bus->irq) {
1037 dev_err(&pdev->dev, "failed to allocate mii_bus irqs\n");
1038 ret = -ENOMEM;
1039 goto out_mdio;
1040 }
1041
1042 /* We support PHY interrupts routed back to the MAC */
1043 for (i = 0; i < PHY_MAX_ADDR; i++)
1044 priv->mii_bus->irq[i] = PHY_IGNORE_INTERRUPT;
1045
1046 ret = mdiobus_register(priv->mii_bus);
1047 if (ret) {
1048 dev_err(&pdev->dev, "failed to register mii_bus\n");
1049 goto out_mdio_irq;
1050 }
1051
1052 ret = nuport_mac_mii_probe(dev);
1053 if (ret) {
1054 dev_err(&pdev->dev, "failed to probe MII bus\n");
1055 goto out_mdio_unregister;
1056 }
1057
1058 ret = register_netdev(dev);
1059 if (ret) {
1060 dev_err(&pdev->dev, "failed to register net_device\n");
1061 goto out_mdio_probe;
1062 }
1063
1064 /* read existing mac address */
1065 nuport_mac_read_mac_address(dev);
1066
1067 dev_info(&pdev->dev, "registered (MAC: %pM)\n", dev->dev_addr);
1068
1069 return ret;
1070
1071 out_mdio_probe:
1072 phy_disconnect(priv->phydev);
1073 out_mdio_unregister:
1074 mdiobus_unregister(priv->mii_bus);
1075 out_mdio_irq:
1076 kfree(priv->mii_bus->irq);
1077 out_mdio:
1078 mdiobus_free(priv->mii_bus);
1079 out_platform:
1080 platform_set_drvdata(pdev, NULL);
1081 out:
1082 clk_put(priv->ephy_clk);
1083 clk_put(priv->emac_clk);
1084 free_netdev(dev);
1085 platform_set_drvdata(pdev, NULL);
1086 return ret;
1087 }
1088
1089 static int nuport_mac_remove(struct platform_device *pdev)
1090 {
1091 struct net_device *dev = platform_get_drvdata(pdev);
1092 struct nuport_mac_priv *priv = netdev_priv(dev);
1093
1094 unregister_netdev(dev);
1095 phy_disconnect(priv->phydev);
1096 mdiobus_unregister(priv->mii_bus);
1097 kfree(priv->mii_bus->irq);
1098 mdiobus_free(priv->mii_bus);
1099 clk_put(priv->ephy_clk);
1100 clk_put(priv->emac_clk);
1101 free_netdev(dev);
1102
1103 platform_set_drvdata(pdev, NULL);
1104
1105 return 0;
1106 }
1107
1108 static struct of_device_id nuport_eth_ids[] __initdata = {
1109 {.compatible = "moschip,nuport-mac",},
1110 { /* sentinel */ },
1111 };
1112
1113 static struct platform_driver nuport_eth_driver = {
1114 .driver = {
1115 .name = "nuport-mac",
1116 .owner = THIS_MODULE,
1117 .of_match_table = nuport_eth_ids,
1118 },
1119 .probe = nuport_mac_probe,
1120 .remove = __devexit_p(nuport_mac_remove),
1121 };
1122
1123 module_platform_driver(nuport_eth_driver);
1124
1125 MODULE_AUTHOR("Moschip Semiconductors Ltd.");
1126 MODULE_DESCRIPTION("Moschip MCS8140 Ethernet MAC driver");
1127 MODULE_LICENSE("GPL");