target/linux/mediatek/patches/0047-xhci-mediatek-support-MTK-xHCI-host-controller.patch

   1 From e604b6c864f2e3b6fe0706c4bef886533d92f67a Mon Sep 17 00:00:00 2001
   2 From: Chunfeng Yun <chunfeng.yun@mediatek.com>
   3 Date: Wed, 27 May 2015 19:48:02 +0800
   4 Subject: [PATCH 47/76] xhci: mediatek: support MTK xHCI host controller
   5
   6 MTK xhci host controller defines some extra SW scheduling
   7 parameters for HW to minimize the scheduling effort for
   8 synchronous and interrupt endpoints. The parameters are
   9 put into reseved DWs of slot context and endpoint context.
  10
  11 Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
  12 ---
  13  drivers/usb/host/Kconfig     |    9 +
  14  drivers/usb/host/Makefile    |    3 +
  15  drivers/usb/host/xhci-mtk.c  |  470 ++++++++++++++++++++++++++++++++++++++++++
  16  drivers/usb/host/xhci-mtk.h  |  119 +++++++++++
  17  drivers/usb/host/xhci-plat.c |   22 +-
  18  drivers/usb/host/xhci-ring.c |   35 +++-
  19  drivers/usb/host/xhci.c      |   16 +-
  20  drivers/usb/host/xhci.h      |    1 +
  21  8 files changed, 667 insertions(+), 8 deletions(-)
  22  create mode 100644 drivers/usb/host/xhci-mtk.c
  23  create mode 100644 drivers/usb/host/xhci-mtk.h
  24
  25 --- a/drivers/usb/host/Kconfig
  26 +++ b/drivers/usb/host/Kconfig
  27 @@ -41,6 +41,15 @@ config USB_XHCI_PLATFORM
  28
  29           If unsure, say N.
  30
  31 +config USB_XHCI_MTK
  32 +       tristate "xHCI support for Mediatek MT65xx"
  33 +       select USB_XHCI_PLATFORM
  34 +       depends on ARCH_MEDIATEK || COMPILE_TEST
  35 +       ---help---
  36 +         Say 'Y' to enable the support for the xHCI host controller
  37 +         found in Mediatek MT65xx SoCs.
  38 +         If unsure, say N.
  39 +
  40  config USB_XHCI_MVEBU
  41         tristate "xHCI support for Marvell Armada 375/38x"
  42         select USB_XHCI_PLATFORM
  43 --- a/drivers/usb/host/Makefile
  44 +++ b/drivers/usb/host/Makefile
  45 @@ -15,6 +15,9 @@ xhci-hcd-y += xhci-ring.o xhci-hub.o xhc
  46  xhci-hcd-y += xhci-trace.o
  47
  48  xhci-plat-hcd-y := xhci-plat.o
  49 +ifneq ($(CONFIG_USB_XHCI_MTK), )
  50 +       xhci-plat-hcd-y         += xhci-mtk.o
  51 +endif
  52  ifneq ($(CONFIG_USB_XHCI_MVEBU), )
  53         xhci-plat-hcd-y         += xhci-mvebu.o
  54  endif
  55 --- /dev/null
  56 +++ b/drivers/usb/host/xhci-mtk.c
  57 @@ -0,0 +1,470 @@
  58 +/*
  59 + * Copyright (c) 2015 MediaTek Inc.
  60 + * Author:
  61 + *  Zhigang.Wei <zhigang.wei@mediatek.com>
  62 + *  Chunfeng.Yun <chunfeng.yun@mediatek.com>
  63 + *
  64 + * This software is licensed under the terms of the GNU General Public
  65 + * License version 2, as published by the Free Software Foundation, and
  66 + * may be copied, distributed, and modified under those terms.
  67 + *
  68 + * This program is distributed in the hope that it will be useful,
  69 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  70 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  71 + * GNU General Public License for more details.
  72 + *
  73 + */
  74 +
  75 +#include <linux/kernel.h>
  76 +#include <linux/slab.h>
  77 +#include "xhci-mtk.h"
  78 +
  79 +
  80 +#define SS_BW_BOUNDARY 51000
  81 +/* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
  82 +#define HS_BW_BOUNDARY 6144
  83 +/* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
  84 +#define FS_PAYLOAD_MAX 188
  85 +
  86 +/* mtk scheduler bitmasks */
  87 +#define EP_BPKTS(p)    ((p) & 0x3f)
  88 +#define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
  89 +#define EP_BBM(p)      ((p) << 11)
  90 +#define EP_BOFFSET(p)  ((p) & 0x3fff)
  91 +#define EP_BREPEAT(p)  (((p) & 0x7fff) << 16)
  92 +
  93 +static int is_fs_or_ls(enum usb_device_speed speed)
  94 +{
  95 +       return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
  96 +}
  97 +
  98 +static int get_bw_index(struct xhci_hcd *xhci, struct usb_device *udev,
  99 +       struct usb_host_endpoint *ep)
 100 +{
 101 +       int bw_index;
 102 +       int port_id;
 103 +       struct xhci_virt_device *virt_dev;
 104 +
 105 +       virt_dev = xhci->devs[udev->slot_id];
 106 +       port_id = virt_dev->real_port;
 107 +
 108 +       if (udev->speed == USB_SPEED_SUPER) {
 109 +               if (usb_endpoint_dir_out(&ep->desc))
 110 +                       bw_index = (port_id - 1) * 2;
 111 +               else
 112 +                       bw_index = (port_id - 1) * 2 + 1;
 113 +       } else {
 114 +               bw_index = port_id + xhci->num_usb3_ports - 1;
 115 +       }
 116 +
 117 +       return bw_index;
 118 +}
 119 +
 120 +
 121 +static void setup_sch_info(struct usb_device *udev,
 122 +               struct xhci_ep_ctx *ep_ctx, struct mu3h_sch_ep_info *sch_ep)
 123 +{
 124 +       u32 ep_type;
 125 +       u32 ep_interval;
 126 +       u32 max_packet_size;
 127 +       u32 max_burst;
 128 +       u32 mult;
 129 +       u32 esit_pkts;
 130 +
 131 +       ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
 132 +       ep_interval = CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info));
 133 +       max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
 134 +       max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2));
 135 +       mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info));
 136 +       pr_debug("%s: max_burst = %d, mult = %d\n", __func__, max_burst, mult);
 137 +
 138 +       sch_ep->ep_type = ep_type;
 139 +       sch_ep->max_packet_size = max_packet_size;
 140 +       sch_ep->esit = 1 << ep_interval;
 141 +       sch_ep->offset = 0;
 142 +       sch_ep->burst_mode = 0;
 143 +
 144 +       if (udev->speed == USB_SPEED_HIGH) {
 145 +               sch_ep->cs_count = 0;
 146 +               /*
 147 +                * usb_20 spec section5.9
 148 +                * a single microframe is enough for HS synchromous endpoints
 149 +                * in a interval
 150 +                */
 151 +               sch_ep->num_budget_microframes = 1;
 152 +               sch_ep->repeat = 0;
 153 +               /*
 154 +                * xHCI spec section6.2.3.4
 155 +                * @max_busrt is the number of additional transactions opportunities
 156 +                * per microframe
 157 +                */
 158 +               sch_ep->pkts = max_burst + 1;
 159 +               sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
 160 +       } else if (udev->speed == USB_SPEED_SUPER) {
 161 +               /* usb3_r1 spec section4.4.7 & 4.4.8 */
 162 +               sch_ep->cs_count = 0;
 163 +               esit_pkts = (mult + 1) * (max_burst + 1);
 164 +               if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
 165 +                       sch_ep->pkts = esit_pkts;
 166 +                       sch_ep->num_budget_microframes = 1;
 167 +                       sch_ep->repeat = 0;
 168 +               }
 169 +
 170 +               if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
 171 +                       if (esit_pkts <= sch_ep->esit)
 172 +                               sch_ep->pkts = 1;
 173 +                       else
 174 +                               sch_ep->pkts = roundup_pow_of_two(esit_pkts)
 175 +                                       / sch_ep->esit;
 176 +
 177 +                       sch_ep->num_budget_microframes =
 178 +                               DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
 179 +
 180 +                       if (sch_ep->num_budget_microframes > 1)
 181 +                               sch_ep->repeat = 1;
 182 +                       else
 183 +                               sch_ep->repeat = 0;
 184 +               }
 185 +               sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
 186 +       } else if (is_fs_or_ls(udev->speed)) {
 187 +               /*
 188 +                * usb_20 spec section11.18.4
 189 +                * assume worst cases
 190 +                */
 191 +               sch_ep->repeat = 0;
 192 +               sch_ep->pkts = 1; /* at most one packet for each microframe */
 193 +               if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
 194 +                       sch_ep->cs_count = 3; /* at most need 3 CS*/
 195 +                       /* one for SS and one for budgeted transaction */
 196 +                       sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
 197 +                       sch_ep->bw_cost_per_microframe = max_packet_size;
 198 +               }
 199 +               if (ep_type == ISOC_OUT_EP) {
 200 +                       /* must never schedule a cs ISOC OUT ep */
 201 +                       sch_ep->cs_count = 0;
 202 +                       /*
 203 +                        * the best case FS budget assumes that 188 FS bytes
 204 +                        * occur in each microframe
 205 +                        */
 206 +                       sch_ep->num_budget_microframes = DIV_ROUND_UP(
 207 +                               sch_ep->max_packet_size, FS_PAYLOAD_MAX);
 208 +                       sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
 209 +               }
 210 +               if (ep_type == ISOC_IN_EP) {
 211 +                       /* at most need additional two CS. */
 212 +                       sch_ep->cs_count = DIV_ROUND_UP(
 213 +                               sch_ep->max_packet_size, FS_PAYLOAD_MAX) + 2;
 214 +                       sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
 215 +                       sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
 216 +               }
 217 +       }
 218 +}
 219 +
 220 +/* Get maximum bandwidth when we schedule at offset slot. */
 221 +static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw,
 222 +       struct mu3h_sch_ep_info *sch_ep, u32 offset)
 223 +{
 224 +       u32 num_esit;
 225 +       u32 max_bw = 0;
 226 +       int i;
 227 +       int j;
 228 +
 229 +       num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
 230 +       for (i = 0; i < num_esit; i++) {
 231 +               u32 base = offset + i * sch_ep->esit;
 232 +
 233 +               for (j = 0; j < sch_ep->num_budget_microframes; j++) {
 234 +                       if (sch_bw->bus_bw[base + j] > max_bw)
 235 +                               max_bw = sch_bw->bus_bw[base + j];
 236 +               }
 237 +       }
 238 +       return max_bw;
 239 +}
 240 +
 241 +static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
 242 +       struct mu3h_sch_ep_info *sch_ep, int bw_cost)
 243 +{
 244 +       u32 num_esit;
 245 +       u32 base;
 246 +       int i;
 247 +       int j;
 248 +
 249 +       num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
 250 +       for (i = 0; i < num_esit; i++) {
 251 +               base = sch_ep->offset + i * sch_ep->esit;
 252 +               for (j = 0; j < sch_ep->num_budget_microframes; j++)
 253 +                       sch_bw->bus_bw[base + j] += bw_cost;
 254 +       }
 255 +
 256 +}
 257 +
 258 +static void debug_sch_ep(struct mu3h_sch_ep_info *sch_ep)
 259 +{
 260 +       pr_debug("sch_ep->ep_type = %d\n", sch_ep->ep_type);
 261 +       pr_debug("sch_ep->max_packet_size = %d\n", sch_ep->max_packet_size);
 262 +       pr_debug("sch_ep->esit = %d\n", sch_ep->esit);
 263 +       pr_debug("sch_ep->num_budget_microframes = %d\n",
 264 +                       sch_ep->num_budget_microframes);
 265 +       pr_debug("sch_ep->bw_cost_per_microframe = %d\n",
 266 +                       sch_ep->bw_cost_per_microframe);
 267 +       pr_debug("sch_ep->ep = %p\n", sch_ep->ep);
 268 +       pr_debug("sch_ep->offset = %d\n", sch_ep->offset);
 269 +       pr_debug("sch_ep->repeat = %d\n", sch_ep->repeat);
 270 +       pr_debug("sch_ep->pkts = %d\n", sch_ep->pkts);
 271 +       pr_debug("sch_ep->cs_count = %d\n", sch_ep->cs_count);
 272 +}
 273 +
 274 +static int check_sch_bw(struct usb_device *udev,
 275 +       struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep)
 276 +{
 277 +       u32 offset;
 278 +       u32 esit;
 279 +       u32 num_budget_microframes;
 280 +       u32 min_bw;
 281 +       u32 min_index;
 282 +       u32 worst_bw;
 283 +       u32 bw_boundary;
 284 +
 285 +       if (sch_ep->esit > XHCI_MTK_MAX_ESIT)
 286 +               sch_ep->esit = XHCI_MTK_MAX_ESIT;
 287 +
 288 +       esit = sch_ep->esit;
 289 +       num_budget_microframes = sch_ep->num_budget_microframes;
 290 +
 291 +       /*
 292 +        * Search through all possible schedule microframes.
 293 +        * and find a microframe where its worst bandwidth is minimum.
 294 +        */
 295 +       min_bw = ~0;
 296 +       min_index = 0;
 297 +       for (offset = 0; offset < esit; offset++) {
 298 +               if ((offset + num_budget_microframes) > sch_ep->esit)
 299 +                       break;
 300 +               /*
 301 +                * usb_20 spec section11.18:
 302 +                * must never schedule Start-Split in Y6
 303 +                */
 304 +               if (is_fs_or_ls(udev->speed) && (offset % 8 == 6))
 305 +                       continue;
 306 +
 307 +               worst_bw = get_max_bw(sch_bw, sch_ep, offset);
 308 +               if (min_bw > worst_bw) {
 309 +                       min_bw = worst_bw;
 310 +                       min_index = offset;
 311 +               }
 312 +               if (min_bw == 0)
 313 +                       break;
 314 +       }
 315 +       sch_ep->offset = min_index;
 316 +
 317 +       debug_sch_ep(sch_ep);
 318 +
 319 +       bw_boundary = (udev->speed == USB_SPEED_SUPER)
 320 +                               ? SS_BW_BOUNDARY : HS_BW_BOUNDARY;
 321 +
 322 +       /* check bandwidth */
 323 +       if (min_bw + sch_ep->bw_cost_per_microframe > bw_boundary)
 324 +               return -1;
 325 +
 326 +       /* update bus bandwidth info */
 327 +       update_bus_bw(sch_bw, sch_ep, sch_ep->bw_cost_per_microframe);
 328 +
 329 +       return 0;
 330 +}
 331 +
 332 +static void debug_sch_bw(struct mu3h_sch_bw_info *sch_bw)
 333 +{
 334 +       int i;
 335 +
 336 +       pr_debug("xhci_mtk_scheduler :bus_bw_info\n");
 337 +       for (i = 0; i < XHCI_MTK_MAX_ESIT; i++)
 338 +               pr_debug("%d  ", sch_bw->bus_bw[i]);
 339 +
 340 +       pr_debug("\n");
 341 +}
 342 +
 343 +
 344 +static int need_bw_sch(struct usb_host_endpoint *ep,
 345 +       enum usb_device_speed speed, int has_tt)
 346 +{
 347 +       /* only for synchronous endpoints */
 348 +       if (usb_endpoint_xfer_control(&ep->desc)
 349 +               || usb_endpoint_xfer_bulk(&ep->desc))
 350 +               return 0;
 351 +       /*
 352 +        * for LS & FS synchronous endpoints which its device don't attach
 353 +        * to TT are also ignored, root-hub will schedule them directly
 354 +        */
 355 +       if (is_fs_or_ls(speed) && !has_tt)
 356 +               return 0;
 357 +
 358 +       return 1;
 359 +}
 360 +
 361 +int xhci_mtk_init_quirk(struct xhci_hcd *xhci)
 362 +{
 363 +       struct usb_hcd *hcd = xhci_to_hcd(xhci);
 364 +       struct device *dev = hcd->self.controller;
 365 +       struct mu3h_sch_bw_info *sch_array;
 366 +       size_t array_size;
 367 +       int num_usb_bus;
 368 +       int i;
 369 +
 370 +       /* ss IN and OUT are separated */
 371 +       num_usb_bus = xhci->num_usb3_ports * 2 + xhci->num_usb2_ports;
 372 +       array_size = sizeof(*sch_array) * num_usb_bus;
 373 +
 374 +       sch_array = kzalloc(array_size, GFP_KERNEL);
 375 +       if (sch_array == NULL)
 376 +               return -ENOMEM;
 377 +
 378 +       for (i = 0; i < num_usb_bus; i++)
 379 +               INIT_LIST_HEAD(&sch_array[i].bw_ep_list);
 380 +
 381 +       dev->platform_data = sch_array;
 382 +       xhci->quirks |= XHCI_MTK_HOST;
 383 +       /*
 384 +        * MTK host controller gives a spurious successful event after a
 385 +        * short transfer. Ignore it.
 386 +        */
 387 +       xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
 388 +
 389 +       return 0;
 390 +}
 391 +
 392 +
 393 +void xhci_mtk_exit_quirk(struct xhci_hcd *xhci)
 394 +{
 395 +       struct usb_hcd *hcd = xhci_to_hcd(xhci);
 396 +       struct mu3h_sch_bw_info *sch_array;
 397 +
 398 +       sch_array = dev_get_platdata(hcd->self.controller);
 399 +       kfree(sch_array);
 400 +}
 401 +
 402 +
 403 +int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
 404 +               struct usb_host_endpoint *ep)
 405 +{
 406 +       int ret = 0;
 407 +       int port_id;
 408 +       int bw_index;
 409 +       struct xhci_hcd *xhci;
 410 +       unsigned int ep_index;
 411 +       struct xhci_ep_ctx *ep_ctx;
 412 +       struct xhci_slot_ctx *slot_ctx;
 413 +       struct xhci_virt_device *virt_dev;
 414 +       struct mu3h_sch_bw_info *sch_bw;
 415 +       struct mu3h_sch_ep_info *sch_ep;
 416 +       struct mu3h_sch_bw_info *sch_array;
 417 +
 418 +       xhci = hcd_to_xhci(hcd);
 419 +       virt_dev = xhci->devs[udev->slot_id];
 420 +       ep_index = xhci_get_endpoint_index(&ep->desc);
 421 +       slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
 422 +       ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
 423 +       sch_array = dev_get_platdata(hcd->self.controller);
 424 +
 425 +       port_id = virt_dev->real_port;
 426 +       xhci_dbg(xhci, "%s() xfer_type: %d, speed:%d, ep:%p\n", __func__,
 427 +               usb_endpoint_type(&ep->desc), udev->speed, ep);
 428 +
 429 +       if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
 430 +               return 0;
 431 +
 432 +       bw_index = get_bw_index(xhci, udev, ep);
 433 +       sch_bw = &sch_array[bw_index];
 434 +
 435 +       sch_ep = kzalloc(sizeof(struct mu3h_sch_ep_info), GFP_KERNEL);
 436 +       if (!sch_ep)
 437 +               return -ENOMEM;
 438 +
 439 +       setup_sch_info(udev, ep_ctx, sch_ep);
 440 +
 441 +       ret = check_sch_bw(udev, sch_bw, sch_ep);
 442 +       if (ret) {
 443 +               xhci_err(xhci, "Not enough bandwidth!\n");
 444 +               kfree(sch_ep);
 445 +               return -ENOSPC;
 446 +       }
 447 +
 448 +       list_add_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list);
 449 +       sch_ep->ep = ep;
 450 +
 451 +       ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(sch_ep->pkts)
 452 +               | EP_BCSCOUNT(sch_ep->cs_count) | EP_BBM(sch_ep->burst_mode));
 453 +       ep_ctx->reserved[1] |= cpu_to_le32(EP_BOFFSET(sch_ep->offset)
 454 +               | EP_BREPEAT(sch_ep->repeat));
 455 +
 456 +       debug_sch_bw(sch_bw);
 457 +       return 0;
 458 +}
 459 +
 460 +void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
 461 +               struct usb_host_endpoint *ep)
 462 +{
 463 +       int bw_index;
 464 +       struct xhci_hcd *xhci;
 465 +       struct xhci_slot_ctx *slot_ctx;
 466 +       struct xhci_virt_device *virt_dev;
 467 +       struct mu3h_sch_bw_info *sch_array;
 468 +       struct mu3h_sch_bw_info *sch_bw;
 469 +       struct mu3h_sch_ep_info *sch_ep;
 470 +
 471 +       xhci = hcd_to_xhci(hcd);
 472 +       virt_dev = xhci->devs[udev->slot_id];
 473 +       slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
 474 +       sch_array = dev_get_platdata(hcd->self.controller);
 475 +
 476 +       xhci_dbg(xhci, "%s() xfer_type: %d, speed:%d, ep:%p\n", __func__,
 477 +               usb_endpoint_type(&ep->desc), udev->speed, ep);
 478 +
 479 +       if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
 480 +               return;
 481 +
 482 +       bw_index = get_bw_index(xhci, udev, ep);
 483 +       sch_bw = &sch_array[bw_index];
 484 +
 485 +       list_for_each_entry(sch_ep, &sch_bw->bw_ep_list, endpoint) {
 486 +               if (sch_ep->ep == ep) {
 487 +                       update_bus_bw(sch_bw, sch_ep,
 488 +                               -sch_ep->bw_cost_per_microframe);
 489 +                       list_del(&sch_ep->endpoint);
 490 +                       kfree(sch_ep);
 491 +                       break;
 492 +               }
 493 +       }
 494 +       debug_sch_bw(sch_bw);
 495 +}
 496 +
 497 +
 498 +/*
 499 + * The TD size is the number of bytes remaining in the TD (including this TRB),
 500 + * right shifted by 10.
 501 + * It must fit in bits 21:17, so it can't be bigger than 31.
 502 + */
 503 +u32 xhci_mtk_td_remainder_quirk(unsigned int td_running_total,
 504 +       unsigned trb_buffer_length, struct urb *urb)
 505 +{
 506 +       u32 max = 31;
 507 +       int remainder, td_packet_count, packet_transferred;
 508 +       unsigned int td_transfer_size = urb->transfer_buffer_length;
 509 +       unsigned int maxp;
 510 +
 511 +       maxp = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
 512 +
 513 +       /* 0 for the last TRB */
 514 +       if (td_running_total + trb_buffer_length == td_transfer_size)
 515 +               return 0;
 516 +
 517 +       packet_transferred = td_running_total / maxp;
 518 +       td_packet_count = DIV_ROUND_UP(td_transfer_size, maxp);
 519 +       remainder = td_packet_count - packet_transferred;
 520 +
 521 +       if (remainder > max)
 522 +               return max << 17;
 523 +       else
 524 +               return remainder << 17;
 525 +}
 526 +
 527 +
 528 --- /dev/null
 529 +++ b/drivers/usb/host/xhci-mtk.h
 530 @@ -0,0 +1,119 @@
 531 +/*
 532 + * Copyright (c) 2015 MediaTek Inc.
 533 + * Author:
 534 + *  Zhigang.Wun <zhigang.wei@mediatek.com>
 535 + *  Chunfeng.Yun <chunfeng.yun@mediatek.com>
 536 + *
 537 + * This software is licensed under the terms of the GNU General Public
 538 + * License version 2, as published by the Free Software Foundation, and
 539 + * may be copied, distributed, and modified under those terms.
 540 + *
 541 + * This program is distributed in the hope that it will be useful,
 542 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 543 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 544 + * GNU General Public License for more details.
 545 + *
 546 + */
 547 +
 548 +#ifndef _XHCI_MTK_H_
 549 +#define _XHCI_MTK_H_
 550 +
 551 +#include "xhci.h"
 552 +
 553 +/**
 554 + * To simplify scheduler algorithm, set a upper limit for ESIT,
 555 + * if a synchromous ep's ESIT is larger than @XHCI_MTK_MAX_ESIT,
 556 + * round down to the limit value, that means allocating more
 557 + * bandwidth to it.
 558 + */
 559 +#define XHCI_MTK_MAX_ESIT      64
 560 +
 561 +/**
 562 + * struct mu3h_sch_bw_info
 563 + * @bus_bw: array to keep track of bandwidth already used at each uframes
 564 + * @bw_ep_list: eps in the bandwidth domain
 565 + *
 566 + * treat a HS root port as a bandwidth domain, but treat a SS root port as
 567 + * two bandwidth domains, one for IN eps and another for OUT eps.
 568 + */
 569 +struct mu3h_sch_bw_info {
 570 +       u32 bus_bw[XHCI_MTK_MAX_ESIT];
 571 +       struct list_head bw_ep_list;
 572 +};
 573 +
 574 +/**
 575 + * struct mu3h_sch_ep_info
 576 + * @esit: unit is 125us, equal to 2 << Interval field in ep-context
 577 + * @num_budget_microframes: number of continuous uframes
 578 + *             (@repeat==1) scheduled within the interval
 579 + * @ep: address of usb_host_endpoint
 580 + * @offset: which uframe of the interval that transfer should be
 581 + *             scheduled first time within the interval
 582 + * @repeat: the time gap between two uframes that transfers are
 583 + *             scheduled within a interval. in the simple algorithm, only
 584 + *             assign 0 or 1 to it; 0 means using only one uframe in a
 585 + *             interval, and1 means using @num_budget_microframes
 586 + *             continuous uframes
 587 + * @pkts: number of packets to be transferred in the scheduled uframes
 588 + * @cs_count: number of CS that host will trigger
 589 + */
 590 +struct mu3h_sch_ep_info {
 591 +       u32 ep_type;
 592 +       u32 max_packet_size;
 593 +       u32 esit;
 594 +       u32 num_budget_microframes;
 595 +       u32 bw_cost_per_microframe;
 596 +       void *ep;
 597 +       struct list_head endpoint;
 598 +
 599 +       /* mtk xhci scheduling info */
 600 +       u32 offset;
 601 +       u32 repeat;
 602 +       u32 pkts;
 603 +       u32 cs_count;
 604 +       u32 burst_mode;
 605 +};
 606 +
 607 +
 608 +#if IS_ENABLED(CONFIG_USB_XHCI_MTK)
 609 +
 610 +int xhci_mtk_init_quirk(struct xhci_hcd *xhci);
 611 +void xhci_mtk_exit_quirk(struct xhci_hcd *xhci);
 612 +int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
 613 +               struct usb_host_endpoint *ep);
 614 +void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
 615 +               struct usb_host_endpoint *ep);
 616 +u32 xhci_mtk_td_remainder_quirk(unsigned int td_running_total,
 617 +       unsigned trb_buffer_length, struct urb *urb);
 618 +
 619 +#else
 620 +static inline int xhci_mtk_init_quirk(struct xhci_hcd *xhci)
 621 +{
 622 +       return 0;
 623 +}
 624 +
 625 +static inline void xhci_mtk_exit_quirk(struct xhci_hcd *xhci)
 626 +{
 627 +}
 628 +
 629 +static inline int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd,
 630 +       struct usb_device *udev, struct usb_host_endpoint *ep)
 631 +{
 632 +       return 0;
 633 +}
 634 +
 635 +static inline void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd,
 636 +       struct usb_device *udev, struct usb_host_endpoint *ep)
 637 +{
 638 +       return 0;
 639 +}
 640 +
 641 +static inline u32 xhci_mtk_td_remainder_quirk(unsigned int td_running_total,
 642 +       unsigned trb_buffer_length, struct urb *urb)
 643 +{
 644 +       return 0;
 645 +}
 646 +
 647 +#endif
 648 +
 649 +#endif         /* _XHCI_MTK_H_ */
 650 --- a/drivers/usb/host/xhci-plat.c
 651 +++ b/drivers/usb/host/xhci-plat.c
 652 @@ -23,6 +23,7 @@
 653  #include "xhci.h"
 654  #include "xhci-mvebu.h"
 655  #include "xhci-rcar.h"
 656 +#include "xhci-mtk.h"
 657
 658  static struct hc_driver __read_mostly xhci_plat_hc_driver;
 659
 660 @@ -49,7 +50,23 @@ static int xhci_plat_setup(struct usb_hc
 661                         return ret;
 662         }
 663
 664 -       return xhci_gen_setup(hcd, xhci_plat_quirks);
 665 +       ret = xhci_gen_setup(hcd, xhci_plat_quirks);
 666 +       if (ret)
 667 +               return ret;
 668 +
 669 +       if (of_device_is_compatible(of_node, "mediatek,mt8173-xhci")) {
 670 +               struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 671 +
 672 +               if (!usb_hcd_is_primary_hcd(hcd))
 673 +                       return 0;
 674 +               ret = xhci_mtk_init_quirk(xhci);
 675 +               if (ret) {
 676 +                       kfree(xhci);
 677 +                       return ret;
 678 +               }
 679 +       }
 680 +
 681 +       return ret;
 682  }
 683
 684  static int xhci_plat_start(struct usb_hcd *hcd)
 685 @@ -207,6 +224,8 @@ static int xhci_plat_remove(struct platf
 686         if (!IS_ERR(clk))
 687                 clk_disable_unprepare(clk);
 688         usb_put_hcd(hcd);
 689 +       if (xhci->quirks & XHCI_MTK_HOST)
 690 +               xhci_mtk_exit_quirk(xhci);
 691         kfree(xhci);
 692
 693         return 0;
 694 @@ -253,6 +272,7 @@ static const struct of_device_id usb_xhc
 695         { .compatible = "marvell,armada-380-xhci"},
 696         { .compatible = "renesas,xhci-r8a7790"},
 697         { .compatible = "renesas,xhci-r8a7791"},
 698 +       { .compatible = "mediatek,mt8173-xhci"},
 699         { },
 700  };
 701  MODULE_DEVICE_TABLE(of, usb_xhci_of_match);
 702 --- a/drivers/usb/host/xhci-ring.c
 703 +++ b/drivers/usb/host/xhci-ring.c
 704 @@ -68,6 +68,7 @@
 705  #include <linux/slab.h>
 706  #include "xhci.h"
 707  #include "xhci-trace.h"
 708 +#include "xhci-mtk.h"
 709
 710  /*
 711   * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
 712 @@ -3026,17 +3027,22 @@ static u32 xhci_td_remainder(struct xhci
 713  {
 714         u32 maxp, total_packet_count;
 715
 716 -       if (xhci->hci_version < 0x100)
 717 +       /* MTK xHCI is mostly 0.97 but contains some features from 1.0 */
 718 +       if (xhci->hci_version < 0x100 && !(xhci->quirks & XHCI_MTK_HOST))
 719                 return ((td_total_len - transferred) >> 10);
 720
 721 -       maxp = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
 722 -       total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
 723 -
 724         /* One TRB with a zero-length data packet. */
 725         if (num_trbs_left == 0 || (transferred == 0 && trb_buff_len == 0) ||
 726             trb_buff_len == td_total_len)
 727                 return 0;
 728
 729 +       /* for MTK xHCI, TD size doesn't include this TRB */
 730 +       if (xhci->quirks & XHCI_MTK_HOST)
 731 +               trb_buff_len = 0;
 732 +
 733 +       maxp = GET_MAX_PACKET(usb_endpoint_maxp(&urb->ep->desc));
 734 +       total_packet_count = DIV_ROUND_UP(td_total_len, maxp);
 735 +
 736         /* Queueing functions don't count the current TRB into transferred */
 737         return (total_packet_count - ((transferred + trb_buff_len) / maxp));
 738  }
 739 @@ -3424,7 +3430,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *
 740                 field |= 0x1;
 741
 742         /* xHCI 1.0/1.1 6.4.1.2.1: Transfer Type field */
 743 -       if (xhci->hci_version >= 0x100) {
 744 +       if ((xhci->hci_version >= 0x100) || (xhci->quirks & XHCI_MTK_HOST)) {
 745                 if (urb->transfer_buffer_length > 0) {
 746                         if (setup->bRequestType & USB_DIR_IN)
 747                                 field |= TRB_TX_TYPE(TRB_DATA_IN);
 748 --- a/drivers/usb/host/xhci.c
 749 +++ b/drivers/usb/host/xhci.c
 750 @@ -31,6 +31,7 @@
 751
 752  #include "xhci.h"
 753  #include "xhci-trace.h"
 754 +#include "xhci-mtk.h"
 755
 756  #define DRIVER_AUTHOR "Sarah Sharp"
 757  #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
 758 @@ -634,7 +635,11 @@ int xhci_run(struct usb_hcd *hcd)
 759                         "// Set the interrupt modulation register");
 760         temp = readl(&xhci->ir_set->irq_control);
 761         temp &= ~ER_IRQ_INTERVAL_MASK;
 762 -       temp |= (u32) 160;
 763 +       /*
 764 +        * the increment interval is 8 times as much as that defined
 765 +        * in xHCI spec on MTK's controller
 766 +        */
 767 +       temp |= (u32) ((xhci->quirks & XHCI_MTK_HOST) ? 20 : 160);
 768         writel(temp, &xhci->ir_set->irq_control);
 769
 770         /* Set the HCD state before we enable the irqs */
 771 @@ -1710,6 +1715,9 @@ int xhci_drop_endpoint(struct usb_hcd *h
 772
 773         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
 774
 775 +       if (xhci->quirks & XHCI_MTK_HOST)
 776 +               xhci_mtk_drop_ep_quirk(hcd, udev, ep);
 777 +
 778         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
 779                         (unsigned int) ep->desc.bEndpointAddress,
 780                         udev->slot_id,
 781 @@ -1805,6 +1813,12 @@ int xhci_add_endpoint(struct usb_hcd *hc
 782                 return -ENOMEM;
 783         }
 784
 785 +       if (xhci->quirks & XHCI_MTK_HOST) {
 786 +               ret = xhci_mtk_add_ep_quirk(hcd, udev, ep);
 787 +               if (ret < 0)
 788 +                       return ret;
 789 +       }
 790 +
 791         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
 792         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
 793
 794 --- a/drivers/usb/host/xhci.h
 795 +++ b/drivers/usb/host/xhci.h
 796 @@ -1570,6 +1570,7 @@ struct xhci_hcd {
 797  /* For controllers with a broken beyond repair streams implementation */
 798  #define XHCI_BROKEN_STREAMS    (1 << 19)
 799  #define XHCI_PME_STUCK_QUIRK   (1 << 20)
 800 +#define XHCI_MTK_HOST          (1 << 21)
 801  #define XHCI_SSIC_PORT_UNUSED  (1 << 22)
 802         unsigned int            num_active_eps;
 803         unsigned int            limit_active_eps;