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generic/4.4: remove ISSI SI25CD512 SPI flash support patch
[openwrt/svn-archive/archive.git] / target / linux / mediatek / patches / 0051-pinctrl-mediatek-add-mtk_pctrl_spec_pull_set_samereg.patch
1 From aefbeb75a32e080445d72ddd4b9ab28c258597d0 Mon Sep 17 00:00:00 2001
2 From: Yingjoe Chen <yingjoe.chen@mediatek.com>
3 Date: Mon, 18 May 2015 23:11:15 -0700
4 Subject: [PATCH 51/76] pinctrl: mediatek: add mtk_pctrl_spec_pull_set_samereg
5 common code
6
7 Several mediatek soc use similar pull setting procedure as mt8173,
8 the pupd enable and resistance setting are in the same register.
9 Add common code mtk_pctrl_spec_pull_set_samereg out of spec_pull_set
10 in mt8173 to handle this case, so future soc driver can use it.
11
12 Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
13 Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
14 ---
15 drivers/pinctrl/mediatek/pinctrl-mt8173.c | 166 +++++++------------------
16 drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 60 +++++++++
17 drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 31 +++++
18 3 files changed, 136 insertions(+), 121 deletions(-)
19
20 --- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c
21 +++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
22 @@ -47,130 +47,54 @@ struct mtk_pin_ies_smt_set {
23 .offset = _offset, \
24 }
25
26 -/**
27 - * struct mtk_pin_spec_pupd_set - For special pins' pull up/down setting.
28 - * @pin: The pin number.
29 - * @offset: The offset of special pull up/down setting register.
30 - * @pupd_bit: The pull up/down bit in this register.
31 - * @r0_bit: The r0 bit of pull resistor.
32 - * @r1_bit: The r1 bit of pull resistor.
33 - */
34 -struct mtk_pin_spec_pupd_set {
35 - unsigned int pin;
36 - unsigned int offset;
37 - unsigned char pupd_bit;
38 - unsigned char r1_bit;
39 - unsigned char r0_bit;
40 +static const struct mtk_pin_spec_pupd_set_samereg mt8173_spec_pupd[] = {
41 + MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */
42 + MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */
43 + MTK_PIN_PUPD_SPEC_SR(121, 0xe00, 10, 9, 8), /* KROW2 */
44 + MTK_PIN_PUPD_SPEC_SR(122, 0xe10, 2, 1, 0), /* KCOL0 */
45 + MTK_PIN_PUPD_SPEC_SR(123, 0xe10, 6, 5, 4), /* KCOL1 */
46 + MTK_PIN_PUPD_SPEC_SR(124, 0xe10, 10, 9, 8), /* KCOL2 */
47 +
48 + MTK_PIN_PUPD_SPEC_SR(67, 0xd10, 2, 1, 0), /* ms0 DS */
49 + MTK_PIN_PUPD_SPEC_SR(68, 0xd00, 2, 1, 0), /* ms0 RST */
50 + MTK_PIN_PUPD_SPEC_SR(66, 0xc10, 2, 1, 0), /* ms0 cmd */
51 + MTK_PIN_PUPD_SPEC_SR(65, 0xc00, 2, 1, 0), /* ms0 clk */
52 + MTK_PIN_PUPD_SPEC_SR(57, 0xc20, 2, 1, 0), /* ms0 data0 */
53 + MTK_PIN_PUPD_SPEC_SR(58, 0xc20, 2, 1, 0), /* ms0 data1 */
54 + MTK_PIN_PUPD_SPEC_SR(59, 0xc20, 2, 1, 0), /* ms0 data2 */
55 + MTK_PIN_PUPD_SPEC_SR(60, 0xc20, 2, 1, 0), /* ms0 data3 */
56 + MTK_PIN_PUPD_SPEC_SR(61, 0xc20, 2, 1, 0), /* ms0 data4 */
57 + MTK_PIN_PUPD_SPEC_SR(62, 0xc20, 2, 1, 0), /* ms0 data5 */
58 + MTK_PIN_PUPD_SPEC_SR(63, 0xc20, 2, 1, 0), /* ms0 data6 */
59 + MTK_PIN_PUPD_SPEC_SR(64, 0xc20, 2, 1, 0), /* ms0 data7 */
60 +
61 + MTK_PIN_PUPD_SPEC_SR(78, 0xc50, 2, 1, 0), /* ms1 cmd */
62 + MTK_PIN_PUPD_SPEC_SR(73, 0xd20, 2, 1, 0), /* ms1 dat0 */
63 + MTK_PIN_PUPD_SPEC_SR(74, 0xd20, 6, 5, 4), /* ms1 dat1 */
64 + MTK_PIN_PUPD_SPEC_SR(75, 0xd20, 10, 9, 8), /* ms1 dat2 */
65 + MTK_PIN_PUPD_SPEC_SR(76, 0xd20, 14, 13, 12), /* ms1 dat3 */
66 + MTK_PIN_PUPD_SPEC_SR(77, 0xc40, 2, 1, 0), /* ms1 clk */
67 +
68 + MTK_PIN_PUPD_SPEC_SR(100, 0xd40, 2, 1, 0), /* ms2 dat0 */
69 + MTK_PIN_PUPD_SPEC_SR(101, 0xd40, 6, 5, 4), /* ms2 dat1 */
70 + MTK_PIN_PUPD_SPEC_SR(102, 0xd40, 10, 9, 8), /* ms2 dat2 */
71 + MTK_PIN_PUPD_SPEC_SR(103, 0xd40, 14, 13, 12), /* ms2 dat3 */
72 + MTK_PIN_PUPD_SPEC_SR(104, 0xc80, 2, 1, 0), /* ms2 clk */
73 + MTK_PIN_PUPD_SPEC_SR(105, 0xc90, 2, 1, 0), /* ms2 cmd */
74 +
75 + MTK_PIN_PUPD_SPEC_SR(22, 0xd60, 2, 1, 0), /* ms3 dat0 */
76 + MTK_PIN_PUPD_SPEC_SR(23, 0xd60, 6, 5, 4), /* ms3 dat1 */
77 + MTK_PIN_PUPD_SPEC_SR(24, 0xd60, 10, 9, 8), /* ms3 dat2 */
78 + MTK_PIN_PUPD_SPEC_SR(25, 0xd60, 14, 13, 12), /* ms3 dat3 */
79 + MTK_PIN_PUPD_SPEC_SR(26, 0xcc0, 2, 1, 0), /* ms3 clk */
80 + MTK_PIN_PUPD_SPEC_SR(27, 0xcd0, 2, 1, 0) /* ms3 cmd */
81 };
82
83 -#define MTK_PIN_PUPD_SPEC(_pin, _offset, _pupd, _r1, _r0) \
84 - { \
85 - .pin = _pin, \
86 - .offset = _offset, \
87 - .pupd_bit = _pupd, \
88 - .r1_bit = _r1, \
89 - .r0_bit = _r0, \
90 - }
91 -
92 -static const struct mtk_pin_spec_pupd_set mt8173_spec_pupd[] = {
93 - MTK_PIN_PUPD_SPEC(119, 0xe00, 2, 1, 0), /* KROW0 */
94 - MTK_PIN_PUPD_SPEC(120, 0xe00, 6, 5, 4), /* KROW1 */
95 - MTK_PIN_PUPD_SPEC(121, 0xe00, 10, 9, 8), /* KROW2 */
96 - MTK_PIN_PUPD_SPEC(122, 0xe10, 2, 1, 0), /* KCOL0 */
97 - MTK_PIN_PUPD_SPEC(123, 0xe10, 6, 5, 4), /* KCOL1 */
98 - MTK_PIN_PUPD_SPEC(124, 0xe10, 10, 9, 8), /* KCOL2 */
99 -
100 - MTK_PIN_PUPD_SPEC(67, 0xd10, 2, 1, 0), /* ms0 DS */
101 - MTK_PIN_PUPD_SPEC(68, 0xd00, 2, 1, 0), /* ms0 RST */
102 - MTK_PIN_PUPD_SPEC(66, 0xc10, 2, 1, 0), /* ms0 cmd */
103 - MTK_PIN_PUPD_SPEC(65, 0xc00, 2, 1, 0), /* ms0 clk */
104 - MTK_PIN_PUPD_SPEC(57, 0xc20, 2, 1, 0), /* ms0 data0 */
105 - MTK_PIN_PUPD_SPEC(58, 0xc20, 2, 1, 0), /* ms0 data1 */
106 - MTK_PIN_PUPD_SPEC(59, 0xc20, 2, 1, 0), /* ms0 data2 */
107 - MTK_PIN_PUPD_SPEC(60, 0xc20, 2, 1, 0), /* ms0 data3 */
108 - MTK_PIN_PUPD_SPEC(61, 0xc20, 2, 1, 0), /* ms0 data4 */
109 - MTK_PIN_PUPD_SPEC(62, 0xc20, 2, 1, 0), /* ms0 data5 */
110 - MTK_PIN_PUPD_SPEC(63, 0xc20, 2, 1, 0), /* ms0 data6 */
111 - MTK_PIN_PUPD_SPEC(64, 0xc20, 2, 1, 0), /* ms0 data7 */
112 -
113 - MTK_PIN_PUPD_SPEC(78, 0xc50, 2, 1, 0), /* ms1 cmd */
114 - MTK_PIN_PUPD_SPEC(73, 0xd20, 2, 1, 0), /* ms1 dat0 */
115 - MTK_PIN_PUPD_SPEC(74, 0xd20, 6, 5, 4), /* ms1 dat1 */
116 - MTK_PIN_PUPD_SPEC(75, 0xd20, 10, 9, 8), /* ms1 dat2 */
117 - MTK_PIN_PUPD_SPEC(76, 0xd20, 14, 13, 12), /* ms1 dat3 */
118 - MTK_PIN_PUPD_SPEC(77, 0xc40, 2, 1, 0), /* ms1 clk */
119 -
120 - MTK_PIN_PUPD_SPEC(100, 0xd40, 2, 1, 0), /* ms2 dat0 */
121 - MTK_PIN_PUPD_SPEC(101, 0xd40, 6, 5, 4), /* ms2 dat1 */
122 - MTK_PIN_PUPD_SPEC(102, 0xd40, 10, 9, 8), /* ms2 dat2 */
123 - MTK_PIN_PUPD_SPEC(103, 0xd40, 14, 13, 12), /* ms2 dat3 */
124 - MTK_PIN_PUPD_SPEC(104, 0xc80, 2, 1, 0), /* ms2 clk */
125 - MTK_PIN_PUPD_SPEC(105, 0xc90, 2, 1, 0), /* ms2 cmd */
126 -
127 - MTK_PIN_PUPD_SPEC(22, 0xd60, 2, 1, 0), /* ms3 dat0 */
128 - MTK_PIN_PUPD_SPEC(23, 0xd60, 6, 5, 4), /* ms3 dat1 */
129 - MTK_PIN_PUPD_SPEC(24, 0xd60, 10, 9, 8), /* ms3 dat2 */
130 - MTK_PIN_PUPD_SPEC(25, 0xd60, 14, 13, 12), /* ms3 dat3 */
131 - MTK_PIN_PUPD_SPEC(26, 0xcc0, 2, 1, 0), /* ms3 clk */
132 - MTK_PIN_PUPD_SPEC(27, 0xcd0, 2, 1, 0) /* ms3 cmd */
133 -};
134 -
135 -static int spec_pull_set(struct regmap *regmap, unsigned int pin,
136 +static int mt8173_spec_pull_set(struct regmap *regmap, unsigned int pin,
137 unsigned char align, bool isup, unsigned int r1r0)
138 {
139 - unsigned int i;
140 - unsigned int reg_pupd, reg_set, reg_rst;
141 - unsigned int bit_pupd, bit_r0, bit_r1;
142 - const struct mtk_pin_spec_pupd_set *spec_pupd_pin;
143 - bool find = false;
144 -
145 - for (i = 0; i < ARRAY_SIZE(mt8173_spec_pupd); i++) {
146 - if (pin == mt8173_spec_pupd[i].pin) {
147 - find = true;
148 - break;
149 - }
150 - }
151 -
152 - if (!find)
153 - return -EINVAL;
154 -
155 - spec_pupd_pin = mt8173_spec_pupd + i;
156 - reg_set = spec_pupd_pin->offset + align;
157 - reg_rst = spec_pupd_pin->offset + (align << 1);
158 -
159 - if (isup)
160 - reg_pupd = reg_rst;
161 - else
162 - reg_pupd = reg_set;
163 -
164 - bit_pupd = BIT(spec_pupd_pin->pupd_bit);
165 - regmap_write(regmap, reg_pupd, bit_pupd);
166 -
167 - bit_r0 = BIT(spec_pupd_pin->r0_bit);
168 - bit_r1 = BIT(spec_pupd_pin->r1_bit);
169 -
170 - switch (r1r0) {
171 - case MTK_PUPD_SET_R1R0_00:
172 - regmap_write(regmap, reg_rst, bit_r0);
173 - regmap_write(regmap, reg_rst, bit_r1);
174 - break;
175 - case MTK_PUPD_SET_R1R0_01:
176 - regmap_write(regmap, reg_set, bit_r0);
177 - regmap_write(regmap, reg_rst, bit_r1);
178 - break;
179 - case MTK_PUPD_SET_R1R0_10:
180 - regmap_write(regmap, reg_rst, bit_r0);
181 - regmap_write(regmap, reg_set, bit_r1);
182 - break;
183 - case MTK_PUPD_SET_R1R0_11:
184 - regmap_write(regmap, reg_set, bit_r0);
185 - regmap_write(regmap, reg_set, bit_r1);
186 - break;
187 - default:
188 - return -EINVAL;
189 - }
190 -
191 - return 0;
192 + return mtk_pctrl_spec_pull_set_samereg(regmap, mt8173_spec_pupd,
193 + ARRAY_SIZE(mt8173_spec_pupd), pin, align, isup, r1r0);
194 }
195
196 static const struct mtk_pin_ies_smt_set mt8173_ies_smt_set[] = {
197 @@ -382,7 +306,7 @@ static const struct mtk_pinctrl_devdata
198 .n_grp_cls = ARRAY_SIZE(mt8173_drv_grp),
199 .pin_drv_grp = mt8173_pin_drv,
200 .n_pin_drv_grps = ARRAY_SIZE(mt8173_pin_drv),
201 - .spec_pull_set = spec_pull_set,
202 + .spec_pull_set = mt8173_spec_pull_set,
203 .spec_ies_smt_set = spec_ies_smt_set,
204 .dir_offset = 0x0000,
205 .pullen_offset = 0x0100,
206 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
207 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
208 @@ -186,6 +186,66 @@ static int mtk_pconf_set_driving(struct
209 return -EINVAL;
210 }
211
212 +int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap,
213 + const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
214 + unsigned int info_num, unsigned int pin,
215 + unsigned char align, bool isup, unsigned int r1r0)
216 +{
217 + unsigned int i;
218 + unsigned int reg_pupd, reg_set, reg_rst;
219 + unsigned int bit_pupd, bit_r0, bit_r1;
220 + const struct mtk_pin_spec_pupd_set_samereg *spec_pupd_pin;
221 + bool find = false;
222 +
223 + for (i = 0; i < info_num; i++) {
224 + if (pin == pupd_infos[i].pin) {
225 + find = true;
226 + break;
227 + }
228 + }
229 +
230 + if (!find)
231 + return -EINVAL;
232 +
233 + spec_pupd_pin = pupd_infos + i;
234 + reg_set = spec_pupd_pin->offset + align;
235 + reg_rst = spec_pupd_pin->offset + (align << 1);
236 +
237 + if (isup)
238 + reg_pupd = reg_rst;
239 + else
240 + reg_pupd = reg_set;
241 +
242 + bit_pupd = BIT(spec_pupd_pin->pupd_bit);
243 + regmap_write(regmap, reg_pupd, bit_pupd);
244 +
245 + bit_r0 = BIT(spec_pupd_pin->r0_bit);
246 + bit_r1 = BIT(spec_pupd_pin->r1_bit);
247 +
248 + switch (r1r0) {
249 + case MTK_PUPD_SET_R1R0_00:
250 + regmap_write(regmap, reg_rst, bit_r0);
251 + regmap_write(regmap, reg_rst, bit_r1);
252 + break;
253 + case MTK_PUPD_SET_R1R0_01:
254 + regmap_write(regmap, reg_set, bit_r0);
255 + regmap_write(regmap, reg_rst, bit_r1);
256 + break;
257 + case MTK_PUPD_SET_R1R0_10:
258 + regmap_write(regmap, reg_rst, bit_r0);
259 + regmap_write(regmap, reg_set, bit_r1);
260 + break;
261 + case MTK_PUPD_SET_R1R0_11:
262 + regmap_write(regmap, reg_set, bit_r0);
263 + regmap_write(regmap, reg_set, bit_r1);
264 + break;
265 + default:
266 + return -EINVAL;
267 + }
268 +
269 + return 0;
270 +}
271 +
272 static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl,
273 unsigned int pin, bool enable, bool isup, unsigned int arg)
274 {
275 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
276 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
277 @@ -117,6 +117,32 @@ struct mtk_pin_drv_grp {
278 .grp = _grp, \
279 }
280
281 +/**
282 + * struct mtk_pin_spec_pupd_set_samereg
283 + * - For special pins' pull up/down setting which resides in same register
284 + * @pin: The pin number.
285 + * @offset: The offset of special pull up/down setting register.
286 + * @pupd_bit: The pull up/down bit in this register.
287 + * @r0_bit: The r0 bit of pull resistor.
288 + * @r1_bit: The r1 bit of pull resistor.
289 + */
290 +struct mtk_pin_spec_pupd_set_samereg {
291 + unsigned short pin;
292 + unsigned short offset;
293 + unsigned char pupd_bit;
294 + unsigned char r1_bit;
295 + unsigned char r0_bit;
296 +};
297 +
298 +#define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \
299 + { \
300 + .pin = _pin, \
301 + .offset = _offset, \
302 + .pupd_bit = _pupd, \
303 + .r1_bit = _r1, \
304 + .r0_bit = _r0, \
305 + }
306 +
307 struct mtk_eint_offsets {
308 const char *name;
309 unsigned int stat;
310 @@ -220,4 +246,9 @@ struct mtk_pinctrl {
311 int mtk_pctrl_init(struct platform_device *pdev,
312 const struct mtk_pinctrl_devdata *data);
313
314 +int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap,
315 + const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
316 + unsigned int info_num, unsigned int pin,
317 + unsigned char align, bool isup, unsigned int r1r0);
318 +
319 #endif /* __PINCTRL_MTK_COMMON_H */
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