mpc85xx: add missing devicetree ranges property for ethernet devices
[openwrt/svn-archive/archive.git] / target / linux / mpc85xx / patches-3.14 / 140-powerpc-85xx-tl-wdr4900-v1-support.patch
1 From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 20 Feb 2013 08:40:33 +0100
4 Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
5 board
6
7 This patch adds support for the TP-Link TL-WDR4900 v1
8 concurrent dual-band wireless router. The devices uses
9 the Freescale P1014 SoC.
10
11 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
12 ---
13 arch/powerpc/boot/Makefile | 3 +
14 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 +++++++++++++++++++++
15 arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 212 ++++++++++++++++++++++++++++
16 arch/powerpc/boot/wrapper | 4 +
17 arch/powerpc/platforms/85xx/Kconfig | 11 ++
18 arch/powerpc/platforms/85xx/Makefile | 1 +
19 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++
20 7 files changed, 540 insertions(+)
21 create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
22 create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
23 create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
24
25 --- a/arch/powerpc/boot/Makefile
26 +++ b/arch/powerpc/boot/Makefile
27 @@ -99,6 +99,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
28 src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
29 src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
30 src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
31 +src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
32 +
33
34 src-wlib := $(sort $(src-wlib-y))
35 src-plat := $(sort $(src-plat-y))
36 @@ -279,6 +281,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
37 image-$(CONFIG_TQM8560) += cuImage.tqm8560
38 image-$(CONFIG_SBC8548) += cuImage.sbc8548
39 image-$(CONFIG_KSI8560) += cuImage.ksi8560
40 +image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
41
42 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig
43 image-$(CONFIG_STORCENTER) += cuImage.storcenter
44 --- /dev/null
45 +++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
46 @@ -0,0 +1,164 @@
47 +/*
48 + * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
49 + *
50 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
51 + *
52 + * Based on:
53 + * cuboot-85xx.c
54 + * Author: Scott Wood <scottwood@freescale.com>
55 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
56 + *
57 + * simpleboot.c
58 + * Authors: Scott Wood <scottwood@freescale.com>
59 + * Grant Likely <grant.likely@secretlab.ca>
60 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
61 + * Copyright (c) 2008 Secret Lab Technologies Ltd.
62 + *
63 + * This program is free software; you can redistribute it and/or modify it
64 + * under the terms of the GNU General Public License version 2 as published
65 + * by the Free Software Foundation.
66 + */
67 +
68 +#include "ops.h"
69 +#include "types.h"
70 +#include "io.h"
71 +#include "stdio.h"
72 +#include <libfdt.h>
73 +
74 +BSS_STACK(4*1024);
75 +
76 +static unsigned long bus_freq;
77 +static unsigned long int_freq;
78 +static u64 mem_size;
79 +static unsigned char enetaddr[6];
80 +
81 +static void process_boot_dtb(void *boot_dtb)
82 +{
83 + const u32 *na, *ns, *reg, *val32;
84 + const char *path;
85 + u64 memsize64;
86 + int node, size, i;
87 +
88 + /* Make sure FDT blob is sane */
89 + if (fdt_check_header(boot_dtb) != 0)
90 + fatal("Invalid device tree blob\n");
91 +
92 + /* Find the #address-cells and #size-cells properties */
93 + node = fdt_path_offset(boot_dtb, "/");
94 + if (node < 0)
95 + fatal("Cannot find root node\n");
96 + na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
97 + if (!na || (size != 4))
98 + fatal("Cannot find #address-cells property");
99 +
100 + ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
101 + if (!ns || (size != 4))
102 + fatal("Cannot find #size-cells property");
103 +
104 + /* Find the memory range */
105 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
106 + "memory", sizeof("memory"));
107 + if (node < 0)
108 + fatal("Cannot find memory node\n");
109 + reg = fdt_getprop(boot_dtb, node, "reg", &size);
110 + if (size < (*na+*ns) * sizeof(u32))
111 + fatal("cannot get memory range\n");
112 +
113 + /* Only interested in memory based at 0 */
114 + for (i = 0; i < *na; i++)
115 + if (*reg++ != 0)
116 + fatal("Memory range is not based at address 0\n");
117 +
118 + /* get the memsize and trucate it to under 4G on 32 bit machines */
119 + memsize64 = 0;
120 + for (i = 0; i < *ns; i++)
121 + memsize64 = (memsize64 << 32) | *reg++;
122 + if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
123 + memsize64 = 0xffffffff;
124 +
125 + mem_size = memsize64;
126 +
127 + /* get clock frequencies */
128 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
129 + "cpu", sizeof("cpu"));
130 + if (!node)
131 + fatal("Cannot find cpu node\n");
132 +
133 + val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
134 + if (!val32 || (size != 4))
135 + fatal("Cannot get clock frequency");
136 +
137 + int_freq = *val32;
138 +
139 + val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
140 + if (!val32 || (size != 4))
141 + fatal("Cannot get bus frequency");
142 +
143 + bus_freq = *val32;
144 +
145 + path = fdt_get_alias(boot_dtb, "ethernet0");
146 + if (path) {
147 + const void *p;
148 +
149 + node = fdt_path_offset(boot_dtb, path);
150 + if (node < 0)
151 + fatal("Cannot find ethernet0 node");
152 +
153 + p = fdt_getprop(boot_dtb, node, "mac-address", &size);
154 + if (!p || (size < 6)) {
155 + printf("no mac-address property, finding local\n\r");
156 + p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
157 + }
158 +
159 + if (!p || (size < 6))
160 + fatal("cannot get MAC addres");
161 +
162 + memcpy(enetaddr, p, sizeof(enetaddr));
163 + }
164 +}
165 +
166 +static void platform_fixups(void)
167 +{
168 + void *soc;
169 +
170 + dt_fixup_memory(0, mem_size);
171 +
172 + dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
173 + dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
174 +
175 + /* Unfortunately, the specific model number is encoded in the
176 + * soc node name in existing dts files -- once that is fixed,
177 + * this can do a simple path lookup.
178 + */
179 + soc = find_node_by_devtype(NULL, "soc");
180 + if (soc) {
181 + void *serial = NULL;
182 +
183 + setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
184 +
185 + while ((serial = find_node_by_devtype(serial, "serial"))) {
186 + if (get_parent(serial) != soc)
187 + continue;
188 +
189 + setprop(serial, "clock-frequency", &bus_freq,
190 + sizeof(bus_freq));
191 + }
192 + }
193 +}
194 +
195 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
196 + unsigned long r6, unsigned long r7)
197 +{
198 + mem_size = 64 * 1024 * 1024;
199 +
200 + simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
201 +
202 + fdt_init(_dtb_start);
203 + serial_console_init();
204 +
205 + printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
206 +
207 + process_boot_dtb((void *) r3);
208 +
209 + platform_ops.fixups = platform_fixups;
210 +}
211 --- /dev/null
212 +++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
213 @@ -0,0 +1,212 @@
214 +/*
215 + * TP-Link TL-WDR4900 v1 Device Tree Source
216 + *
217 + * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
218 + *
219 + * This program is free software; you can redistribute it and/or modify it
220 + * under the terms of the GNU General Public License as published by the
221 + * Free Software Foundation; either version 2 of the License, or (at your
222 + * option) any later version.
223 + */
224 +
225 +/include/ "fsl/p1010si-pre.dtsi"
226 +
227 +/ {
228 + model = "TP-Link TL-WDR4900 v1";
229 + compatible = "tp-link,TL-WDR4900v1";
230 +
231 + chosen {
232 + bootargs = "console=ttyS0,115200";
233 +/*
234 + linux,stdout-path = "/soc@ffe00000/serial@4500";
235 +*/
236 + };
237 +
238 + aliases {
239 + spi0 = &spi0;
240 + };
241 +
242 + memory {
243 + device_type = "memory";
244 + };
245 +
246 + soc: soc@ffe00000 {
247 + ranges = <0x0 0x0 0xffe00000 0x100000>;
248 +
249 + spi0: spi@7000 {
250 + flash@0 {
251 + #address-cells = <1>;
252 + #size-cells = <1>;
253 + compatible = "spansion,s25fl129p1";
254 + reg = <0>;
255 + spi-max-frequency = <25000000>;
256 +
257 + u-boot@0 {
258 + reg = <0x0 0x0050000>;
259 + label = "u-boot";
260 + read-only;
261 + };
262 +
263 + dtb@50000 {
264 + reg = <0x00050000 0x00010000>;
265 + label = "dtb";
266 + read-only;
267 + };
268 +
269 + kernel@60000 {
270 + reg = <0x00060000 0x002a0000>;
271 + label = "kernel";
272 + };
273 +
274 + rootfs@300000 {
275 + reg = <0x00300000 0x00ce0000>;
276 + label = "rootfs";
277 + };
278 +
279 + config@fe0000 {
280 + reg = <0x00fe0000 0x00010000>;
281 + label = "config";
282 + read-only;
283 + };
284 +
285 + caldata@ff0000 {
286 + reg = <0x00ff0000 0x00010000>;
287 + label = "caldata";
288 + read-only;
289 + };
290 +
291 + firmware@60000 {
292 + reg = <0x00060000 0x00f80000>;
293 + label = "firmware";
294 + };
295 + };
296 + };
297 +
298 + gpio0: gpio-controller@f000 {
299 + };
300 +
301 + usb@22000 {
302 + phy_type = "utmi";
303 + dr_mode = "host";
304 + };
305 +
306 + mdio@24000 {
307 + phy0: ethernet-phy@0 {
308 + reg = <0x0>;
309 + qca,ar8327-initvals = <
310 + 0x00004 0x07600000 /* PAD0_MODE */
311 + 0x00008 0x00000000 /* PAD5_MODE */
312 + 0x0000c 0x01000000 /* PAD6_MODE */
313 + 0x00010 0x40000000 /* POWER_ON_STRIP */
314 + 0x00050 0xcf35cf35 /* LED_CTRL0 */
315 + 0x00054 0xcf35cf35 /* LED_CTRL1 */
316 + 0x00058 0xcf35cf35 /* LED_CTRL2 */
317 + 0x0005c 0x03ffff00 /* LED_CTRL3 */
318 + 0x0007c 0x0000007e /* PORT0_STATUS */
319 + >;
320 + };
321 + };
322 +
323 + mdio@25000 {
324 + status = "disabled";
325 + };
326 +
327 + mdio@26000 {
328 + status = "disabled";
329 + };
330 +
331 + enet0: ethernet@b0000 {
332 + phy-handle = <&phy0>;
333 + phy-connection-type = "rgmii-id";
334 + };
335 +
336 + enet1: ethernet@b1000 {
337 + status = "disabled";
338 + };
339 +
340 + enet2: ethernet@b2000 {
341 + status = "disabled";
342 + };
343 +
344 + sdhc@2e000 {
345 + status = "disabled";
346 + };
347 +
348 + serial1: serial@4600 {
349 + status = "disabled";
350 + };
351 +
352 + can0: can@1c000 {
353 + status = "disabled";
354 + };
355 +
356 + can1: can@1d000 {
357 + status = "disabled";
358 + };
359 + };
360 +
361 + pci0: pcie@ffe09000 {
362 + reg = <0 0xffe09000 0 0x1000>;
363 + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
364 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
365 + pcie@0 {
366 + ranges = <0x2000000 0x0 0xa0000000
367 + 0x2000000 0x0 0xa0000000
368 + 0x0 0x20000000
369 +
370 + 0x1000000 0x0 0x0
371 + 0x1000000 0x0 0x0
372 + 0x0 0x100000>;
373 + };
374 + };
375 +
376 + pci1: pcie@ffe0a000 {
377 + reg = <0 0xffe0a000 0 0x1000>;
378 + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
379 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
380 + pcie@0 {
381 + ranges = <0x2000000 0x0 0x80000000
382 + 0x2000000 0x0 0x80000000
383 + 0x0 0x20000000
384 +
385 + 0x1000000 0x0 0x0
386 + 0x1000000 0x0 0x0
387 + 0x0 0x100000>;
388 + };
389 + };
390 +
391 + ifc: ifc@ffe1e000 {
392 + status = "disabled";
393 + };
394 +
395 + leds {
396 + compatible = "gpio-leds";
397 +
398 + system {
399 + gpios = <&gpio0 2 1>; /* active low */
400 + label = "tp-link:blue:system";
401 + };
402 +
403 + usb1 {
404 + gpios = <&gpio0 3 1>; /* active low */
405 + label = "tp-link:green:usb1";
406 + };
407 +
408 + usb2 {
409 + gpios = <&gpio0 4 1>; /* active low */
410 + label = "tp-link:green:usb2";
411 + };
412 + };
413 +
414 + buttons {
415 + compatible = "gpio-keys";
416 +
417 + reset {
418 + label = "Reset button";
419 + gpios = <&gpio0 5 1>; /* active low */
420 + linux,code = <0x198>; /* KEY_RESTART */
421 + };
422 + };
423 +};
424 +
425 +/include/ "fsl/p1010si-post.dtsi"
426 --- a/arch/powerpc/boot/wrapper
427 +++ b/arch/powerpc/boot/wrapper
428 @@ -205,6 +205,10 @@ cuboot*)
429 *-mpc85*|*-tqm85*|*-sbc85*)
430 platformo=$object/cuboot-85xx.o
431 ;;
432 + *-tl-wdr4900-v1)
433 + platformo=$object/cuboot-tl-wdr4900-v1.o
434 + link_address='0x1000000'
435 + ;;
436 *-amigaone)
437 link_address='0x800000'
438 ;;
439 --- a/arch/powerpc/platforms/85xx/Kconfig
440 +++ b/arch/powerpc/platforms/85xx/Kconfig
441 @@ -159,6 +159,17 @@ config STX_GP3
442 select CPM2
443 select DEFAULT_UIMAGE
444
445 +config TL_WDR4900_V1
446 + bool "TP-Link TL-WDR4900 v1"
447 + select DEFAULT_UIMAGE
448 + select ARCH_REQUIRE_GPIOLIB
449 + select GPIO_MPC8XXX
450 + help
451 + This option enables support for the TP-Link TL-WDR4900 v1 board.
452 +
453 + This board is a Concurrent Dual-Band wireless router with a
454 + Freescale P1014 SoC.
455 +
456 config TQM8540
457 bool "TQ Components TQM8540"
458 help
459 --- a/arch/powerpc/platforms/85xx/Makefile
460 +++ b/arch/powerpc/platforms/85xx/Makefile
461 @@ -22,6 +22,7 @@ obj-$(CONFIG_TWR_P102x) += twr_p102x.o
462 obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
463 obj-$(CONFIG_STX_GP3) += stx_gp3.o
464 obj-$(CONFIG_TQM85xx) += tqm85xx.o
465 +obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
466 obj-$(CONFIG_SBC8548) += sbc8548.o
467 obj-$(CONFIG_PPA8548) += ppa8548.o
468 obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
469 --- /dev/null
470 +++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
471 @@ -0,0 +1,145 @@
472 +/*
473 + * TL-WDR4900 v1 board setup
474 + *
475 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
476 + *
477 + * Based on:
478 + * p1010rdb.c:
479 + * P1010RDB Board Setup
480 + * Copyright 2011 Freescale Semiconductor Inc.
481 + *
482 + * This program is free software; you can redistribute it and/or modify it
483 + * under the terms of the GNU General Public License as published by the
484 + * Free Software Foundation; either version 2 of the License, or (at your
485 + * option) any later version.
486 + */
487 +
488 +#include <linux/stddef.h>
489 +#include <linux/kernel.h>
490 +#include <linux/pci.h>
491 +#include <linux/delay.h>
492 +#include <linux/interrupt.h>
493 +#include <linux/of_platform.h>
494 +#include <linux/ath9k_platform.h>
495 +#include <linux/leds.h>
496 +
497 +#include <asm/time.h>
498 +#include <asm/machdep.h>
499 +#include <asm/pci-bridge.h>
500 +#include <mm/mmu_decl.h>
501 +#include <asm/prom.h>
502 +#include <asm/udbg.h>
503 +#include <asm/mpic.h>
504 +
505 +#include <sysdev/fsl_soc.h>
506 +#include <sysdev/fsl_pci.h>
507 +
508 +#include "mpc85xx.h"
509 +
510 +void __init tl_wdr4900_v1_pic_init(void)
511 +{
512 + struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
513 + MPIC_SINGLE_DEST_CPU,
514 + 0, 256, " OpenPIC ");
515 +
516 + BUG_ON(mpic == NULL);
517 +
518 + mpic_init(mpic);
519 +}
520 +
521 +#ifdef CONFIG_PCI
522 +static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
523 + {
524 + .name = "tp-link:blue:wps",
525 + .gpio = 1,
526 + .active_low = 1,
527 + },
528 +};
529 +
530 +static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
531 + .led_pin = 0,
532 + .eeprom_name = "pci_wmac0.eeprom",
533 + .leds = tl_wdr4900_v1_wmac_leds_gpio,
534 + .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
535 +};
536 +
537 +static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
538 + .led_pin = 0,
539 + .eeprom_name = "pci_wmac1.eeprom",
540 +};
541 +
542 +static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
543 +{
544 + if (!machine_is(tl_wdr4900_v1))
545 + return;
546 +
547 + if (dev->bus->number == 1 &&
548 + PCI_SLOT(dev->devfn) == 0) {
549 + dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
550 + return;
551 + }
552 +
553 + if (dev->bus->number == 3 &&
554 + PCI_SLOT(dev->devfn) == 0 &&
555 + dev->device == 0xabcd) {
556 + dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
557 +
558 + /*
559 + * The PCI header of the AR9381 chip is not programmed
560 + * correctly by the bootloader and the device uses wrong
561 + * data due to that. Replace the broken values with the
562 + * correct ones.
563 + */
564 + dev->device = 0x30;
565 + dev->class = 0x028000;
566 +
567 + pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
568 + }
569 +}
570 +
571 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
572 + tl_wdr4900_v1_pci_wmac_fixup);
573 +#endif /* CONFIG_PCI */
574 +
575 +/*
576 + * Setup the architecture
577 + */
578 +static void __init tl_wdr4900_v1_setup_arch(void)
579 +{
580 + if (ppc_md.progress)
581 + ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
582 +
583 + fsl_pci_assign_primary();
584 +
585 + printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
586 +}
587 +
588 +machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
589 +machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
590 +
591 +/*
592 + * Called very early, device-tree isn't unflattened
593 + */
594 +static int __init tl_wdr4900_v1_probe(void)
595 +{
596 + unsigned long root = of_get_flat_dt_root();
597 +
598 + if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
599 + return 1;
600 +
601 + return 0;
602 +}
603 +
604 +define_machine(tl_wdr4900_v1) {
605 + .name = "Freescale P1014",
606 + .probe = tl_wdr4900_v1_probe,
607 + .setup_arch = tl_wdr4900_v1_setup_arch,
608 + .init_IRQ = tl_wdr4900_v1_pic_init,
609 +#ifdef CONFIG_PCI
610 + .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
611 +#endif
612 + .get_irq = mpic_get_irq,
613 + .restart = fsl_rstcr_restart,
614 + .calibrate_decr = generic_calibrate_decr,
615 + .progress = udbg_progress,
616 +};