projects / openwrt / svn-archive / archive.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
mpc85xx: add 3.14 kernel support for mpc85xx platform
[openwrt/svn-archive/archive.git] / target / linux / mpc85xx / patches-3.14 / 140-powerpc-85xx-tl-wdr4900-v1-support.patch
1 From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 20 Feb 2013 08:40:33 +0100
4 Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
5 board
6
7 This patch adds support for the TP-Link TL-WDR4900 v1
8 concurrent dual-band wireless router. The devices uses
9 the Freescale P1014 SoC.
10
11 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
12 ---
13 arch/powerpc/boot/Makefile | 3 +
14 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 +++++++++++++++++++++
15 arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 212 ++++++++++++++++++++++++++++
16 arch/powerpc/boot/wrapper | 4 +
17 arch/powerpc/platforms/85xx/Kconfig | 11 ++
18 arch/powerpc/platforms/85xx/Makefile | 1 +
19 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++
20 7 files changed, 540 insertions(+)
21 create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
22 create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
23 create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
24
25 diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
26 index 90e9d95..663fd31 100644
27 --- a/arch/powerpc/boot/Makefile
28 +++ b/arch/powerpc/boot/Makefile
29 @@ -99,6 +99,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
30 src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
31 src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
32 src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
33 +src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
34 +
35
36 src-wlib := $(sort $(src-wlib-y))
37 src-plat := $(sort $(src-plat-y))
38 @@ -279,6 +281,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm8555
39 image-$(CONFIG_TQM8560) += cuImage.tqm8560
40 image-$(CONFIG_SBC8548) += cuImage.sbc8548
41 image-$(CONFIG_KSI8560) += cuImage.ksi8560
42 +image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
43
44 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig
45 image-$(CONFIG_STORCENTER) += cuImage.storcenter
46 diff --git a/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
47 new file mode 100644
48 index 0000000..095e777
49 --- /dev/null
50 +++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
51 @@ -0,0 +1,164 @@
52 +/*
53 + * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
54 + *
55 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
56 + *
57 + * Based on:
58 + * cuboot-85xx.c
59 + * Author: Scott Wood <scottwood@freescale.com>
60 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
61 + *
62 + * simpleboot.c
63 + * Authors: Scott Wood <scottwood@freescale.com>
64 + * Grant Likely <grant.likely@secretlab.ca>
65 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
66 + * Copyright (c) 2008 Secret Lab Technologies Ltd.
67 + *
68 + * This program is free software; you can redistribute it and/or modify it
69 + * under the terms of the GNU General Public License version 2 as published
70 + * by the Free Software Foundation.
71 + */
72 +
73 +#include "ops.h"
74 +#include "types.h"
75 +#include "io.h"
76 +#include "stdio.h"
77 +#include <libfdt.h>
78 +
79 +BSS_STACK(4*1024);
80 +
81 +static unsigned long bus_freq;
82 +static unsigned long int_freq;
83 +static u64 mem_size;
84 +static unsigned char enetaddr[6];
85 +
86 +static void process_boot_dtb(void *boot_dtb)
87 +{
88 + const u32 *na, *ns, *reg, *val32;
89 + const char *path;
90 + u64 memsize64;
91 + int node, size, i;
92 +
93 + /* Make sure FDT blob is sane */
94 + if (fdt_check_header(boot_dtb) != 0)
95 + fatal("Invalid device tree blob\n");
96 +
97 + /* Find the #address-cells and #size-cells properties */
98 + node = fdt_path_offset(boot_dtb, "/");
99 + if (node < 0)
100 + fatal("Cannot find root node\n");
101 + na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
102 + if (!na || (size != 4))
103 + fatal("Cannot find #address-cells property");
104 +
105 + ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
106 + if (!ns || (size != 4))
107 + fatal("Cannot find #size-cells property");
108 +
109 + /* Find the memory range */
110 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
111 + "memory", sizeof("memory"));
112 + if (node < 0)
113 + fatal("Cannot find memory node\n");
114 + reg = fdt_getprop(boot_dtb, node, "reg", &size);
115 + if (size < (*na+*ns) * sizeof(u32))
116 + fatal("cannot get memory range\n");
117 +
118 + /* Only interested in memory based at 0 */
119 + for (i = 0; i < *na; i++)
120 + if (*reg++ != 0)
121 + fatal("Memory range is not based at address 0\n");
122 +
123 + /* get the memsize and trucate it to under 4G on 32 bit machines */
124 + memsize64 = 0;
125 + for (i = 0; i < *ns; i++)
126 + memsize64 = (memsize64 << 32) | *reg++;
127 + if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
128 + memsize64 = 0xffffffff;
129 +
130 + mem_size = memsize64;
131 +
132 + /* get clock frequencies */
133 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
134 + "cpu", sizeof("cpu"));
135 + if (!node)
136 + fatal("Cannot find cpu node\n");
137 +
138 + val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
139 + if (!val32 || (size != 4))
140 + fatal("Cannot get clock frequency");
141 +
142 + int_freq = *val32;
143 +
144 + val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
145 + if (!val32 || (size != 4))
146 + fatal("Cannot get bus frequency");
147 +
148 + bus_freq = *val32;
149 +
150 + path = fdt_get_alias(boot_dtb, "ethernet0");
151 + if (path) {
152 + const void *p;
153 +
154 + node = fdt_path_offset(boot_dtb, path);
155 + if (node < 0)
156 + fatal("Cannot find ethernet0 node");
157 +
158 + p = fdt_getprop(boot_dtb, node, "mac-address", &size);
159 + if (!p || (size < 6)) {
160 + printf("no mac-address property, finding local\n\r");
161 + p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
162 + }
163 +
164 + if (!p || (size < 6))
165 + fatal("cannot get MAC addres");
166 +
167 + memcpy(enetaddr, p, sizeof(enetaddr));
168 + }
169 +}
170 +
171 +static void platform_fixups(void)
172 +{
173 + void *soc;
174 +
175 + dt_fixup_memory(0, mem_size);
176 +
177 + dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
178 + dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
179 +
180 + /* Unfortunately, the specific model number is encoded in the
181 + * soc node name in existing dts files -- once that is fixed,
182 + * this can do a simple path lookup.
183 + */
184 + soc = find_node_by_devtype(NULL, "soc");
185 + if (soc) {
186 + void *serial = NULL;
187 +
188 + setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
189 +
190 + while ((serial = find_node_by_devtype(serial, "serial"))) {
191 + if (get_parent(serial) != soc)
192 + continue;
193 +
194 + setprop(serial, "clock-frequency", &bus_freq,
195 + sizeof(bus_freq));
196 + }
197 + }
198 +}
199 +
200 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
201 + unsigned long r6, unsigned long r7)
202 +{
203 + mem_size = 64 * 1024 * 1024;
204 +
205 + simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
206 +
207 + fdt_init(_dtb_start);
208 + serial_console_init();
209 +
210 + printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
211 +
212 + process_boot_dtb((void *) r3);
213 +
214 + platform_ops.fixups = platform_fixups;
215 +}
216 diff --git a/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
217 new file mode 100644
218 index 0000000..49e516c
219 --- /dev/null
220 +++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
221 @@ -0,0 +1,212 @@
222 +/*
223 + * TP-Link TL-WDR4900 v1 Device Tree Source
224 + *
225 + * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
226 + *
227 + * This program is free software; you can redistribute it and/or modify it
228 + * under the terms of the GNU General Public License as published by the
229 + * Free Software Foundation; either version 2 of the License, or (at your
230 + * option) any later version.
231 + */
232 +
233 +/include/ "fsl/p1010si-pre.dtsi"
234 +
235 +/ {
236 + model = "TP-Link TL-WDR4900 v1";
237 + compatible = "tp-link,TL-WDR4900v1";
238 +
239 + chosen {
240 + bootargs = "console=ttyS0,115200";
241 +/*
242 + linux,stdout-path = "/soc@ffe00000/serial@4500";
243 +*/
244 + };
245 +
246 + aliases {
247 + spi0 = &spi0;
248 + };
249 +
250 + memory {
251 + device_type = "memory";
252 + };
253 +
254 + soc: soc@ffe00000 {
255 + ranges = <0x0 0x0 0xffe00000 0x100000>;
256 +
257 + spi0: spi@7000 {
258 + flash@0 {
259 + #address-cells = <1>;
260 + #size-cells = <1>;
261 + compatible = "spansion,s25fl129p1";
262 + reg = <0>;
263 + spi-max-frequency = <25000000>;
264 +
265 + u-boot@0 {
266 + reg = <0x0 0x0050000>;
267 + label = "u-boot";
268 + read-only;
269 + };
270 +
271 + dtb@50000 {
272 + reg = <0x00050000 0x00010000>;
273 + label = "dtb";
274 + read-only;
275 + };
276 +
277 + kernel@60000 {
278 + reg = <0x00060000 0x002a0000>;
279 + label = "kernel";
280 + };
281 +
282 + rootfs@300000 {
283 + reg = <0x00300000 0x00ce0000>;
284 + label = "rootfs";
285 + };
286 +
287 + config@fe0000 {
288 + reg = <0x00fe0000 0x00010000>;
289 + label = "config";
290 + read-only;
291 + };
292 +
293 + caldata@ff0000 {
294 + reg = <0x00ff0000 0x00010000>;
295 + label = "caldata";
296 + read-only;
297 + };
298 +
299 + firmware@60000 {
300 + reg = <0x00060000 0x00f80000>;
301 + label = "firmware";
302 + };
303 + };
304 + };
305 +
306 + gpio0: gpio-controller@f000 {
307 + };
308 +
309 + usb@22000 {
310 + phy_type = "utmi";
311 + dr_mode = "host";
312 + };
313 +
314 + mdio@24000 {
315 + phy0: ethernet-phy@0 {
316 + reg = <0x0>;
317 + qca,ar8327-initvals = <
318 + 0x00004 0x07600000 /* PAD0_MODE */
319 + 0x00008 0x00000000 /* PAD5_MODE */
320 + 0x0000c 0x01000000 /* PAD6_MODE */
321 + 0x00010 0x40000000 /* POWER_ON_STRIP */
322 + 0x00050 0xcf35cf35 /* LED_CTRL0 */
323 + 0x00054 0xcf35cf35 /* LED_CTRL1 */
324 + 0x00058 0xcf35cf35 /* LED_CTRL2 */
325 + 0x0005c 0x03ffff00 /* LED_CTRL3 */
326 + 0x0007c 0x0000007e /* PORT0_STATUS */
327 + >;
328 + };
329 + };
330 +
331 + mdio@25000 {
332 + status = "disabled";
333 + };
334 +
335 + mdio@26000 {
336 + status = "disabled";
337 + };
338 +
339 + enet0: ethernet@b0000 {
340 + phy-handle = <&phy0>;
341 + phy-connection-type = "rgmii-id";
342 + };
343 +
344 + enet1: ethernet@b1000 {
345 + status = "disabled";
346 + };
347 +
348 + enet2: ethernet@b2000 {
349 + status = "disabled";
350 + };
351 +
352 + sdhc@2e000 {
353 + status = "disabled";
354 + };
355 +
356 + serial1: serial@4600 {
357 + status = "disabled";
358 + };
359 +
360 + can0: can@1c000 {
361 + status = "disabled";
362 + };
363 +
364 + can1: can@1d000 {
365 + status = "disabled";
366 + };
367 + };
368 +
369 + pci0: pcie@ffe09000 {
370 + reg = <0 0xffe09000 0 0x1000>;
371 + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
372 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
373 + pcie@0 {
374 + ranges = <0x2000000 0x0 0xa0000000
375 + 0x2000000 0x0 0xa0000000
376 + 0x0 0x20000000
377 +
378 + 0x1000000 0x0 0x0
379 + 0x1000000 0x0 0x0
380 + 0x0 0x100000>;
381 + };
382 + };
383 +
384 + pci1: pcie@ffe0a000 {
385 + reg = <0 0xffe0a000 0 0x1000>;
386 + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
387 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
388 + pcie@0 {
389 + ranges = <0x2000000 0x0 0x80000000
390 + 0x2000000 0x0 0x80000000
391 + 0x0 0x20000000
392 +
393 + 0x1000000 0x0 0x0
394 + 0x1000000 0x0 0x0
395 + 0x0 0x100000>;
396 + };
397 + };
398 +
399 + ifc: ifc@ffe1e000 {
400 + status = "disabled";
401 + };
402 +
403 + leds {
404 + compatible = "gpio-leds";
405 +
406 + system {
407 + gpios = <&gpio0 2 1>; /* active low */
408 + label = "tp-link:blue:system";
409 + };
410 +
411 + usb1 {
412 + gpios = <&gpio0 3 1>; /* active low */
413 + label = "tp-link:green:usb1";
414 + };
415 +
416 + usb2 {
417 + gpios = <&gpio0 4 1>; /* active low */
418 + label = "tp-link:green:usb2";
419 + };
420 + };
421 +
422 + buttons {
423 + compatible = "gpio-keys";
424 +
425 + reset {
426 + label = "Reset button";
427 + gpios = <&gpio0 5 1>; /* active low */
428 + linux,code = <0x198>; /* KEY_RESTART */
429 + };
430 + };
431 +};
432 +
433 +/include/ "fsl/p1010si-post.dtsi"
434 diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
435 index d27a255..4b43e41 100755
436 --- a/arch/powerpc/boot/wrapper
437 +++ b/arch/powerpc/boot/wrapper
438 @@ -205,6 +205,10 @@ cuboot*)
439 *-mpc85*|*-tqm85*|*-sbc85*)
440 platformo=$object/cuboot-85xx.o
441 ;;
442 + *-tl-wdr4900-v1)
443 + platformo=$object/cuboot-tl-wdr4900-v1.o
444 + link_address='0x1000000'
445 + ;;
446 *-amigaone)
447 link_address='0x800000'
448 ;;
449 diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
450 index c17aae8..ead6513 100644
451 --- a/arch/powerpc/platforms/85xx/Kconfig
452 +++ b/arch/powerpc/platforms/85xx/Kconfig
453 @@ -159,6 +159,17 @@ config STX_GP3
454 select CPM2
455 select DEFAULT_UIMAGE
456
457 +config TL_WDR4900_V1
458 + bool "TP-Link TL-WDR4900 v1"
459 + select DEFAULT_UIMAGE
460 + select ARCH_REQUIRE_GPIOLIB
461 + select GPIO_MPC8XXX
462 + help
463 + This option enables support for the TP-Link TL-WDR4900 v1 board.
464 +
465 + This board is a Concurrent Dual-Band wireless router with a
466 + Freescale P1014 SoC.
467 +
468 config TQM8540
469 bool "TQ Components TQM8540"
470 help
471 diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
472 index 25cebe7..14ca496 100644
473 --- a/arch/powerpc/platforms/85xx/Makefile
474 +++ b/arch/powerpc/platforms/85xx/Makefile
475 @@ -22,6 +22,7 @@ obj-$(CONFIG_TWR_P102x) += twr_p102x.o
476 obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
477 obj-$(CONFIG_STX_GP3) += stx_gp3.o
478 obj-$(CONFIG_TQM85xx) += tqm85xx.o
479 +obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
480 obj-$(CONFIG_SBC8548) += sbc8548.o
481 obj-$(CONFIG_PPA8548) += ppa8548.o
482 obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
483 diff --git a/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
484 new file mode 100644
485 index 0000000..95afa4d
486 --- /dev/null
487 +++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
488 @@ -0,0 +1,145 @@
489 +/*
490 + * TL-WDR4900 v1 board setup
491 + *
492 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
493 + *
494 + * Based on:
495 + * p1010rdb.c:
496 + * P1010RDB Board Setup
497 + * Copyright 2011 Freescale Semiconductor Inc.
498 + *
499 + * This program is free software; you can redistribute it and/or modify it
500 + * under the terms of the GNU General Public License as published by the
501 + * Free Software Foundation; either version 2 of the License, or (at your
502 + * option) any later version.
503 + */
504 +
505 +#include <linux/stddef.h>
506 +#include <linux/kernel.h>
507 +#include <linux/pci.h>
508 +#include <linux/delay.h>
509 +#include <linux/interrupt.h>
510 +#include <linux/of_platform.h>
511 +#include <linux/ath9k_platform.h>
512 +#include <linux/leds.h>
513 +
514 +#include <asm/time.h>
515 +#include <asm/machdep.h>
516 +#include <asm/pci-bridge.h>
517 +#include <mm/mmu_decl.h>
518 +#include <asm/prom.h>
519 +#include <asm/udbg.h>
520 +#include <asm/mpic.h>
521 +
522 +#include <sysdev/fsl_soc.h>
523 +#include <sysdev/fsl_pci.h>
524 +
525 +#include "mpc85xx.h"
526 +
527 +void __init tl_wdr4900_v1_pic_init(void)
528 +{
529 + struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
530 + MPIC_SINGLE_DEST_CPU,
531 + 0, 256, " OpenPIC ");
532 +
533 + BUG_ON(mpic == NULL);
534 +
535 + mpic_init(mpic);
536 +}
537 +
538 +#ifdef CONFIG_PCI
539 +static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
540 + {
541 + .name = "tp-link:blue:wps",
542 + .gpio = 1,
543 + .active_low = 1,
544 + },
545 +};
546 +
547 +static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
548 + .led_pin = 0,
549 + .eeprom_name = "pci_wmac0.eeprom",
550 + .leds = tl_wdr4900_v1_wmac_leds_gpio,
551 + .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
552 +};
553 +
554 +static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
555 + .led_pin = 0,
556 + .eeprom_name = "pci_wmac1.eeprom",
557 +};
558 +
559 +static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
560 +{
561 + if (!machine_is(tl_wdr4900_v1))
562 + return;
563 +
564 + if (dev->bus->number == 1 &&
565 + PCI_SLOT(dev->devfn) == 0) {
566 + dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
567 + return;
568 + }
569 +
570 + if (dev->bus->number == 3 &&
571 + PCI_SLOT(dev->devfn) == 0 &&
572 + dev->device == 0xabcd) {
573 + dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
574 +
575 + /*
576 + * The PCI header of the AR9381 chip is not programmed
577 + * correctly by the bootloader and the device uses wrong
578 + * data due to that. Replace the broken values with the
579 + * correct ones.
580 + */
581 + dev->device = 0x30;
582 + dev->class = 0x028000;
583 +
584 + pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
585 + }
586 +}
587 +
588 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
589 + tl_wdr4900_v1_pci_wmac_fixup);
590 +#endif /* CONFIG_PCI */
591 +
592 +/*
593 + * Setup the architecture
594 + */
595 +static void __init tl_wdr4900_v1_setup_arch(void)
596 +{
597 + if (ppc_md.progress)
598 + ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
599 +
600 + fsl_pci_assign_primary();
601 +
602 + printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
603 +}
604 +
605 +machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
606 +machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
607 +
608 +/*
609 + * Called very early, device-tree isn't unflattened
610 + */
611 +static int __init tl_wdr4900_v1_probe(void)
612 +{
613 + unsigned long root = of_get_flat_dt_root();
614 +
615 + if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
616 + return 1;
617 +
618 + return 0;
619 +}
620 +
621 +define_machine(tl_wdr4900_v1) {
622 + .name = "Freescale P1014",
623 + .probe = tl_wdr4900_v1_probe,
624 + .setup_arch = tl_wdr4900_v1_setup_arch,
625 + .init_IRQ = tl_wdr4900_v1_pic_init,
626 +#ifdef CONFIG_PCI
627 + .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
628 +#endif
629 + .get_irq = mpic_get_irq,
630 + .restart = fsl_rstcr_restart,
631 + .calibrate_decr = generic_calibrate_decr,
632 + .progress = udbg_progress,
633 +};
634 --
635 2.1.3
636
OpenWrt SVN history