mpc85xx: add kernel support for the TL-WDR4900 v1 board
[openwrt/svn-archive/archive.git] / target / linux / mpc85xx / patches-3.7 / 140-powerpc-85xx-tl-wdr4900-v1-support.patch
1 From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 20 Feb 2013 08:40:33 +0100
4 Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
5 board
6
7 This patch adds support for the TP-Link TL-WDR4900 v1
8 concurrent dual-band wireless router. The devices uses
9 the Freescale P1014 SoC.
10
11 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
12 ---
13 arch/powerpc/boot/Makefile | 3 +
14 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 ++++++++++++++++++++++++++
15 arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 166 +++++++++++++++++++++++++++
16 arch/powerpc/boot/wrapper | 4 +
17 arch/powerpc/platforms/85xx/Kconfig | 11 ++
18 arch/powerpc/platforms/85xx/Makefile | 1 +
19 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++++++
20 7 files changed, 494 insertions(+)
21 create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
22 create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
23 create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
24
25 --- a/arch/powerpc/boot/Makefile
26 +++ b/arch/powerpc/boot/Makefile
27 @@ -98,6 +98,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
28 src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
29 src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
30 src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
31 +src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
32 +
33
34 src-wlib := $(sort $(src-wlib-y))
35 src-plat := $(sort $(src-plat-y))
36 @@ -278,6 +280,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
37 image-$(CONFIG_TQM8560) += cuImage.tqm8560
38 image-$(CONFIG_SBC8548) += cuImage.sbc8548
39 image-$(CONFIG_KSI8560) += cuImage.ksi8560
40 +image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
41
42 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig
43 image-$(CONFIG_STORCENTER) += cuImage.storcenter
44 --- /dev/null
45 +++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
46 @@ -0,0 +1,164 @@
47 +/*
48 + * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
49 + *
50 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
51 + *
52 + * Based on:
53 + * cuboot-85xx.c
54 + * Author: Scott Wood <scottwood@freescale.com>
55 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
56 + *
57 + * simpleboot.c
58 + * Authors: Scott Wood <scottwood@freescale.com>
59 + * Grant Likely <grant.likely@secretlab.ca>
60 + * Copyright (c) 2007 Freescale Semiconductor, Inc.
61 + * Copyright (c) 2008 Secret Lab Technologies Ltd.
62 + *
63 + * This program is free software; you can redistribute it and/or modify it
64 + * under the terms of the GNU General Public License version 2 as published
65 + * by the Free Software Foundation.
66 + */
67 +
68 +#include "ops.h"
69 +#include "types.h"
70 +#include "io.h"
71 +#include "stdio.h"
72 +#include <libfdt.h>
73 +
74 +BSS_STACK(4*1024);
75 +
76 +static unsigned long bus_freq;
77 +static unsigned long int_freq;
78 +static u64 mem_size;
79 +static unsigned char enetaddr[6];
80 +
81 +static void process_boot_dtb(void *boot_dtb)
82 +{
83 + const u32 *na, *ns, *reg, *val32;
84 + const char *path;
85 + u64 memsize64;
86 + int node, size, i;
87 +
88 + /* Make sure FDT blob is sane */
89 + if (fdt_check_header(boot_dtb) != 0)
90 + fatal("Invalid device tree blob\n");
91 +
92 + /* Find the #address-cells and #size-cells properties */
93 + node = fdt_path_offset(boot_dtb, "/");
94 + if (node < 0)
95 + fatal("Cannot find root node\n");
96 + na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
97 + if (!na || (size != 4))
98 + fatal("Cannot find #address-cells property");
99 +
100 + ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
101 + if (!ns || (size != 4))
102 + fatal("Cannot find #size-cells property");
103 +
104 + /* Find the memory range */
105 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
106 + "memory", sizeof("memory"));
107 + if (node < 0)
108 + fatal("Cannot find memory node\n");
109 + reg = fdt_getprop(boot_dtb, node, "reg", &size);
110 + if (size < (*na+*ns) * sizeof(u32))
111 + fatal("cannot get memory range\n");
112 +
113 + /* Only interested in memory based at 0 */
114 + for (i = 0; i < *na; i++)
115 + if (*reg++ != 0)
116 + fatal("Memory range is not based at address 0\n");
117 +
118 + /* get the memsize and trucate it to under 4G on 32 bit machines */
119 + memsize64 = 0;
120 + for (i = 0; i < *ns; i++)
121 + memsize64 = (memsize64 << 32) | *reg++;
122 + if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
123 + memsize64 = 0xffffffff;
124 +
125 + mem_size = memsize64;
126 +
127 + /* get clock frequencies */
128 + node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
129 + "cpu", sizeof("cpu"));
130 + if (!node)
131 + fatal("Cannot find cpu node\n");
132 +
133 + val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
134 + if (!val32 || (size != 4))
135 + fatal("Cannot get clock frequency");
136 +
137 + int_freq = *val32;
138 +
139 + val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
140 + if (!val32 || (size != 4))
141 + fatal("Cannot get bus frequency");
142 +
143 + bus_freq = *val32;
144 +
145 + path = fdt_get_alias(boot_dtb, "ethernet0");
146 + if (path) {
147 + const void *p;
148 +
149 + node = fdt_path_offset(boot_dtb, path);
150 + if (node < 0)
151 + fatal("Cannot find ethernet0 node");
152 +
153 + p = fdt_getprop(boot_dtb, node, "mac-address", &size);
154 + if (!p || (size < 6)) {
155 + printf("no mac-address property, finding local\n\r");
156 + p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
157 + }
158 +
159 + if (!p || (size < 6))
160 + fatal("cannot get MAC addres");
161 +
162 + memcpy(enetaddr, p, sizeof(enetaddr));
163 + }
164 +}
165 +
166 +static void platform_fixups(void)
167 +{
168 + void *soc;
169 +
170 + dt_fixup_memory(0, mem_size);
171 +
172 + dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
173 + dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
174 +
175 + /* Unfortunately, the specific model number is encoded in the
176 + * soc node name in existing dts files -- once that is fixed,
177 + * this can do a simple path lookup.
178 + */
179 + soc = find_node_by_devtype(NULL, "soc");
180 + if (soc) {
181 + void *serial = NULL;
182 +
183 + setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
184 +
185 + while ((serial = find_node_by_devtype(serial, "serial"))) {
186 + if (get_parent(serial) != soc)
187 + continue;
188 +
189 + setprop(serial, "clock-frequency", &bus_freq,
190 + sizeof(bus_freq));
191 + }
192 + }
193 +}
194 +
195 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
196 + unsigned long r6, unsigned long r7)
197 +{
198 + mem_size = 64 * 1024 * 1024;
199 +
200 + simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
201 +
202 + fdt_init(_dtb_start);
203 + serial_console_init();
204 +
205 + printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
206 +
207 + process_boot_dtb((void *) r3);
208 +
209 + platform_ops.fixups = platform_fixups;
210 +}
211 --- /dev/null
212 +++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
213 @@ -0,0 +1,166 @@
214 +/*
215 + * TP-Link TL-WDR4900 v1 Device Tree Source
216 + *
217 + * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
218 + *
219 + * This program is free software; you can redistribute it and/or modify it
220 + * under the terms of the GNU General Public License as published by the
221 + * Free Software Foundation; either version 2 of the License, or (at your
222 + * option) any later version.
223 + */
224 +
225 +/include/ "fsl/p1010si-pre.dtsi"
226 +
227 +/ {
228 + model = "TP-Link TL-WDR4900 v1";
229 + compatible = "tp-link,TL-WDR4900v1";
230 +
231 + chosen {
232 + bootargs = "console=ttyS0,115200";
233 +/*
234 + linux,stdout-path = "/soc@ffe00000/serial@4500";
235 +*/
236 + };
237 +
238 + memory {
239 + device_type = "memory";
240 + };
241 +
242 + soc: soc@ffe00000 {
243 + ranges = <0x0 0x0 0xffe00000 0x100000>;
244 +
245 + spi0: spi@7000 {
246 + flash@0 {
247 + #address-cells = <1>;
248 + #size-cells = <1>;
249 + compatible = "spansion,s25fl129p1";
250 + reg = <0>;
251 + spi-max-frequency = <25000000>;
252 +
253 + u-boot@0 {
254 + reg = <0x0 0x0050000>;
255 + label = "u-boot";
256 + read-only;
257 + };
258 +
259 + dtb@50000 {
260 + reg = <0x00050000 0x00010000>;
261 + label = "dtb";
262 + read-only;
263 + };
264 +
265 + kernel@60000 {
266 + reg = <0x00060000 0x002a0000>;
267 + label = "kernel";
268 + };
269 +
270 + rootfs@300000 {
271 + reg = <0x00300000 0x00ce0000>;
272 + label = "rootfs";
273 + };
274 +
275 + config@fe0000 {
276 + reg = <0x00fe0000 0x00010000>;
277 + label = "config";
278 + read-only;
279 + };
280 +
281 + caldata@ff0000 {
282 + reg = <0x00ff0000 0x00010000>;
283 + label = "caldata";
284 + read-only;
285 + };
286 +
287 + firmware@60000 {
288 + reg = <0x00060000 0x00f80000>;
289 + label = "firmware";
290 + };
291 + };
292 + };
293 +
294 + gpio0: gpio-controller@f000 {
295 + };
296 +
297 + usb@22000 {
298 + phy_type = "utmi";
299 + dr_mode = "host";
300 + };
301 +
302 + mdio@24000 {
303 + phy0: ethernet-phy@0 {
304 + /* interrupts = <3 1 0 0>; */
305 + reg = <0x0>;
306 + };
307 + };
308 +
309 + enet0: ethernet@b0000 {
310 + phy-handle = <&phy0>;
311 + phy-connection-type = "rgmii-id";
312 + };
313 + };
314 +
315 + pci0: pcie@ffe09000 {
316 + reg = <0 0xffe09000 0 0x1000>;
317 + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
318 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
319 + pcie@0 {
320 + ranges = <0x2000000 0x0 0xa0000000
321 + 0x2000000 0x0 0xa0000000
322 + 0x0 0x20000000
323 +
324 + 0x1000000 0x0 0x0
325 + 0x1000000 0x0 0x0
326 + 0x0 0x100000>;
327 + };
328 + };
329 +
330 + pci1: pcie@ffe0a000 {
331 + reg = <0 0xffe0a000 0 0x1000>;
332 + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
333 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
334 + pcie@0 {
335 + ranges = <0x2000000 0x0 0x80000000
336 + 0x2000000 0x0 0x80000000
337 + 0x0 0x20000000
338 +
339 + 0x1000000 0x0 0x0
340 + 0x1000000 0x0 0x0
341 + 0x0 0x100000>;
342 + };
343 + };
344 +
345 + ifc: ifc@ffe1e000 {
346 + status = "disabled";
347 + };
348 +
349 + leds {
350 + compatible = "gpio-leds";
351 +
352 + system {
353 + gpios = <&gpio0 2 1>; /* active low */
354 + label = "tp-link:blue:system";
355 + };
356 +
357 + usb1 {
358 + gpios = <&gpio0 3 1>; /* active low */
359 + label = "tp-link:green:usb1";
360 + };
361 +
362 + usb2 {
363 + gpios = <&gpio0 4 1>; /* active low */
364 + label = "tp-link:green:usb2";
365 + };
366 + };
367 +
368 + buttons {
369 + compatible = "gpio-keys";
370 +
371 + reset {
372 + label = "Reset button";
373 + gpios = <&gpio0 5 1>; /* active low */
374 + linux,code = <0x198>; /* KEY_RESTART */
375 + };
376 + };
377 +};
378 +
379 +/include/ "fsl/p1010si-post.dtsi"
380 --- a/arch/powerpc/boot/wrapper
381 +++ b/arch/powerpc/boot/wrapper
382 @@ -197,6 +197,10 @@ cuboot*)
383 *-mpc85*|*-tqm85*|*-sbc85*)
384 platformo=$object/cuboot-85xx.o
385 ;;
386 + *-tl-wdr4900-v1)
387 + platformo=$object/cuboot-tl-wdr4900-v1.o
388 + link_address='0x1000000'
389 + ;;
390 *-amigaone)
391 link_address='0x800000'
392 ;;
393 --- a/arch/powerpc/platforms/85xx/Kconfig
394 +++ b/arch/powerpc/platforms/85xx/Kconfig
395 @@ -147,6 +147,17 @@ config STX_GP3
396 select CPM2
397 select DEFAULT_UIMAGE
398
399 +config TL_WDR4900_V1
400 + bool "TP-Link TL-WDR4900 v1"
401 + select DEFAULT_UIMAGE
402 + select ARCH_REQUIRE_GPIOLIB
403 + select GPIO_MPC8XXX
404 + help
405 + This option enables support for the TP-Link TL-WDR4900 v1 board.
406 +
407 + This board is a Concurrent Dual-Band wireless router with a
408 + Freescale P1014 SoC.
409 +
410 config TQM8540
411 bool "TQ Components TQM8540"
412 help
413 --- a/arch/powerpc/platforms/85xx/Makefile
414 +++ b/arch/powerpc/platforms/85xx/Makefile
415 @@ -24,6 +24,7 @@ obj-$(CONFIG_P5020_DS) += p5020_ds.o
416 obj-$(CONFIG_P5040_DS) += p5040_ds.o corenet_ds.o
417 obj-$(CONFIG_STX_GP3) += stx_gp3.o
418 obj-$(CONFIG_TQM85xx) += tqm85xx.o
419 +obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
420 obj-$(CONFIG_SBC8548) += sbc8548.o
421 obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
422 obj-$(CONFIG_KSI8560) += ksi8560.o
423 --- /dev/null
424 +++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
425 @@ -0,0 +1,145 @@
426 +/*
427 + * TL-WDR4900 v1 board setup
428 + *
429 + * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
430 + *
431 + * Based on:
432 + * p1010rdb.c:
433 + * P1010RDB Board Setup
434 + * Copyright 2011 Freescale Semiconductor Inc.
435 + *
436 + * This program is free software; you can redistribute it and/or modify it
437 + * under the terms of the GNU General Public License as published by the
438 + * Free Software Foundation; either version 2 of the License, or (at your
439 + * option) any later version.
440 + */
441 +
442 +#include <linux/stddef.h>
443 +#include <linux/kernel.h>
444 +#include <linux/pci.h>
445 +#include <linux/delay.h>
446 +#include <linux/interrupt.h>
447 +#include <linux/of_platform.h>
448 +#include <linux/ath9k_platform.h>
449 +#include <linux/leds.h>
450 +
451 +#include <asm/time.h>
452 +#include <asm/machdep.h>
453 +#include <asm/pci-bridge.h>
454 +#include <mm/mmu_decl.h>
455 +#include <asm/prom.h>
456 +#include <asm/udbg.h>
457 +#include <asm/mpic.h>
458 +
459 +#include <sysdev/fsl_soc.h>
460 +#include <sysdev/fsl_pci.h>
461 +
462 +#include "mpc85xx.h"
463 +
464 +void __init tl_wdr4900_v1_pic_init(void)
465 +{
466 + struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
467 + MPIC_SINGLE_DEST_CPU,
468 + 0, 256, " OpenPIC ");
469 +
470 + BUG_ON(mpic == NULL);
471 +
472 + mpic_init(mpic);
473 +}
474 +
475 +#ifdef CONFIG_PCI
476 +static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
477 + {
478 + .name = "tp-link:blue:wps",
479 + .gpio = 1,
480 + .active_low = 1,
481 + },
482 +};
483 +
484 +static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
485 + .led_pin = 0,
486 + .eeprom_name = "pci_wmac0.eeprom",
487 + .leds = tl_wdr4900_v1_wmac_leds_gpio,
488 + .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
489 +};
490 +
491 +static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
492 + .led_pin = 0,
493 + .eeprom_name = "pci_wmac1.eeprom",
494 +};
495 +
496 +static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
497 +{
498 + if (!machine_is(tl_wdr4900_v1))
499 + return;
500 +
501 + if (dev->bus->number == 1 &&
502 + PCI_SLOT(dev->devfn) == 0) {
503 + dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
504 + return;
505 + }
506 +
507 + if (dev->bus->number == 3 &&
508 + PCI_SLOT(dev->devfn) == 0 &&
509 + dev->device == 0xabcd) {
510 + dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
511 +
512 + /*
513 + * The PCI header of the AR9381 chip is not programmed
514 + * correctly by the bootloader and the device uses wrong
515 + * data due to that. Replace the broken values with the
516 + * correct ones.
517 + */
518 + dev->device = 0x30;
519 + dev->class = 0x028000;
520 +
521 + pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
522 + }
523 +}
524 +
525 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
526 + tl_wdr4900_v1_pci_wmac_fixup);
527 +#endif /* CONFIG_PCI */
528 +
529 +/*
530 + * Setup the architecture
531 + */
532 +static void __init tl_wdr4900_v1_setup_arch(void)
533 +{
534 + if (ppc_md.progress)
535 + ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
536 +
537 + fsl_pci_assign_primary();
538 +
539 + printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
540 +}
541 +
542 +machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
543 +machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
544 +
545 +/*
546 + * Called very early, device-tree isn't unflattened
547 + */
548 +static int __init tl_wdr4900_v1_probe(void)
549 +{
550 + unsigned long root = of_get_flat_dt_root();
551 +
552 + if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
553 + return 1;
554 +
555 + return 0;
556 +}
557 +
558 +define_machine(tl_wdr4900_v1) {
559 + .name = "Freescale P1014",
560 + .probe = tl_wdr4900_v1_probe,
561 + .setup_arch = tl_wdr4900_v1_setup_arch,
562 + .init_IRQ = tl_wdr4900_v1_pic_init,
563 +#ifdef CONFIG_PCI
564 + .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
565 +#endif
566 + .get_irq = mpic_get_irq,
567 + .restart = fsl_rstcr_restart,
568 + .calibrate_decr = generic_calibrate_decr,
569 + .progress = udbg_progress,
570 +};