[ppc40x] initial support for 2.6.30
[openwrt/svn-archive/archive.git] / target / linux / ppc40x / patches-2.6.30 / 005-magicboxv1.patch
1 --- /dev/null
2 +++ b/arch/powerpc/boot/cuboot-magicboxv1.c
3 @@ -0,0 +1,40 @@
4 +/*
5 + * Old U-boot compatibility for Magicbox v1
6 + *
7 + * Author: Imre Kaloz <kaloz@openwrt.org>
8 + *
9 + * This program is free software; you can redistribute it and/or modify it
10 + * under the terms of the GNU General Public License version 2 as published
11 + * by the Free Software Foundation.
12 + */
13 +
14 +#include "ops.h"
15 +#include "io.h"
16 +#include "dcr.h"
17 +#include "stdio.h"
18 +#include "4xx.h"
19 +#include "44x.h"
20 +#include "cuboot.h"
21 +
22 +#define TARGET_4xx
23 +#define TARGET_405EP
24 +#include "ppcboot.h"
25 +
26 +static bd_t bd;
27 +
28 +static void magicboxv1_fixups(void)
29 +{
30 + ibm405ep_fixup_clocks(25000000);
31 + ibm4xx_sdram_fixup_memsize();
32 + dt_fixup_mac_addresses(&bd.bi_enetaddr);
33 +}
34 +
35 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
36 + unsigned long r6, unsigned long r7)
37 +{
38 + CUBOOT_INIT();
39 + platform_ops.fixups = magicboxv1_fixups;
40 + platform_ops.exit = ibm40x_dbcr_reset;
41 + fdt_init(_dtb_start);
42 + serial_console_init();
43 +}
44 --- /dev/null
45 +++ b/arch/powerpc/boot/dts/magicboxv1.dts
46 @@ -0,0 +1,217 @@
47 +/*
48 + * Device Tree Source for Magicbox v1
49 + *
50 + * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
51 + *
52 + * Based on walnut.dts
53 + *
54 + * This file is licensed under the terms of the GNU General Public
55 + * License version 2. This program is licensed "as is" without
56 + * any warranty of any kind, whether express or implied.
57 + */
58 +
59 +/dts-v1/;
60 +
61 +/ {
62 + #address-cells = <1>;
63 + #size-cells = <1>;
64 + model = "magicboxv1";
65 + compatible = "magicboxv1";
66 + dcr-parent = <&{/cpus/cpu@0}>;
67 +
68 + aliases {
69 + ethernet0 = &EMAC;
70 + serial0 = &UART;
71 + };
72 +
73 + cpus {
74 + #address-cells = <1>;
75 + #size-cells = <0>;
76 +
77 + cpu@0 {
78 + device_type = "cpu";
79 + model = "PowerPC,405EP";
80 + reg = <0x00000000>;
81 + clock-frequency = <0xbebc200>; /* Filled in by zImage */
82 + timebase-frequency = <0>; /* Filled in by zImage */
83 + i-cache-line-size = <20>;
84 + d-cache-line-size = <20>;
85 + i-cache-size = <4000>;
86 + d-cache-size = <4000>;
87 + dcr-controller;
88 + dcr-access-method = "native";
89 + };
90 + };
91 +
92 + memory {
93 + device_type = "memory";
94 + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
95 + };
96 +
97 + UIC0: interrupt-controller {
98 + compatible = "ibm,uic";
99 + interrupt-controller;
100 + cell-index = <0>;
101 + dcr-reg = <0x0c0 0x009>;
102 + #address-cells = <0>;
103 + #size-cells = <0>;
104 + #interrupt-cells = <2>;
105 + };
106 +
107 + plb {
108 + compatible = "ibm,plb3";
109 + #address-cells = <1>;
110 + #size-cells = <1>;
111 + ranges;
112 + clock-frequency = <0>; /* Filled in by zImage */
113 +
114 + SDRAM0: memory-controller {
115 + compatible = "ibm,sdram-405ep";
116 + dcr-reg = <0x010 0x002>;
117 + };
118 +
119 + MAL: mcmal {
120 + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
121 + dcr-reg = <0x180 0x062>;
122 + num-tx-chans = <4>;
123 + num-rx-chans = <2>;
124 + interrupt-parent = <&UIC0>;
125 + interrupts = <
126 + 0xb 0x4 /* TXEOB */
127 + 0xc 0x4 /* RXEOB */
128 + 0xa 0x4 /* SERR */
129 + 0xd 0x4 /* TXDE */
130 + 0xe 0x4 /* RXDE */>;
131 + };
132 +
133 + POB0: opb {
134 + compatible = "ibm,opb-405ep", "ibm,opb";
135 + #address-cells = <1>;
136 + #size-cells = <1>;
137 + ranges = <0xef600000 0xef600000 0x00a00000>;
138 + dcr-reg = <0x0a0 0x005>;
139 + clock-frequency = <0>; /* Filled in by zImage */
140 +
141 + UART: serial@ef600300 {
142 + device_type = "serial";
143 + compatible = "ns16550";
144 + reg = <0xef600300 0x00000008>;
145 + virtual-reg = <0xef600300>;
146 + clock-frequency = <0>; /* Filled in by zImage */
147 + current-speed = <115200>;
148 + interrupt-parent = <&UIC0>;
149 + interrupts = <0x0 0x4>;
150 + };
151 +
152 + IIC: i2c@ef600500 {
153 + compatible = "ibm,iic-405ep", "ibm,iic";
154 + reg = <0xef600500 0x00000011>;
155 + interrupt-parent = <&UIC0>;
156 + interrupts = <0x2 0x4>;
157 + };
158 +
159 + GPIO: gpio@ef600700 {
160 + compatible = "ibm,gpio-405ep";
161 + reg = <0xef600700 0x00000020>;
162 + };
163 +
164 + EMAC: ethernet@ef600800 {
165 + linux,network-index = <0x0>;
166 + device_type = "network";
167 + compatible = "ibm,emac-405ep", "ibm,emac";
168 + interrupt-parent = <&UIC0>;
169 + interrupts = <
170 + 0xf 0x4 /* Ethernet */
171 + 0x9 0x4 /* Ethernet Wake Up */>;
172 + local-mac-address = [000000000000]; /* Filled in by zImage */
173 + reg = <0xef600800 0x00000070>;
174 + mal-device = <&MAL>;
175 + mal-tx-channel = <0>;
176 + mal-rx-channel = <0>;
177 + cell-index = <0>;
178 + max-frame-size = <0x5dc>;
179 + rx-fifo-size = <0x1000>;
180 + tx-fifo-size = <0x800>;
181 + phy-mode = "mii";
182 + phy-map = <0x00000000>;
183 + };
184 +
185 + };
186 +
187 + EBC0: ebc {
188 + compatible = "ibm,ebc-405ep", "ibm,ebc";
189 + dcr-reg = <0x012 0x002>;
190 + #address-cells = <2>;
191 + #size-cells = <1>;
192 + /* The ranges property is supplied by the bootwrapper
193 + * and is based on the firmware's configuration of the
194 + * EBC bridge
195 + */
196 + clock-frequency = <0>; /* Filled in by zImage */
197 +
198 + nor_flash@ffc00000 {
199 + compatible = "cfi-flash";
200 + bank-width = <2>;
201 + reg = <0x00000000 0xffc00000 0x00400000>;
202 + #address-cells = <1>;
203 + #size-cells = <1>;
204 + partition@0 {
205 + label = "linux";
206 + reg = <0x0 0x3c0000>;
207 + };
208 + partition@100000 {
209 + label = "rootfs";
210 + reg = <0x100000 0x2c0000>;
211 + };
212 + partition@3c0000 {
213 + label = "u-boot";
214 + reg = <0x3c0000 0x30000>;
215 + read-only;
216 + };
217 + };
218 + };
219 +
220 + PCI0: pci@ec000000 {
221 + device_type = "pci";
222 + #interrupt-cells = <1>;
223 + #size-cells = <2>;
224 + #address-cells = <3>;
225 + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
226 + primary;
227 + reg = <0xeec00000 0x00000008 /* Config space access */
228 + 0xeed80000 0x00000004 /* IACK */
229 + 0xeed80000 0x00000004 /* Special cycle */
230 + 0xef480000 0x00000040>; /* Internal registers */
231 +
232 + /* Outbound ranges, one memory and one IO,
233 + * later cannot be changed. Chip supports a second
234 + * IO range but we don't use it for now
235 + */
236 + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
237 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
238 +
239 + /* Inbound 2GB range starting at 0 */
240 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
241 +
242 + /* Magicbox v1 has all 4 IRQ pins tied together per slot */
243 + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
244 + interrupt-map = <
245 + /* IDSEL 1 */
246 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
247 +
248 + /* IDSEL 2 */
249 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
250 +
251 + /* IDSEL 3 */
252 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
253 +
254 + /* IDSEL 4 */
255 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
256 + >;
257 + };
258 + };
259 +
260 + chosen {
261 + linux,stdout-path = "/plb/opb/serial@ef600300";
262 + };
263 +};
264 --- a/arch/powerpc/boot/Makefile
265 +++ b/arch/powerpc/boot/Makefile
266 @@ -75,7 +75,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
267 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
268 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
269 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
270 - cuboot-acadia.c cuboot-amigaone.c
271 + cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c
272 src-boot := $(src-wlib) $(src-plat) empty.c
273
274 src-boot := $(addprefix $(obj)/, $(src-boot))
275 @@ -192,6 +192,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImag
276 image-$(CONFIG_EP405) += dtbImage.ep405
277 image-$(CONFIG_WALNUT) += treeImage.walnut
278 image-$(CONFIG_ACADIA) += cuImage.acadia
279 +image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
280
281 # Board ports in arch/powerpc/platform/44x/Kconfig
282 image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
283 --- a/arch/powerpc/platforms/40x/Kconfig
284 +++ b/arch/powerpc/platforms/40x/Kconfig
285 @@ -49,6 +49,16 @@ config KILAUEA
286 help
287 This option enables support for the AMCC PPC405EX evaluation board.
288
289 +config MAGICBOXV1
290 + bool "Magicbox v1"
291 + depends on 40x
292 + default n
293 + select PPC40x_SIMPLE
294 + select 405EP
295 + select PCI
296 + help
297 + This option enables support for the Magicbox v1 board.
298 +
299 config MAKALU
300 bool "Makalu"
301 depends on 40x
302 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
303 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
304 @@ -51,7 +51,8 @@ machine_device_initcall(ppc40x_simple, p
305 * board.c file for it rather than adding it to this list.
306 */
307 static char *board[] __initdata = {
308 - "amcc,acadia"
309 + "amcc,acadia",
310 + "magicboxv1"
311 };
312
313 static int __init ppc40x_probe(void)