target/linux/ppc40x/patches-2.6.30/100-magicbox-ide-driver.patch

   1 --- a/drivers/ide/Kconfig
   2 +++ b/drivers/ide/Kconfig
   3 @@ -717,6 +717,11 @@ config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
   4         depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
   5  endchoice
   6
   7 +config BLK_DEV_IDE_MAGICBOX
   8 +       tristate "Magicbox CF card support"
   9 +       depends on MAGICBOXV2 || OPENRB_LIGHT
  10 +       select IDE_XFER_MODE
  11 +
  12  config BLK_DEV_IDE_TX4938
  13         tristate "TX4938 internal IDE support"
  14         depends on SOC_TX4938
  15 --- a/drivers/ide/Makefile
  16 +++ b/drivers/ide/Makefile
  17 @@ -113,6 +113,7 @@ obj-$(CONFIG_BLK_DEV_IDE_RAPIDE)    += rapi
  18  obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710)  += palm_bk3710.o
  19
  20  obj-$(CONFIG_BLK_DEV_IDE_AU1XXX)       += au1xxx-ide.o
  21 +obj-$(CONFIG_BLK_DEV_IDE_MAGICBOX)     += magicbox_ide.o
  22
  23  obj-$(CONFIG_BLK_DEV_IDE_TX4938)       += tx4938ide.o
  24  obj-$(CONFIG_BLK_DEV_IDE_TX4939)       += tx4939ide.o
  25 --- /dev/null
  26 +++ b/drivers/ide/magicbox_ide.c
  27 @@ -0,0 +1,296 @@
  28 +/*
  29 + *  IDE driver for the MagicBox 2.0 onboard CompactFlash slot.
  30 + *
  31 + *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
  32 + *
  33 + *  Based on the original driver by Wojtek Kaniewski <wojtekka@toxygen.net>
  34 + *
  35 + *  This program is free software; you can redistribute it and/or modify it
  36 + *  under the terms of the GNU General Public License version 2 as published
  37 + *  by the Free Software Foundation.
  38 + */
  39 +
  40 +#include <linux/types.h>
  41 +#include <linux/ioport.h>
  42 +#include <linux/of.h>
  43 +#include <linux/of_device.h>
  44 +#include <linux/of_platform.h>
  45 +#include <linux/ide.h>
  46 +
  47 +#include <asm/dcr-native.h>
  48 +
  49 +#define DRV_DESC       "IDE driver for Magicbox 2.0 onboard CF slot"
  50 +#define DRV_NAME       "magicbox_cf"
  51 +
  52 +static inline u8 magicbox_ide_inb(unsigned long port)
  53 +{
  54 +       return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
  55 +}
  56 +
  57 +static inline void magicbox_ide_outb(u8 value, unsigned long port)
  58 +{
  59 +       writew(value << 8, (void __iomem *) port);
  60 +}
  61 +
  62 +static inline void magicbox_ide_insw(unsigned long port, void *addr, u32 count)
  63 +{
  64 +       u16 *ptr;
  65 +
  66 +       for (ptr = addr; count--; ptr++)
  67 +               *ptr = readw((void __iomem *) port);
  68 +}
  69 +
  70 +static inline void magicbox_ide_insl(unsigned long port, void *addr, u32 count)
  71 +{
  72 +       u32 *ptr;
  73 +
  74 +       for (ptr = addr; count--; ptr++)
  75 +               *ptr = readl((void __iomem *) port);
  76 +}
  77 +
  78 +static inline void magicbox_ide_outsw(unsigned long port, void *addr,
  79 +                                       u32 count)
  80 +{
  81 +       u16 *ptr;
  82 +
  83 +       for (ptr = addr; count--; ptr++)
  84 +               writew(*ptr, (void __iomem *) port);
  85 +}
  86 +
  87 +static inline void magicbox_ide_outsl(unsigned long port, void *addr,
  88 +                                       u32 count)
  89 +{
  90 +       u32 *ptr;
  91 +
  92 +       for (ptr = addr; count--; ptr++)
  93 +               writel(*ptr, (void __iomem *) port);
  94 +}
  95 +
  96 +static void magicbox_ide_exec_command(ide_hwif_t *hwif, u8 cmd)
  97 +{
  98 +       magicbox_ide_outb(cmd, hwif->io_ports.command_addr);
  99 +}
 100 +
 101 +static u8 magicbox_ide_read_status(ide_hwif_t *hwif)
 102 +{
 103 +       return magicbox_ide_inb(hwif->io_ports.status_addr);
 104 +}
 105 +
 106 +static u8 magicbox_ide_read_altstatus(ide_hwif_t *hwif)
 107 +{
 108 +       return magicbox_ide_inb(hwif->io_ports.ctl_addr);
 109 +}
 110 +
 111 +static void magicbox_ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
 112 +{
 113 +       magicbox_ide_outb(ctl, hwif->io_ports.ctl_addr);
 114 +}
 115 +
 116 +static void magicbox_ide_tf_load(ide_drive_t *drive, struct ide_taskfile *tf,
 117 +                                u8 valid)
 118 +{
 119 +       struct ide_io_ports *io_ports = &drive->hwif->io_ports;
 120 +
 121 +       if (valid & IDE_VALID_FEATURE)
 122 +               magicbox_ide_outb(tf->feature, io_ports->feature_addr);
 123 +       if (valid & IDE_VALID_NSECT)
 124 +               magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
 125 +       if (valid & IDE_VALID_LBAL)
 126 +               magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
 127 +       if (valid & IDE_VALID_LBAM)
 128 +               magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
 129 +       if (valid & IDE_VALID_LBAH)
 130 +               magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
 131 +
 132 +       if (valid & IDE_VALID_DEVICE)
 133 +               magicbox_ide_outb(tf->device, io_ports->device_addr);
 134 +}
 135 +
 136 +static void magicbox_ide_tf_read(ide_drive_t *drive, struct ide_taskfile *tf,
 137 +                                u8 valid)
 138 +{
 139 +       struct ide_io_ports *io_ports = &drive->hwif->io_ports;
 140 +
 141 +       if (valid & IDE_VALID_NSECT)
 142 +               tf->nsect  = magicbox_ide_inb(io_ports->nsect_addr);
 143 +       if (valid & IDE_VALID_LBAL)
 144 +               tf->lbal   = magicbox_ide_inb(io_ports->lbal_addr);
 145 +       if (valid & IDE_VALID_LBAM)
 146 +               tf->lbam   = magicbox_ide_inb(io_ports->lbam_addr);
 147 +       if (valid & IDE_VALID_LBAH)
 148 +               tf->lbah   = magicbox_ide_inb(io_ports->lbah_addr);
 149 +       if (valid & IDE_VALID_DEVICE)
 150 +               tf->device = magicbox_ide_inb(io_ports->device_addr);
 151 +}
 152 +
 153 +static void magicbox_ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd,
 154 +                          void *buf, unsigned int len)
 155 +{
 156 +       unsigned long port = drive->hwif->io_ports.data_addr;
 157 +
 158 +       len++;
 159 +
 160 +       if (drive->io_32bit) {
 161 +               magicbox_ide_insl(port, buf, len / 4);
 162 +
 163 +               if ((len & 3) >= 2)
 164 +                       magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
 165 +       } else {
 166 +               magicbox_ide_insw(port, buf, len / 2);
 167 +       }
 168 +}
 169 +
 170 +static void magicbox_ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd,
 171 +                           void *buf, unsigned int len)
 172 +{
 173 +       unsigned long port = drive->hwif->io_ports.data_addr;
 174 +
 175 +       len++;
 176 +
 177 +       if (drive->io_32bit) {
 178 +               magicbox_ide_outsl(port, buf, len / 4);
 179 +
 180 +               if ((len & 3) >= 2)
 181 +                       magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
 182 +       } else {
 183 +               magicbox_ide_outsw(port, buf, len / 2);
 184 +       }
 185 +}
 186 +
 187 +static void magicbox_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
 188 +{
 189 +}
 190 +
 191 +static u8 magicbox_ide_cable_detect(ide_hwif_t *hwif)
 192 +{
 193 +       return ATA_CBL_PATA40;
 194 +}
 195 +
 196 +static const struct ide_tp_ops magicbox_ide_tp_ops = {
 197 +       .exec_command   = magicbox_ide_exec_command,
 198 +       .read_status    = magicbox_ide_read_status,
 199 +       .read_altstatus = magicbox_ide_read_altstatus,
 200 +       .write_devctl   = magicbox_ide_write_devctl,
 201 +
 202 +       .dev_select     = ide_dev_select,
 203 +       .tf_load        = magicbox_ide_tf_load,
 204 +       .tf_read        = magicbox_ide_tf_read,
 205 +
 206 +       .input_data     = magicbox_ide_input_data,
 207 +       .output_data    = magicbox_ide_output_data,
 208 +};
 209 +
 210 +static const struct ide_port_ops magicbox_ide_port_ops = {
 211 +       .set_pio_mode   = magicbox_ide_set_pio_mode,
 212 +       .cable_detect   = magicbox_ide_cable_detect,
 213 +};
 214 +
 215 +static const struct ide_port_info magicbox_ide_port_info = {
 216 +       .name           = DRV_NAME,
 217 +       .chipset        = ide_generic,
 218 +       .tp_ops         = &magicbox_ide_tp_ops,
 219 +       .port_ops       = &magicbox_ide_port_ops,
 220 +       .host_flags     = IDE_HFLAG_SINGLE |
 221 +                         IDE_HFLAG_NO_DMA |
 222 +                         IDE_HFLAG_MMIO |
 223 +                         IDE_HFLAG_UNMASK_IRQS,
 224 +       .pio_mask       = ATA_PIO4,
 225 +};
 226 +
 227 +static inline void magicbox_ide_setup_hw(hw_regs_t *hw, u16 __iomem *base,
 228 +                                        u16 __iomem *ctrl, int irq)
 229 +{
 230 +       unsigned long port = (unsigned long) base;
 231 +       int i;
 232 +
 233 +       memset(hw, 0, sizeof(*hw));
 234 +       for (i = 0; i <= 7; i++)
 235 +               hw->io_ports_array[i] = port + i * 2;
 236 +
 237 +       /*
 238 +        * the IDE control register is at ATA address 6,
 239 +        * with CS1 active instead of CS0
 240 +        */
 241 +       hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
 242 +}
 243 +
 244 +static int __devinit magicbox_ide_of_probe(struct of_device *op,
 245 +                                          const struct of_device_id *match)
 246 +{
 247 +       hw_regs_t hw;
 248 +       hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
 249 +       struct ide_host *host;
 250 +       u16 __iomem *base;
 251 +       u16 __iomem *ctrl;
 252 +       int irq;
 253 +       int ret = 0;
 254 +
 255 +       irq = irq_of_parse_and_map(op->node, 0);
 256 +       if (irq < 0) {
 257 +               dev_err(&op->dev, "invalid irq\n");
 258 +               ret = -EINVAL;
 259 +               goto err_exit;
 260 +       }
 261 +
 262 +       base = of_iomap(op->node, 0);
 263 +       if (base == NULL) {
 264 +               ret = -ENOMEM;
 265 +               goto err_exit;
 266 +       }
 267 +
 268 +       ctrl = of_iomap(op->node, 1);
 269 +       if (ctrl == NULL) {
 270 +               ret = -ENOMEM;
 271 +               goto err_unmap_base;
 272 +       }
 273 +
 274 +       magicbox_ide_setup_hw(&hw, base, ctrl, irq);
 275 +
 276 +       hw.dev = &op->dev;
 277 +       hw.irq = irq;
 278 +       hw.chipset = ide_generic;
 279 +       hw.ack_intr = NULL;
 280 +
 281 +       ret = ide_host_add(&magicbox_ide_port_info, hws, &host);
 282 +       if (ret)
 283 +               goto err_unmap_ctrl;
 284 +
 285 +       dev_set_drvdata(&op->dev, host);
 286 +
 287 +       return 0;
 288 +
 289 + err_unmap_ctrl:
 290 +       iounmap(ctrl);
 291 + err_unmap_base:
 292 +       iounmap(base);
 293 + err_exit:
 294 +       return ret;
 295 +}
 296 +
 297 +static struct of_device_id magicbox_ide_of_match[] = {
 298 +       { .compatible = "magicbox-cf", },
 299 +       {},
 300 +};
 301 +
 302 +static struct of_platform_driver magicbox_ide_of_platform_driver = {
 303 +       .owner          = THIS_MODULE,
 304 +       .name           = DRV_NAME,
 305 +       .match_table    = magicbox_ide_of_match,
 306 +       .probe          = magicbox_ide_of_probe,
 307 +       .driver         = {
 308 +               .name   = DRV_NAME,
 309 +               .owner  = THIS_MODULE,
 310 +       },
 311 +};
 312 +
 313 +static int __init magicbox_ide_init(void)
 314 +{
 315 +       return of_register_platform_driver(&magicbox_ide_of_platform_driver);
 316 +}
 317 +
 318 +module_init(magicbox_ide_init);
 319 +
 320 +MODULE_DESCRIPTION(DRV_DESC);
 321 +MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 322 +MODULE_LICENSE("GPL v2");
 323 +MODULE_DEVICE_TABLE(of, magicbox_ide_of_match);