86a4d15476f9b159a60141f1cc7a043118dec844
[openwrt/svn-archive/archive.git] / target / linux / ramips / dts / rt3050.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "ralink,rt3050-soc", "ralink,rt3050-soc", "ralink,rt3350-soc";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips24KEc";
9 };
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,57600";
14 };
15
16 cpuintc: cpuintc@0 {
17 #address-cells = <0>;
18 #interrupt-cells = <1>;
19 interrupt-controller;
20 compatible = "mti,cpu-interrupt-controller";
21 };
22
23 palmbus@10000000 {
24 compatible = "palmbus";
25 reg = <0x10000000 0x200000>;
26 ranges = <0x0 0x10000000 0x1FFFFF>;
27
28 #address-cells = <1>;
29 #size-cells = <1>;
30
31 sysc@0 {
32 compatible = "ralink,rt3050-sysc";
33 reg = <0x0 0x100>;
34 };
35
36 timer@100 {
37 compatible = "ralink,rt3050-timer", "ralink,rt2880-timer";
38 reg = <0x100 0x20>;
39
40 interrupt-parent = <&intc>;
41 interrupts = <1>;
42 };
43
44 watchdog@120 {
45 compatible = "ralink,rt3050-wdt", "ralink,rt2880-wdt";
46 reg = <0x120 0x10>;
47
48 resets = <&rstctrl 8>;
49 reset-names = "wdt";
50
51 interrupt-parent = <&intc>;
52 interrupts = <1>;
53 };
54
55 intc: intc@200 {
56 compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
57 reg = <0x200 0x100>;
58
59 resets = <&rstctrl 19>;
60 reset-names = "intc";
61
62 interrupt-controller;
63 #interrupt-cells = <1>;
64
65 interrupt-parent = <&cpuintc>;
66 interrupts = <2>;
67 };
68
69 memc@300 {
70 compatible = "ralink,rt3050-memc";
71 reg = <0x300 0x100>;
72
73 resets = <&rstctrl 20>;
74 reset-names = "mc";
75
76 interrupt-parent = <&intc>;
77 interrupts = <3>;
78 };
79
80 uart@500 {
81 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
82 reg = <0x500 0x100>;
83
84 resets = <&rstctrl 12>;
85 reset-names = "uart";
86
87 interrupt-parent = <&intc>;
88 interrupts = <5>;
89
90 reg-shift = <2>;
91
92 status = "disabled";
93 };
94
95 gpio0: gpio@600 {
96 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
97 reg = <0x600 0x34>;
98
99 gpio-controller;
100 #gpio-cells = <2>;
101
102 ralink,gpio-base = <0>;
103 ralink,num-gpios = <24>;
104 ralink,register-map = [ 00 04 08 0c
105 20 24 28 2c
106 30 34 ];
107
108 resets = <&rstctrl 13>;
109 reset-names = "pio";
110
111 interrupt-parent = <&intc>;
112 interrupts = <6>;
113 };
114
115 gpio1: gpio@638 {
116 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
117 reg = <0x638 0x24>;
118
119 gpio-controller;
120 #gpio-cells = <2>;
121
122 ralink,gpio-base = <24>;
123 ralink,num-gpios = <16>;
124 ralink,register-map = [ 00 04 08 0c
125 10 14 18 1c
126 20 24 ];
127
128 status = "disabled";
129 };
130
131 gpio2: gpio@660 {
132 compatible = "ralink,rt3050-gpio", "ralink,rt2880-gpio";
133 reg = <0x660 0x24>;
134
135 gpio-controller;
136 #gpio-cells = <2>;
137
138 ralink,gpio-base = <40>;
139 ralink,num-gpios = <12>;
140 ralink,register-map = [ 00 04 08 0c
141 10 14 18 1c
142 20 24 ];
143
144 status = "disabled";
145 };
146
147 spi@b00 {
148 compatible = "ralink,rt3050-spi", "ralink,rt2880-spi";
149 reg = <0xb00 0x100>;
150
151 resets = <&rstctrl 18>;
152 reset-names = "spi";
153
154 #address-cells = <1>;
155 #size-cells = <0>;
156
157 pinctrl-names = "default";
158 pinctrl-0 = <&spi_pins>;
159
160 status = "disabled";
161 };
162
163 uartlite@c00 {
164 compatible = "ralink,rt3050-uart", "ralink,rt2880-uart", "ns16550a";
165 reg = <0xc00 0x100>;
166
167 resets = <&rstctrl 19>;
168 reset-names = "uartl";
169
170 interrupt-parent = <&intc>;
171 interrupts = <12>;
172
173 reg-shift = <2>;
174
175 pinctrl-names = "default";
176 pinctrl-0 = <&uartlite_pins>;
177 };
178
179 };
180
181 pinctrl {
182 compatible = "ralink,rt2880-pinmux";
183
184 pinctrl-names = "default";
185 pinctrl-0 = <&state_default>;
186
187 state_default: pinctrl0 {
188 sdram {
189 ralink,group = "sdram";
190 ralink,function = "sdram";
191 };
192 };
193
194 spi_pins: spi {
195 spi {
196 ralink,group = "spi";
197 ralink,function = "spi";
198 };
199 };
200 uartlite_pins: uartlite {
201 uart {
202 ralink,group = "uartlite";
203 ralink,function = "uartlite";
204 };
205 };
206 };
207
208 rstctrl: rstctrl {
209 compatible = "ralink,rt3050-reset", "ralink,rt2880-reset";
210 #reset-cells = <1>;
211 };
212
213 ethernet@10100000 {
214 compatible = "ralink,rt3050-eth";
215 reg = <0x10100000 10000>;
216
217 interrupt-parent = <&cpuintc>;
218 interrupts = <5>;
219 };
220
221 esw@10110000 {
222 compatible = "ralink,rt3050-esw";
223 reg = <0x10110000 8000>;
224
225 interrupt-parent = <&intc>;
226 interrupts = <17>;
227 };
228
229 wmac@10180000 {
230 compatible = "ralink,rt3050-wmac", "ralink,rt2880-wmac";
231 reg = <0x10180000 40000>;
232
233 interrupt-parent = <&cpuintc>;
234 interrupts = <6>;
235
236 ralink,eeprom = "soc_wmac.eeprom";
237 };
238
239 otg@101c0000 {
240 compatible = "ralink,rt3050-otg", "snps,dwc2";
241 reg = <0x101c0000 40000>;
242
243 interrupt-parent = <&intc>;
244 interrupts = <18>;
245
246 resets = <&rstctrl 22>;
247 reset-names = "otg";
248
249 status = "disabled";
250 };
251 };