a804488f085b76f27745d3eb5cb49a2bd26f724d
[openwrt/svn-archive/archive.git] / target / linux / ramips / files / arch / mips / include / asm / mach-ralink / rt288x.h
1 /*
2 * Ralink RT288x SoC specific definitions
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Ralink's 2.6.21 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #ifndef _RT288X_H_
15 #define _RT288X_H_
16
17 #include <linux/init.h>
18 #include <linux/io.h>
19
20 void rt288x_detect_sys_type(void) __init;
21 void rt288x_detect_sys_freq(void) __init;
22
23 extern unsigned long rt288x_cpu_freq;
24 extern unsigned long rt288x_sys_freq;
25
26 #define RT288X_CPU_IRQ_BASE 0
27 #define RT288X_INTC_IRQ_BASE 8
28 #define RT288X_INTC_IRQ_COUNT 32
29 #define RT288X_GPIO_IRQ_BASE 40
30
31 #define RT288X_CPU_IRQ_INTC (RT288X_CPU_IRQ_BASE + 2)
32 #define RT288X_CPU_IRQ_PCI (RT288X_CPU_IRQ_BASE + 4)
33 #define RT288X_CPU_IRQ_FE (RT288X_CPU_IRQ_BASE + 5)
34 #define RT288X_CPU_IRQ_WNIC (RT288X_CPU_IRQ_BASE + 6)
35 #define RT288X_CPU_IRQ_COUNTER (RT288X_CPU_IRQ_BASE + 7)
36
37 #define RT2880_INTC_IRQ_TIMER0 (RT288X_INTC_IRQ_BASE + 0)
38 #define RT2880_INTC_IRQ_TIMER1 (RT288X_INTC_IRQ_BASE + 1)
39 #define RT2880_INTC_IRQ_UART0 (RT288X_INTC_IRQ_BASE + 2)
40 #define RT2880_INTC_IRQ_PIO (RT288X_INTC_IRQ_BASE + 3)
41 #define RT2880_INTC_IRQ_PCM (RT288X_INTC_IRQ_BASE + 4)
42 #define RT2880_INTC_IRQ_UART1 (RT288X_INTC_IRQ_BASE + 8)
43 #define RT2880_INTC_IRQ_IA (RT288X_INTC_IRQ_BASE + 23)
44
45 #define RT288X_GPIO_IRQ(x) (RT288X_GPIO_IRQ_BASE + (x))
46 #define RT288X_GPIO_COUNT 32
47
48 extern void __iomem *rt288x_sysc_base;
49 extern void __iomem *rt288x_memc_base;
50
51 static inline void rt288x_sysc_wr(u32 val, unsigned reg)
52 {
53 __raw_writel(val, rt288x_sysc_base + reg);
54 }
55
56 static inline u32 rt288x_sysc_rr(unsigned reg)
57 {
58 return __raw_readl(rt288x_sysc_base + reg);
59 }
60
61 static inline void rt288x_memc_wr(u32 val, unsigned reg)
62 {
63 __raw_writel(val, rt288x_memc_base + reg);
64 }
65
66 static inline u32 rt288x_memc_rr(unsigned reg)
67 {
68 return __raw_readl(rt288x_memc_base + reg);
69 }
70
71 void rt288x_gpio_init(u32 mode) __init;
72
73 #endif /* _RT228X_H_ */