target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h

   1 /*
   2  * Ralink RT288x SoC specific definitions
   3  *
   4  * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  * Parts of this file are based on Ralink's 2.6.21 BSP
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License version 2 as published
  11  * by the Free Software Foundation.
  12  */
  13
  14 #ifndef _RT288X_H_
  15 #define _RT288X_H_
  16
  17 #include <linux/init.h>
  18 #include <linux/io.h>
  19
  20 #define RT288X_CPU_IRQ_BASE     0
  21 #define RT288X_INTC_IRQ_BASE    8
  22 #define RT288X_INTC_IRQ_COUNT   32
  23 #define RT288X_GPIO_IRQ_BASE    40
  24
  25 #define RT288X_CPU_IRQ_INTC     (RT288X_CPU_IRQ_BASE + 2)
  26 #define RT288X_CPU_IRQ_PCI      (RT288X_CPU_IRQ_BASE + 4)
  27 #define RT288X_CPU_IRQ_FE       (RT288X_CPU_IRQ_BASE + 5)
  28 #define RT288X_CPU_IRQ_WNIC     (RT288X_CPU_IRQ_BASE + 6)
  29 #define RT288X_CPU_IRQ_COUNTER  (RT288X_CPU_IRQ_BASE + 7)
  30
  31 #define RT2880_INTC_IRQ_TIMER0  (RT288X_INTC_IRQ_BASE + 0)
  32 #define RT2880_INTC_IRQ_TIMER1  (RT288X_INTC_IRQ_BASE + 1)
  33 #define RT2880_INTC_IRQ_UART0   (RT288X_INTC_IRQ_BASE + 2)
  34 #define RT2880_INTC_IRQ_PIO     (RT288X_INTC_IRQ_BASE + 3)
  35 #define RT2880_INTC_IRQ_PCM     (RT288X_INTC_IRQ_BASE + 4)
  36 #define RT2880_INTC_IRQ_UART1   (RT288X_INTC_IRQ_BASE + 8)
  37 #define RT2880_INTC_IRQ_IA      (RT288X_INTC_IRQ_BASE + 23)
  38
  39 #define RT288X_GPIO_IRQ(x)      (RT288X_GPIO_IRQ_BASE + (x))
  40 #define RT288X_GPIO_COUNT       32
  41
  42 extern void __iomem *rt288x_sysc_base;
  43 extern void __iomem *rt288x_memc_base;
  44
  45 static inline void rt288x_sysc_wr(u32 val, unsigned reg)
  46 {
  47         __raw_writel(val, rt288x_sysc_base + reg);
  48 }
  49
  50 static inline u32 rt288x_sysc_rr(unsigned reg)
  51 {
  52         return __raw_readl(rt288x_sysc_base + reg);
  53 }
  54
  55 static inline void rt288x_memc_wr(u32 val, unsigned reg)
  56 {
  57         __raw_writel(val, rt288x_memc_base + reg);
  58 }
  59
  60 static inline u32 rt288x_memc_rr(unsigned reg)
  61 {
  62         return __raw_readl(rt288x_memc_base + reg);
  63 }
  64
  65 void rt288x_gpio_init(u32 mode);
  66
  67 #ifdef CONFIG_PCI
  68 int rt288x_register_pci(void);
  69 #else
  70 static inline int rt288x_register_pci(void) { return 0; }
  71 #endif /* CONFIG_PCI */
  72
  73 #endif /* _RT228X_H_ */