2 * Ralink RT3662/RT3883 SoC platform device registration
4 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/spi/spi.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/clk.h>
21 #include <linux/rt2x00_platform.h>
23 #include <asm/addrspace.h>
25 #include <asm/mach-ralink/rt3883.h>
26 #include <asm/mach-ralink/rt3883_regs.h>
27 #include <asm/mach-ralink/rt3883_ehci_platform.h>
28 #include <asm/mach-ralink/rt3883_ohci_platform.h>
29 #include <asm/mach-ralink/ramips_nand_platform.h>
32 #include <ramips_eth_platform.h>
34 static struct resource rt3883_flash0_resources
[] = {
36 .flags
= IORESOURCE_MEM
,
37 .start
= RT3883_BOOT_BASE
,
38 .end
= RT3883_BOOT_BASE
+ RT3883_BOOT_SIZE
- 1,
42 struct physmap_flash_data rt3883_flash0_data
;
43 static struct platform_device rt3883_flash0_device
= {
44 .name
= "physmap-flash",
45 .resource
= rt3883_flash0_resources
,
46 .num_resources
= ARRAY_SIZE(rt3883_flash0_resources
),
48 .platform_data
= &rt3883_flash0_data
,
52 static struct resource rt3883_flash1_resources
[] = {
54 .flags
= IORESOURCE_MEM
,
55 .start
= RT3883_SRAM_BASE
,
56 .end
= RT3883_SRAM_BASE
+ RT3883_SRAM_SIZE
- 1,
60 struct physmap_flash_data rt3883_flash1_data
;
61 static struct platform_device rt3883_flash1_device
= {
62 .name
= "physmap-flash",
63 .resource
= rt3883_flash1_resources
,
64 .num_resources
= ARRAY_SIZE(rt3883_flash1_resources
),
66 .platform_data
= &rt3883_flash1_data
,
70 static int rt3883_flash_instance __initdata
;
71 void __init
rt3883_register_pflash(unsigned int id
)
73 struct platform_device
*pdev
;
74 struct physmap_flash_data
*pdata
;
75 void __iomem
*fscc_base
;
81 pdev
= &rt3883_flash0_device
;
82 reg
= RT3883_FSCC_REG_FLASH_CFG0
;
85 pdev
= &rt3883_flash1_device
;
86 reg
= RT3883_FSCC_REG_FLASH_CFG1
;
92 pdata
= pdev
->dev
.platform_data
;
94 fscc_base
= ioremap(RT3883_FSCC_BASE
, RT3883_FSCC_SIZE
);
96 panic("RT3883: ioremap failed for FSCC");
98 t
= __raw_readl(fscc_base
+ reg
);
101 t
= (t
>> RT3883_FLASH_CFG_WIDTH_SHIFT
) & RT3883_FLASH_CFG_WIDTH_MASK
;
103 case RT3883_FLASH_CFG_WIDTH_8BIT
:
106 case RT3883_FLASH_CFG_WIDTH_16BIT
:
109 case RT3883_FLASH_CFG_WIDTH_32BIT
:
116 pr_warn("RT3883: flash bank%d: invalid width detected\n", id
);
120 pdev
->id
= rt3883_flash_instance
;
122 platform_device_register(pdev
);
123 rt3883_flash_instance
++;
126 static atomic_t rt3883_usb_use_count
= ATOMIC_INIT(0);
128 static void rt3883_usb_host_start(void)
132 if (atomic_inc_return(&rt3883_usb_use_count
) != 1)
135 t
= rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS
);
138 /* put the HOST controller into reset */
139 t
= rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL
);
140 t
|= RT3883_RSTCTRL_UHST
;
141 rt3883_sysc_wr(t
, RT3883_SYSC_REG_RSTCTRL
);
144 /* enable clock for port0's and port1's phys */
145 t
= rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1
);
146 t
= t
| RT3883_CLKCFG1_UPHY0_CLK_EN
| RT3883_CLKCFG1_UPHY1_CLK_EN
;
147 rt3883_sysc_wr(t
, RT3883_SYSC_REG_CLKCFG1
);
150 /* pull USBHOST and USBDEV out from reset */
151 t
= rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL
);
152 t
&= ~(RT3883_RSTCTRL_UHST
| RT3883_RSTCTRL_UDEV
);
153 rt3883_sysc_wr(t
, RT3883_SYSC_REG_RSTCTRL
);
156 /* enable host mode */
157 t
= rt3883_sysc_rr(RT3883_SYSC_REG_SYSCFG1
);
158 t
|= RT3883_SYSCFG1_USB0_HOST_MODE
;
159 rt3883_sysc_wr(t
, RT3883_SYSC_REG_SYSCFG1
);
161 t
= rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS
);
164 static void rt3883_usb_host_stop(void)
168 if (atomic_dec_return(&rt3883_usb_use_count
) != 0)
171 /* put USBHOST and USBDEV into reset */
172 t
= rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL
);
173 t
|= RT3883_RSTCTRL_UHST
| RT3883_RSTCTRL_UDEV
;
174 rt3883_sysc_wr(t
, RT3883_SYSC_REG_RSTCTRL
);
177 /* disable clock for port0's and port1's phys*/
178 t
= rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1
);
179 t
&= ~(RT3883_CLKCFG1_UPHY0_CLK_EN
| RT3883_CLKCFG1_UPHY1_CLK_EN
);
180 rt3883_sysc_wr(t
, RT3883_SYSC_REG_CLKCFG1
);
184 static struct rt3883_ehci_platform_data rt3883_ehci_data
= {
185 .start_hw
= rt3883_usb_host_start
,
186 .stop_hw
= rt3883_usb_host_stop
,
189 static struct resource rt3883_ehci_resources
[] = {
191 .start
= RT3883_EHCI_BASE
,
192 .end
= RT3883_EHCI_BASE
+ PAGE_SIZE
- 1,
193 .flags
= IORESOURCE_MEM
,
195 .start
= RT3883_INTC_IRQ_UHST
,
196 .end
= RT3883_INTC_IRQ_UHST
,
197 .flags
= IORESOURCE_IRQ
,
201 static u64 rt3883_ehci_dmamask
= DMA_BIT_MASK(32);
202 static struct platform_device rt3883_ehci_device
= {
203 .name
= "rt3883-ehci",
205 .resource
= rt3883_ehci_resources
,
206 .num_resources
= ARRAY_SIZE(rt3883_ehci_resources
),
208 .dma_mask
= &rt3883_ehci_dmamask
,
209 .coherent_dma_mask
= DMA_BIT_MASK(32),
210 .platform_data
= &rt3883_ehci_data
,
214 static struct resource rt3883_ohci_resources
[] = {
216 .start
= RT3883_OHCI_BASE
,
217 .end
= RT3883_OHCI_BASE
+ PAGE_SIZE
- 1,
218 .flags
= IORESOURCE_MEM
,
220 .start
= RT3883_INTC_IRQ_UHST
,
221 .end
= RT3883_INTC_IRQ_UHST
,
222 .flags
= IORESOURCE_IRQ
,
226 static struct rt3883_ohci_platform_data rt3883_ohci_data
= {
227 .start_hw
= rt3883_usb_host_start
,
228 .stop_hw
= rt3883_usb_host_stop
,
231 static u64 rt3883_ohci_dmamask
= DMA_BIT_MASK(32);
232 static struct platform_device rt3883_ohci_device
= {
233 .name
= "rt3883-ohci",
235 .resource
= rt3883_ohci_resources
,
236 .num_resources
= ARRAY_SIZE(rt3883_ohci_resources
),
238 .dma_mask
= &rt3883_ohci_dmamask
,
239 .coherent_dma_mask
= DMA_BIT_MASK(32),
240 .platform_data
= &rt3883_ohci_data
,
244 void __init
rt3883_register_usbhost(void)
246 platform_device_register(&rt3883_ehci_device
);
247 platform_device_register(&rt3883_ohci_device
);
250 static void rt3883_fe_reset(void)
254 t
= rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL
);
255 t
|= RT3883_RSTCTRL_FE
;
256 rt3883_sysc_wr(t
, RT3883_SYSC_REG_RSTCTRL
);
258 t
&= ~RT3883_RSTCTRL_FE
;
259 rt3883_sysc_wr(t
, RT3883_SYSC_REG_RSTCTRL
);
262 static struct resource rt3883_eth_resources
[] = {
264 .start
= RT3883_FE_BASE
,
265 .end
= RT3883_FE_BASE
+ PAGE_SIZE
- 1,
266 .flags
= IORESOURCE_MEM
,
268 .start
= RT3883_CPU_IRQ_FE
,
269 .end
= RT3883_CPU_IRQ_FE
,
270 .flags
= IORESOURCE_IRQ
,
274 struct ramips_eth_platform_data rt3883_eth_data
= {
275 .mac
= { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 },
276 .reset_fe
= rt3883_fe_reset
,
280 static struct platform_device rt3883_eth_device
= {
281 .name
= "ramips_eth",
282 .resource
= rt3883_eth_resources
,
283 .num_resources
= ARRAY_SIZE(rt3883_eth_resources
),
285 .platform_data
= &rt3883_eth_data
,
289 void __init
rt3883_register_ethernet(void)
293 clk
= clk_get(NULL
, "sys");
295 panic("unable to get SYS clock, err=%ld", PTR_ERR(clk
));
297 rt3883_eth_data
.sys_freq
= clk_get_rate(clk
);
299 platform_device_register(&rt3883_eth_device
);
302 static struct resource rt3883_wlan_resources
[] = {
304 .start
= RT3883_WLAN_BASE
,
305 .end
= RT3883_WLAN_BASE
+ 0x3FFFF,
306 .flags
= IORESOURCE_MEM
,
308 .start
= RT3883_CPU_IRQ_WLAN
,
309 .end
= RT3883_CPU_IRQ_WLAN
,
310 .flags
= IORESOURCE_IRQ
,
314 struct rt2x00_platform_data rt3883_wlan_data
;
315 static struct platform_device rt3883_wlan_device
= {
316 .name
= "rt2800_wmac",
317 .resource
= rt3883_wlan_resources
,
318 .num_resources
= ARRAY_SIZE(rt3883_wlan_resources
),
320 .platform_data
= &rt3883_wlan_data
,
324 void __init
rt3883_register_wlan(void)
326 rt3883_wlan_data
.eeprom_file_name
= "RT3883.eeprom",
327 platform_device_register(&rt3883_wlan_device
);
330 static struct resource rt3883_wdt_resources
[] = {
332 .start
= RT3883_TIMER_BASE
,
333 .end
= RT3883_TIMER_BASE
+ RT3883_TIMER_SIZE
- 1,
334 .flags
= IORESOURCE_MEM
,
338 static struct platform_device rt3883_wdt_device
= {
339 .name
= "ramips-wdt",
341 .resource
= rt3883_wdt_resources
,
342 .num_resources
= ARRAY_SIZE(rt3883_wdt_resources
),
345 void __init
rt3883_register_wdt(bool enable_reset
)
350 /* enable WDT reset output on GPIO 2 */
351 t
= rt3883_sysc_rr(RT3883_SYSC_REG_SYSCFG1
);
352 t
|= RT3883_SYSCFG1_GPIO2_AS_WDT_OUT
;
353 rt3883_sysc_wr(t
, RT3883_SYSC_REG_SYSCFG1
);
356 platform_device_register(&rt3883_wdt_device
);
359 static struct resource rt3883_nand_resources
[] = {
361 .flags
= IORESOURCE_MEM
,
362 .start
= RT3883_NANDC_BASE
,
363 .end
= RT3883_NANDC_BASE
+ RT3883_NANDC_SIZE
- 1,
367 struct ramips_nand_platform_data rt3883_nand_data
;
368 static struct platform_device rt3883_nand_device
= {
369 .name
= RAMIPS_NAND_DRIVER_NAME
,
371 .resource
= rt3883_nand_resources
,
372 .num_resources
= ARRAY_SIZE(rt3883_nand_resources
),
374 .platform_data
= &rt3883_nand_data
,
378 void __init
rt3883_register_nand(void)
380 platform_device_register(&rt3883_nand_device
);
383 static struct resource rt3883_spi_resources
[] = {
385 .flags
= IORESOURCE_MEM
,
386 .start
= RT3883_SPI_BASE
,
387 .end
= RT3883_SPI_BASE
+ RT3883_SPI_SIZE
- 1,
391 static struct platform_device rt3883_spi_device
= {
392 .name
= "ramips-spi",
394 .resource
= rt3883_spi_resources
,
395 .num_resources
= ARRAY_SIZE(rt3883_spi_resources
),
398 void __init
rt3883_register_spi(struct spi_board_info
*info
, int n
)
400 spi_register_board_info(info
, n
);
401 platform_device_register(&rt3883_spi_device
);