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ramips: Rework ramips_eth to not require irqsave locking anymore
[openwrt/svn-archive/archive.git] / target / linux / ramips / files / drivers / net / ramips.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
14 *
15 * Copyright (C) 2009 John Crispin <blogic@openwrt.org>
16 */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/init.h>
23 #include <linux/skbuff.h>
24 #include <linux/etherdevice.h>
25 #include <linux/ethtool.h>
26 #include <linux/platform_device.h>
27
28 #include <ramips_eth_platform.h>
29 #include "ramips_eth.h"
30
31 #define TX_TIMEOUT (20 * HZ / 100)
32 #define MAX_RX_LENGTH 1600
33
34 #ifdef CONFIG_RALINK_RT305X
35 #include "ramips_esw.c"
36 #else
37 static inline int rt305x_esw_init(void) { return 0; }
38 static inline void rt305x_esw_exit(void) { }
39 #endif
40
41 #define phys_to_bus(a) (a & 0x1FFFFFFF)
42
43 static struct net_device * ramips_dev;
44 static void __iomem *ramips_fe_base = 0;
45
46 static inline void
47 ramips_fe_wr(u32 val, unsigned reg)
48 {
49 __raw_writel(val, ramips_fe_base + reg);
50 }
51
52 static inline u32
53 ramips_fe_rr(unsigned reg)
54 {
55 return __raw_readl(ramips_fe_base + reg);
56 }
57
58 static inline void
59 ramips_fe_int_disable(u32 mask)
60 {
61 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) & ~mask,
62 RAMIPS_FE_INT_ENABLE);
63 /* flush write */
64 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
65 }
66
67 static inline void
68 ramips_fe_int_enable(u32 mask)
69 {
70 ramips_fe_wr(ramips_fe_rr(RAMIPS_FE_INT_ENABLE) | mask,
71 RAMIPS_FE_INT_ENABLE);
72 /* flush write */
73 ramips_fe_rr(RAMIPS_FE_INT_ENABLE);
74 }
75
76 static inline void
77 ramips_hw_set_macaddr(unsigned char *mac)
78 {
79 ramips_fe_wr((mac[0] << 8) | mac[1], RAMIPS_GDMA1_MAC_ADRH);
80 ramips_fe_wr((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
81 RAMIPS_GDMA1_MAC_ADRL);
82 }
83
84 #ifdef CONFIG_RALINK_RT288X
85 static void
86 ramips_setup_mdio_cfg(struct raeth_priv *re)
87 {
88 unsigned int mdio_cfg;
89
90 mdio_cfg = RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
91 RAMIPS_MDIO_CFG_TX_CLK_SKEW_200 |
92 RAMIPS_MDIO_CFG_GP1_FRC_EN;
93
94 if (re->duplex == DUPLEX_FULL)
95 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_DUPLEX;
96
97 if (re->tx_fc)
98 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_TX;
99
100 if (re->rx_fc)
101 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_FC_RX;
102
103 switch (re->speed) {
104 case SPEED_10:
105 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_10;
106 break;
107 case SPEED_100:
108 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_100;
109 break;
110 case SPEED_1000:
111 mdio_cfg |= RAMIPS_MDIO_CFG_GP1_SPEED_1000;
112 break;
113 default:
114 BUG();
115 }
116
117 ramips_fe_wr(mdio_cfg, RAMIPS_MDIO_CFG);
118 }
119 #else
120 static inline void ramips_setup_mdio_cfg(struct raeth_priv *re)
121 {
122 }
123 #endif /* CONFIG_RALINK_RT288X */
124
125 static void
126 ramips_cleanup_dma(struct raeth_priv *re)
127 {
128 int i;
129
130 for (i = 0; i < NUM_RX_DESC; i++)
131 if (re->rx_skb[i])
132 dev_kfree_skb_any(re->rx_skb[i]);
133
134 if (re->rx)
135 dma_free_coherent(NULL,
136 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
137 re->rx, re->phy_rx);
138
139 if (re->tx)
140 dma_free_coherent(NULL,
141 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
142 re->tx, re->phy_tx);
143 }
144
145 static int
146 ramips_alloc_dma(struct raeth_priv *re)
147 {
148 int err = -ENOMEM;
149 int i;
150
151 re->skb_free_idx = 0;
152
153 /* setup tx ring */
154 re->tx = dma_alloc_coherent(NULL,
155 NUM_TX_DESC * sizeof(struct ramips_tx_dma),
156 &re->phy_tx, GFP_ATOMIC);
157 if (!re->tx)
158 goto err_cleanup;
159
160 memset(re->tx, 0, NUM_TX_DESC * sizeof(struct ramips_tx_dma));
161 for (i = 0; i < NUM_TX_DESC; i++) {
162 re->tx[i].txd2 = TX_DMA_LSO | TX_DMA_DONE;
163 re->tx[i].txd4 = TX_DMA_QN(3) | TX_DMA_PN(1);
164 }
165
166 /* setup rx ring */
167 re->rx = dma_alloc_coherent(NULL,
168 NUM_RX_DESC * sizeof(struct ramips_rx_dma),
169 &re->phy_rx, GFP_ATOMIC);
170 if (!re->rx)
171 goto err_cleanup;
172
173 memset(re->rx, 0, sizeof(struct ramips_rx_dma) * NUM_RX_DESC);
174 for (i = 0; i < NUM_RX_DESC; i++) {
175 struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_LENGTH +
176 NET_IP_ALIGN);
177
178 if (!new_skb)
179 goto err_cleanup;
180
181 skb_reserve(new_skb, NET_IP_ALIGN);
182 re->rx[i].rxd1 = dma_map_single(NULL,
183 new_skb->data,
184 MAX_RX_LENGTH,
185 DMA_FROM_DEVICE);
186 re->rx[i].rxd2 |= RX_DMA_LSO;
187 re->rx_skb[i] = new_skb;
188 }
189
190 return 0;
191
192 err_cleanup:
193 ramips_cleanup_dma(re);
194 return err;
195 }
196
197 static void
198 ramips_setup_dma(struct raeth_priv *re)
199 {
200 ramips_fe_wr(phys_to_bus(re->phy_tx), RAMIPS_TX_BASE_PTR0);
201 ramips_fe_wr(NUM_TX_DESC, RAMIPS_TX_MAX_CNT0);
202 ramips_fe_wr(0, RAMIPS_TX_CTX_IDX0);
203 ramips_fe_wr(RAMIPS_PST_DTX_IDX0, RAMIPS_PDMA_RST_CFG);
204
205 ramips_fe_wr(phys_to_bus(re->phy_rx), RAMIPS_RX_BASE_PTR0);
206 ramips_fe_wr(NUM_RX_DESC, RAMIPS_RX_MAX_CNT0);
207 ramips_fe_wr((NUM_RX_DESC - 1), RAMIPS_RX_CALC_IDX0);
208 ramips_fe_wr(RAMIPS_PST_DRX_IDX0, RAMIPS_PDMA_RST_CFG);
209 }
210
211 static int
212 ramips_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
213 {
214 struct raeth_priv *priv = netdev_priv(dev);
215 unsigned long tx;
216 unsigned int tx_next;
217 unsigned int mapped_addr;
218
219 if (priv->plat->min_pkt_len) {
220 if (skb->len < priv->plat->min_pkt_len) {
221 if (skb_padto(skb, priv->plat->min_pkt_len)) {
222 printk(KERN_ERR
223 "ramips_eth: skb_padto failed\n");
224 kfree_skb(skb);
225 return 0;
226 }
227 skb_put(skb, priv->plat->min_pkt_len - skb->len);
228 }
229 }
230
231 dev->trans_start = jiffies;
232 mapped_addr = (unsigned int) dma_map_single(NULL, skb->data, skb->len,
233 DMA_TO_DEVICE);
234 dma_sync_single_for_device(NULL, mapped_addr, skb->len, DMA_TO_DEVICE);
235 spin_lock(&priv->page_lock);
236 tx = ramips_fe_rr(RAMIPS_TX_CTX_IDX0);
237 tx_next = (tx + 1) % NUM_TX_DESC;
238
239 if ((priv->tx_skb[tx]) || (priv->tx_skb[tx_next]) ||
240 !(priv->tx[tx].txd2 & TX_DMA_DONE) ||
241 !(priv->tx[tx_next].txd2 & TX_DMA_DONE))
242 goto out;
243
244 priv->tx[tx].txd1 = mapped_addr;
245 priv->tx[tx].txd2 &= ~(TX_DMA_PLEN0_MASK | TX_DMA_DONE);
246 priv->tx[tx].txd2 |= TX_DMA_PLEN0(skb->len);
247 dev->stats.tx_packets++;
248 dev->stats.tx_bytes += skb->len;
249 priv->tx_skb[tx] = skb;
250 wmb();
251 ramips_fe_wr(tx_next, RAMIPS_TX_CTX_IDX0);
252 spin_unlock(&priv->page_lock);
253 return NETDEV_TX_OK;
254
255 out:
256 spin_unlock(&priv->page_lock);
257 dev->stats.tx_dropped++;
258 kfree_skb(skb);
259 return NETDEV_TX_OK;
260 }
261
262 static void
263 ramips_eth_rx_hw(unsigned long ptr)
264 {
265 struct net_device *dev = (struct net_device *) ptr;
266 struct raeth_priv *priv = netdev_priv(dev);
267 int rx;
268 int max_rx = 16;
269
270 while (max_rx) {
271 struct sk_buff *rx_skb, *new_skb;
272
273 rx = (ramips_fe_rr(RAMIPS_RX_CALC_IDX0) + 1) % NUM_RX_DESC;
274 if (!(priv->rx[rx].rxd2 & RX_DMA_DONE))
275 break;
276 max_rx--;
277
278 new_skb = netdev_alloc_skb(dev, MAX_RX_LENGTH + NET_IP_ALIGN);
279 /* Reuse the buffer on allocation failures */
280 if (new_skb) {
281 rx_skb = priv->rx_skb[rx];
282 skb_put(rx_skb, RX_DMA_PLEN0(priv->rx[rx].rxd2));
283 rx_skb->dev = dev;
284 rx_skb->protocol = eth_type_trans(rx_skb, dev);
285 rx_skb->ip_summed = CHECKSUM_NONE;
286 dev->stats.rx_packets++;
287 dev->stats.rx_bytes += rx_skb->len;
288 netif_rx(rx_skb);
289
290 priv->rx_skb[rx] = new_skb;
291 skb_reserve(new_skb, NET_IP_ALIGN);
292 priv->rx[rx].rxd1 = dma_map_single(NULL,
293 new_skb->data,
294 MAX_RX_LENGTH,
295 DMA_FROM_DEVICE);
296 }
297
298 priv->rx[rx].rxd2 &= ~RX_DMA_DONE;
299 wmb();
300 ramips_fe_wr(rx, RAMIPS_RX_CALC_IDX0);
301 }
302
303 if (max_rx == 0)
304 tasklet_schedule(&priv->rx_tasklet);
305 else
306 ramips_fe_int_enable(RAMIPS_RX_DLY_INT);
307 }
308
309 static void
310 ramips_eth_tx_housekeeping(unsigned long ptr)
311 {
312 struct net_device *dev = (struct net_device*)ptr;
313 struct raeth_priv *priv = netdev_priv(dev);
314
315 spin_lock(&priv->page_lock);
316 while ((priv->tx[priv->skb_free_idx].txd2 & TX_DMA_DONE) &&
317 (priv->tx_skb[priv->skb_free_idx])) {
318 dev_kfree_skb_irq(priv->tx_skb[priv->skb_free_idx]);
319 priv->tx_skb[priv->skb_free_idx] = 0;
320 priv->skb_free_idx++;
321 if (priv->skb_free_idx >= NUM_TX_DESC)
322 priv->skb_free_idx = 0;
323 }
324 spin_unlock(&priv->page_lock);
325
326 ramips_fe_int_enable(RAMIPS_TX_DLY_INT);
327 }
328
329 static void
330 ramips_eth_timeout(struct net_device *dev)
331 {
332 struct raeth_priv *priv = netdev_priv(dev);
333
334 tasklet_schedule(&priv->tx_housekeeping_tasklet);
335 }
336
337 static irqreturn_t
338 ramips_eth_irq(int irq, void *dev)
339 {
340 struct raeth_priv *priv = netdev_priv(dev);
341 unsigned long fe_int = ramips_fe_rr(RAMIPS_FE_INT_STATUS);
342
343 ramips_fe_wr(0xFFFFFFFF, RAMIPS_FE_INT_STATUS);
344
345 if (fe_int & RAMIPS_RX_DLY_INT) {
346 ramips_fe_int_disable(RAMIPS_RX_DLY_INT);
347 tasklet_schedule(&priv->rx_tasklet);
348 }
349
350 if (fe_int & RAMIPS_TX_DLY_INT) {
351 ramips_fe_int_disable(RAMIPS_TX_DLY_INT);
352 tasklet_schedule(&priv->tx_housekeeping_tasklet);
353 }
354
355 return IRQ_HANDLED;
356 }
357
358 static int
359 ramips_eth_open(struct net_device *dev)
360 {
361 struct raeth_priv *priv = netdev_priv(dev);
362 int err;
363
364 err = request_irq(dev->irq, ramips_eth_irq, IRQF_DISABLED,
365 dev->name, dev);
366 if (err)
367 return err;
368
369 err = ramips_alloc_dma(priv);
370 if (err)
371 goto err_free_irq;
372
373 ramips_hw_set_macaddr(dev->dev_addr);
374
375 ramips_setup_dma(priv);
376 ramips_fe_wr((ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) & 0xff) |
377 (RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN |
378 RAMIPS_TX_DMA_EN | RAMIPS_PDMA_SIZE_4DWORDS),
379 RAMIPS_PDMA_GLO_CFG);
380 ramips_fe_wr((ramips_fe_rr(RAMIPS_FE_GLO_CFG) &
381 ~(RAMIPS_US_CYC_CNT_MASK << RAMIPS_US_CYC_CNT_SHIFT)) |
382 ((priv->plat->sys_freq / RAMIPS_US_CYC_CNT_DIVISOR) << RAMIPS_US_CYC_CNT_SHIFT),
383 RAMIPS_FE_GLO_CFG);
384
385 tasklet_init(&priv->tx_housekeeping_tasklet, ramips_eth_tx_housekeeping,
386 (unsigned long)dev);
387 tasklet_init(&priv->rx_tasklet, ramips_eth_rx_hw, (unsigned long)dev);
388
389 ramips_setup_mdio_cfg(priv);
390
391 ramips_fe_wr(RAMIPS_DELAY_INIT, RAMIPS_DLY_INT_CFG);
392 ramips_fe_wr(RAMIPS_TX_DLY_INT | RAMIPS_RX_DLY_INT, RAMIPS_FE_INT_ENABLE);
393 ramips_fe_wr(ramips_fe_rr(RAMIPS_GDMA1_FWD_CFG) &
394 ~(RAMIPS_GDM1_ICS_EN | RAMIPS_GDM1_TCS_EN | RAMIPS_GDM1_UCS_EN | 0xffff),
395 RAMIPS_GDMA1_FWD_CFG);
396 ramips_fe_wr(ramips_fe_rr(RAMIPS_CDMA_CSG_CFG) &
397 ~(RAMIPS_ICS_GEN_EN | RAMIPS_TCS_GEN_EN | RAMIPS_UCS_GEN_EN),
398 RAMIPS_CDMA_CSG_CFG);
399 ramips_fe_wr(RAMIPS_PSE_FQFC_CFG_INIT, RAMIPS_PSE_FQ_CFG);
400 ramips_fe_wr(1, RAMIPS_FE_RST_GL);
401 ramips_fe_wr(0, RAMIPS_FE_RST_GL);
402
403 netif_start_queue(dev);
404 return 0;
405
406 err_free_irq:
407 free_irq(dev->irq, dev);
408 return err;
409 }
410
411 static int
412 ramips_eth_stop(struct net_device *dev)
413 {
414 struct raeth_priv *priv = netdev_priv(dev);
415
416 ramips_fe_wr(ramips_fe_rr(RAMIPS_PDMA_GLO_CFG) &
417 ~(RAMIPS_TX_WB_DDONE | RAMIPS_RX_DMA_EN | RAMIPS_TX_DMA_EN),
418 RAMIPS_PDMA_GLO_CFG);
419
420 /* disable all interrupts in the hw */
421 ramips_fe_wr(0, RAMIPS_FE_INT_ENABLE);
422
423 free_irq(dev->irq, dev);
424 netif_stop_queue(dev);
425 tasklet_kill(&priv->tx_housekeeping_tasklet);
426 tasklet_kill(&priv->rx_tasklet);
427 ramips_cleanup_dma(priv);
428 printk(KERN_DEBUG "ramips_eth: stopped\n");
429 return 0;
430 }
431
432 static int __init
433 ramips_eth_probe(struct net_device *dev)
434 {
435 struct raeth_priv *priv = netdev_priv(dev);
436
437 BUG_ON(!priv->plat->reset_fe);
438 priv->plat->reset_fe();
439 net_srandom(jiffies);
440 memcpy(dev->dev_addr, priv->plat->mac, ETH_ALEN);
441
442 ether_setup(dev);
443 dev->mtu = 1500;
444 dev->watchdog_timeo = TX_TIMEOUT;
445 spin_lock_init(&priv->page_lock);
446
447 return 0;
448 }
449
450 static const struct net_device_ops ramips_eth_netdev_ops = {
451 .ndo_init = ramips_eth_probe,
452 .ndo_open = ramips_eth_open,
453 .ndo_stop = ramips_eth_stop,
454 .ndo_start_xmit = ramips_eth_hard_start_xmit,
455 .ndo_tx_timeout = ramips_eth_timeout,
456 .ndo_change_mtu = eth_change_mtu,
457 .ndo_set_mac_address = eth_mac_addr,
458 .ndo_validate_addr = eth_validate_addr,
459 };
460
461 static int
462 ramips_eth_plat_probe(struct platform_device *plat)
463 {
464 struct raeth_priv *priv;
465 struct ramips_eth_platform_data *data = plat->dev.platform_data;
466 struct resource *res;
467 int err;
468
469 if (!data) {
470 dev_err(&plat->dev, "no platform data specified\n");
471 return -EINVAL;
472 }
473
474 res = platform_get_resource(plat, IORESOURCE_MEM, 0);
475 if (!res) {
476 dev_err(&plat->dev, "no memory resource found\n");
477 return -ENXIO;
478 }
479
480 ramips_fe_base = ioremap_nocache(res->start, res->end - res->start + 1);
481 if (!ramips_fe_base)
482 return -ENOMEM;
483
484 ramips_dev = alloc_etherdev(sizeof(struct raeth_priv));
485 if (!ramips_dev) {
486 dev_err(&plat->dev, "alloc_etherdev failed\n");
487 err = -ENOMEM;
488 goto err_unmap;
489 }
490
491 strcpy(ramips_dev->name, "eth%d");
492 ramips_dev->irq = platform_get_irq(plat, 0);
493 if (ramips_dev->irq < 0) {
494 dev_err(&plat->dev, "no IRQ resource found\n");
495 err = -ENXIO;
496 goto err_free_dev;
497 }
498 ramips_dev->addr_len = ETH_ALEN;
499 ramips_dev->base_addr = (unsigned long)ramips_fe_base;
500 ramips_dev->netdev_ops = &ramips_eth_netdev_ops;
501
502 priv = netdev_priv(ramips_dev);
503
504 priv->speed = data->speed;
505 priv->duplex = data->duplex;
506 priv->rx_fc = data->rx_fc;
507 priv->tx_fc = data->tx_fc;
508 priv->plat = data;
509
510 err = register_netdev(ramips_dev);
511 if (err) {
512 dev_err(&plat->dev, "error bringing up device\n");
513 goto err_free_dev;
514 }
515
516 printk(KERN_DEBUG "ramips_eth: loaded\n");
517 return 0;
518
519 err_free_dev:
520 kfree(ramips_dev);
521 err_unmap:
522 iounmap(ramips_fe_base);
523 return err;
524 }
525
526 static int
527 ramips_eth_plat_remove(struct platform_device *plat)
528 {
529 unregister_netdev(ramips_dev);
530 free_netdev(ramips_dev);
531 printk(KERN_DEBUG "ramips_eth: unloaded\n");
532 return 0;
533 }
534
535 static struct platform_driver ramips_eth_driver = {
536 .probe = ramips_eth_plat_probe,
537 .remove = ramips_eth_plat_remove,
538 .driver = {
539 .name = "ramips_eth",
540 .owner = THIS_MODULE,
541 },
542 };
543
544 static int __init
545 ramips_eth_init(void)
546 {
547 int ret;
548
549 ret = rt305x_esw_init();
550 if (ret)
551 return ret;
552
553 ret = platform_driver_register(&ramips_eth_driver);
554 if (ret) {
555 printk(KERN_ERR
556 "ramips_eth: Error registering platfom driver!\n");
557 goto esw_cleanup;
558 }
559
560 return 0;
561
562 esw_cleanup:
563 rt305x_esw_exit();
564 return ret;
565 }
566
567 static void __exit
568 ramips_eth_cleanup(void)
569 {
570 platform_driver_unregister(&ramips_eth_driver);
571 rt305x_esw_exit();
572 }
573
574 module_init(ramips_eth_init);
575 module_exit(ramips_eth_cleanup);
576
577 MODULE_LICENSE("GPL");
578 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
579 MODULE_DESCRIPTION("ethernet driver for ramips boards");
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