ramips: ramips_esw: coding style cleanup
[openwrt/svn-archive/archive.git] / target / linux / ramips / files / drivers / net / ramips_esw.c
1 #include <linux/ioport.h>
2
3 #include <rt305x_regs.h>
4 #include <rt305x_esw_platform.h>
5
6 #define RT305X_ESW_REG_FCT0 0x08
7 #define RT305X_ESW_REG_PFC1 0x14
8 #define RT305X_ESW_REG_PVIDC(_n) (0x48 + 4 * (_n))
9 #define RT305X_ESW_REG_VLANI(_n) (0x50 + 4 * (_n))
10 #define RT305X_ESW_REG_VMSC(_n) (0x70 + 4 * (_n))
11 #define RT305X_ESW_REG_FPA 0x84
12 #define RT305X_ESW_REG_SOCPC 0x8c
13 #define RT305X_ESW_REG_POC1 0x90
14 #define RT305X_ESW_REG_POC2 0x94
15 #define RT305X_ESW_REG_POC3 0x98
16 #define RT305X_ESW_REG_SGC 0x9c
17 #define RT305X_ESW_REG_PCR0 0xc0
18 #define RT305X_ESW_REG_PCR1 0xc4
19 #define RT305X_ESW_REG_FPA2 0xc8
20 #define RT305X_ESW_REG_FCT2 0xcc
21 #define RT305X_ESW_REG_SGC2 0xe4
22
23 #define RT305X_ESW_PCR0_WT_NWAY_DATA_S 16
24 #define RT305X_ESW_PCR0_WT_PHY_CMD BIT(13)
25 #define RT305X_ESW_PCR0_CPU_PHY_REG_S 8
26
27 #define RT305X_ESW_PCR1_WT_DONE BIT(0)
28
29 #define RT305X_ESW_PHY_TIMEOUT (5 * HZ)
30
31 struct rt305x_esw {
32 void __iomem *base;
33 struct rt305x_esw_platform_data *pdata;
34 };
35
36 static inline void
37 ramips_esw_wr(struct rt305x_esw *esw, u32 val, unsigned reg)
38 {
39 __raw_writel(val, esw->base + reg);
40 }
41
42 static inline u32
43 ramips_esw_rr(struct rt305x_esw *esw, unsigned reg)
44 {
45 return __raw_readl(esw->base + reg);
46 }
47
48 static u32
49 mii_mgr_write(struct rt305x_esw *esw, u32 phy_addr, u32 phy_register,
50 u32 write_data)
51 {
52 unsigned long t_start = jiffies;
53 int ret = 0;
54
55 while (1) {
56 if (!(ramips_esw_rr(esw, RT305X_ESW_REG_PCR1) &
57 RT305X_ESW_PCR1_WT_DONE))
58 break;
59 if (time_after(jiffies, t_start + RT305X_ESW_PHY_TIMEOUT)) {
60 ret = 1;
61 goto out;
62 }
63 }
64
65 write_data &= 0xffff;
66 ramips_esw_wr(esw,
67 (write_data << RT305X_ESW_PCR0_WT_NWAY_DATA_S) |
68 (phy_register << RT305X_ESW_PCR0_CPU_PHY_REG_S) |
69 (phy_addr) | RT305X_ESW_PCR0_WT_PHY_CMD,
70 RT305X_ESW_REG_PCR0);
71
72 t_start = jiffies;
73 while (1) {
74 if (ramips_esw_rr(esw, RT305X_ESW_REG_PCR1) &
75 RT305X_ESW_PCR1_WT_DONE)
76 break;
77
78 if (time_after(jiffies, t_start + RT305X_ESW_PHY_TIMEOUT)) {
79 ret = 1;
80 break;
81 }
82 }
83 out:
84 if (ret)
85 printk(KERN_ERR "ramips_eth: MDIO timeout\n");
86 return ret;
87 }
88
89 static void
90 rt305x_esw_hw_init(struct rt305x_esw *esw)
91 {
92 int i;
93
94 /* vodoo from original driver */
95 ramips_esw_wr(esw, 0xC8A07850, RT305X_ESW_REG_FCT0);
96 ramips_esw_wr(esw, 0x00000000, RT305X_ESW_REG_SGC2);
97 ramips_esw_wr(esw, 0x00405555, RT305X_ESW_REG_PFC1);
98 ramips_esw_wr(esw, 0x00002001, RT305X_ESW_REG_VLANI(0));
99 ramips_esw_wr(esw, 0x00007f7f, RT305X_ESW_REG_POC1);
100 ramips_esw_wr(esw, 0x00007f3f, RT305X_ESW_REG_POC3);
101 ramips_esw_wr(esw, 0x00d6500c, RT305X_ESW_REG_FCT2);
102 ramips_esw_wr(esw, 0x0008a301, RT305X_ESW_REG_SGC);
103 ramips_esw_wr(esw, 0x02404040, RT305X_ESW_REG_SOCPC);
104 ramips_esw_wr(esw, 0x00001002, RT305X_ESW_REG_PVIDC(2));
105 ramips_esw_wr(esw, 0x3f502b28, RT305X_ESW_REG_FPA2);
106 ramips_esw_wr(esw, 0x00000000, RT305X_ESW_REG_FPA);
107
108 mii_mgr_write(esw, 0, 31, 0x8000);
109 for (i = 0; i < 5; i++) {
110 /* TX10 waveform coefficient */
111 mii_mgr_write(esw, i, 0, 0x3100);
112 /* TX10 waveform coefficient */
113 mii_mgr_write(esw, i, 26, 0x1601);
114 /* TX100/TX10 AD/DA current bias */
115 mii_mgr_write(esw, i, 29, 0x7058);
116 /* TX100 slew rate control */
117 mii_mgr_write(esw, i, 30, 0x0018);
118 }
119
120 /* PHY IOT */
121 /* select global register */
122 mii_mgr_write(esw, 0, 31, 0x0);
123 /* tune TP_IDL tail and head waveform */
124 mii_mgr_write(esw, 0, 22, 0x052f);
125 /* set TX10 signal amplitude threshold to minimum */
126 mii_mgr_write(esw, 0, 17, 0x0fe0);
127 /* set squelch amplitude to higher threshold */
128 mii_mgr_write(esw, 0, 18, 0x40ba);
129 /* longer TP_IDL tail length */
130 mii_mgr_write(esw, 0, 14, 0x65);
131 /* select local register */
132 mii_mgr_write(esw, 0, 31, 0x8000);
133
134 /* set default vlan */
135 ramips_esw_wr(esw, 0x2001, RT305X_ESW_REG_VLANI(0));
136 ramips_esw_wr(esw, 0x504f, RT305X_ESW_REG_VMSC(0));
137 }
138
139 static int
140 rt305x_esw_probe(struct platform_device *pdev)
141 {
142 struct rt305x_esw_platform_data *pdata;
143 struct rt305x_esw *esw;
144 struct resource *res;
145 int err;
146
147 pdata = pdev->dev.platform_data;
148 if (!pdata)
149 return -EINVAL;
150
151 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
152 if (!res) {
153 dev_err(&pdev->dev, "no memory resource found\n");
154 return -ENOMEM;
155 }
156
157 esw = kzalloc(sizeof(struct rt305x_esw), GFP_KERNEL);
158 if (!esw) {
159 dev_err(&pdev->dev, "no memory for private data\n");
160 return -ENOMEM;
161 }
162
163 esw->base = ioremap(res->start, resource_size(res));
164 if (!esw->base) {
165 dev_err(&pdev->dev, "ioremap failed\n");
166 err = -ENOMEM;
167 goto free_esw;
168 }
169
170 platform_set_drvdata(pdev, esw);
171
172 esw->pdata = pdata;
173 rt305x_esw_hw_init(esw);
174
175 return 0;
176
177 free_esw:
178 kfree(esw);
179 return err;
180 }
181
182 static int
183 rt305x_esw_remove(struct platform_device *pdev)
184 {
185 struct rt305x_esw *esw;
186
187 esw = platform_get_drvdata(pdev);
188 if (esw) {
189 platform_set_drvdata(pdev, NULL);
190 iounmap(esw->base);
191 kfree(esw);
192 }
193
194 return 0;
195 }
196
197 static struct platform_driver rt305x_esw_driver = {
198 .probe = rt305x_esw_probe,
199 .remove = rt305x_esw_remove,
200 .driver = {
201 .name = "rt305x-esw",
202 .owner = THIS_MODULE,
203 },
204 };
205
206 static int __init
207 rt305x_esw_init(void)
208 {
209 return platform_driver_register(&rt305x_esw_driver);
210 }
211
212 static void __exit
213 rt305x_esw_exit(void)
214 {
215 platform_driver_unregister(&rt305x_esw_driver);
216 }