target/linux/ramips/patches-3.14/0056-watchdog-add-MT7621-support.patch

   1 From 6a42dd698ddf91b6e9902b17e21dc13c6ae412ff Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 16 Mar 2014 05:24:42 +0000
   4 Subject: [PATCH 56/57] watchdog: add MT7621 support
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  drivers/watchdog/Kconfig      |    7 ++
   9  drivers/watchdog/Makefile     |    1 +
  10  drivers/watchdog/mt7621_wdt.c |  185 +++++++++++++++++++++++++++++++++++++++++
  11  3 files changed, 193 insertions(+)
  12  create mode 100644 drivers/watchdog/mt7621_wdt.c
  13
  14 diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
  15 index 79d2589..40f4e5d 100644
  16 --- a/drivers/watchdog/Kconfig
  17 +++ b/drivers/watchdog/Kconfig
  18 @@ -1193,6 +1193,13 @@ config RALINK_WDT
  19         help
  20           Hardware driver for the Ralink SoC Watchdog Timer.
  21
  22 +config MT7621_WDT
  23 +       tristate "Mediatek SoC watchdog"
  24 +       select WATCHDOG_CORE
  25 +       depends on SOC_MT7620 || SOC_MT7621
  26 +       help
  27 +         Hardware driver for the Ralink SoC Watchdog Timer.
  28 +
  29  # PARISC Architecture
  30
  31  # POWERPC Architecture
  32 diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
  33 index 985a66c..bbd5d0d 100644
  34 --- a/drivers/watchdog/Makefile
  35 +++ b/drivers/watchdog/Makefile
  36 @@ -138,6 +138,7 @@ obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
  37  octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
  38  obj-$(CONFIG_LANTIQ_WDT) += lantiq_wdt.o
  39  obj-$(CONFIG_RALINK_WDT) += rt2880_wdt.o
  40 +obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
  41
  42  # PARISC Architecture
  43
  44 diff --git a/drivers/watchdog/mt7621_wdt.c b/drivers/watchdog/mt7621_wdt.c
  45 new file mode 100644
  46 index 0000000..29f55c2
  47 --- /dev/null
  48 +++ b/drivers/watchdog/mt7621_wdt.c
  49 @@ -0,0 +1,185 @@
  50 +/*
  51 + * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
  52 + *
  53 + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  54 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  55 + *
  56 + * This driver was based on: drivers/watchdog/softdog.c
  57 + *
  58 + * This program is free software; you can redistribute it and/or modify it
  59 + * under the terms of the GNU General Public License version 2 as published
  60 + * by the Free Software Foundation.
  61 + */
  62 +
  63 +#include <linux/clk.h>
  64 +#include <linux/reset.h>
  65 +#include <linux/module.h>
  66 +#include <linux/kernel.h>
  67 +#include <linux/watchdog.h>
  68 +#include <linux/miscdevice.h>
  69 +#include <linux/moduleparam.h>
  70 +#include <linux/platform_device.h>
  71 +
  72 +#include <asm/mach-ralink/ralink_regs.h>
  73 +
  74 +#define SYSC_RSTSTAT                   0x38
  75 +#define WDT_RST_CAUSE                  BIT(1)
  76 +
  77 +#define RALINK_WDT_TIMEOUT             30
  78 +
  79 +#define TIMER_REG_TMRSTAT              0x00
  80 +#define TIMER_REG_TMR1LOAD             0x24
  81 +#define TIMER_REG_TMR1CTL              0x20
  82 +
  83 +#define TMR1CTL_ENABLE                 BIT(7)
  84 +#define TMR1CTL_RESTART                        BIT(9)
  85 +
  86 +static void __iomem *mt762x_wdt_base;
  87 +
  88 +static bool nowayout = WATCHDOG_NOWAYOUT;
  89 +module_param(nowayout, bool, 0);
  90 +MODULE_PARM_DESC(nowayout,
  91 +               "Watchdog cannot be stopped once started (default="
  92 +               __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  93 +
  94 +static inline void rt_wdt_w32(unsigned reg, u32 val)
  95 +{
  96 +       iowrite32(val, mt762x_wdt_base + reg);
  97 +}
  98 +
  99 +static inline u32 rt_wdt_r32(unsigned reg)
 100 +{
 101 +       return ioread32(mt762x_wdt_base + reg);
 102 +}
 103 +
 104 +static int mt762x_wdt_ping(struct watchdog_device *w)
 105 +{
 106 +       rt_wdt_w32(TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
 107 +
 108 +       return 0;
 109 +}
 110 +
 111 +static int mt762x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
 112 +{
 113 +       w->timeout = t;
 114 +       rt_wdt_w32(TIMER_REG_TMR1LOAD, t * 1000);
 115 +       mt762x_wdt_ping(w);
 116 +
 117 +       return 0;
 118 +}
 119 +
 120 +static int mt762x_wdt_start(struct watchdog_device *w)
 121 +{
 122 +       u32 t;
 123 +
 124 +       rt_wdt_w32(TIMER_REG_TMR1CTL, 1000 << 16);
 125 +       mt762x_wdt_set_timeout(w, w->timeout);
 126 +
 127 +       t = rt_wdt_r32(TIMER_REG_TMR1CTL);
 128 +       t |= TMR1CTL_ENABLE;
 129 +       rt_wdt_w32(TIMER_REG_TMR1CTL, t);
 130 +
 131 +       return 0;
 132 +}
 133 +
 134 +static int mt762x_wdt_stop(struct watchdog_device *w)
 135 +{
 136 +       u32 t;
 137 +
 138 +       mt762x_wdt_ping(w);
 139 +
 140 +       t = rt_wdt_r32(TIMER_REG_TMR1CTL);
 141 +       t &= ~TMR1CTL_ENABLE;
 142 +       rt_wdt_w32(TIMER_REG_TMR1CTL, t);
 143 +
 144 +       return 0;
 145 +}
 146 +
 147 +static int mt762x_wdt_bootcause(void)
 148 +{
 149 +       if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
 150 +               return WDIOF_CARDRESET;
 151 +
 152 +       return 0;
 153 +}
 154 +
 155 +static struct watchdog_info mt762x_wdt_info = {
 156 +       .identity = "Mediatek Watchdog",
 157 +       .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
 158 +};
 159 +
 160 +static struct watchdog_ops mt762x_wdt_ops = {
 161 +       .owner = THIS_MODULE,
 162 +       .start = mt762x_wdt_start,
 163 +       .stop = mt762x_wdt_stop,
 164 +       .ping = mt762x_wdt_ping,
 165 +       .set_timeout = mt762x_wdt_set_timeout,
 166 +};
 167 +
 168 +static struct watchdog_device mt762x_wdt_dev = {
 169 +       .info = &mt762x_wdt_info,
 170 +       .ops = &mt762x_wdt_ops,
 171 +       .min_timeout = 1,
 172 +};
 173 +
 174 +static int mt762x_wdt_probe(struct platform_device *pdev)
 175 +{
 176 +       struct resource *res;
 177 +       int ret;
 178 +
 179 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 180 +       mt762x_wdt_base = devm_request_and_ioremap(&pdev->dev, res);
 181 +       if (IS_ERR(mt762x_wdt_base))
 182 +               return PTR_ERR(mt762x_wdt_base);
 183 +
 184 +       device_reset(&pdev->dev);
 185 +
 186 +       mt762x_wdt_dev.dev = &pdev->dev;
 187 +       mt762x_wdt_dev.bootstatus = mt762x_wdt_bootcause();
 188 +       mt762x_wdt_dev.max_timeout = (0xfffful / 1000);
 189 +       mt762x_wdt_dev.timeout = mt762x_wdt_dev.max_timeout;
 190 +
 191 +       watchdog_set_nowayout(&mt762x_wdt_dev, nowayout);
 192 +
 193 +       ret = watchdog_register_device(&mt762x_wdt_dev);
 194 +       if (!ret)
 195 +               dev_info(&pdev->dev, "Initialized\n");
 196 +
 197 +       return 0;
 198 +}
 199 +
 200 +static int mt762x_wdt_remove(struct platform_device *pdev)
 201 +{
 202 +       watchdog_unregister_device(&mt762x_wdt_dev);
 203 +
 204 +       return 0;
 205 +}
 206 +
 207 +static void mt762x_wdt_shutdown(struct platform_device *pdev)
 208 +{
 209 +       mt762x_wdt_stop(&mt762x_wdt_dev);
 210 +}
 211 +
 212 +static const struct of_device_id mt762x_wdt_match[] = {
 213 +       { .compatible = "mtk,mt7621-wdt" },
 214 +       {},
 215 +};
 216 +MODULE_DEVICE_TABLE(of, mt762x_wdt_match);
 217 +
 218 +static struct platform_driver mt762x_wdt_driver = {
 219 +       .probe          = mt762x_wdt_probe,
 220 +       .remove         = mt762x_wdt_remove,
 221 +       .shutdown       = mt762x_wdt_shutdown,
 222 +       .driver         = {
 223 +               .name           = KBUILD_MODNAME,
 224 +               .owner          = THIS_MODULE,
 225 +               .of_match_table = mt762x_wdt_match,
 226 +       },
 227 +};
 228 +
 229 +module_platform_driver(mt762x_wdt_driver);
 230 +
 231 +MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
 232 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
 233 +MODULE_LICENSE("GPL v2");
 234 +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
 235 --
 236 1.7.10.4
 237