ralink: add 3.18 support
[openwrt/svn-archive/archive.git] / target / linux / ramips / patches-3.18 / 0023-MIPS-ralink-mt7620-fix-usb-issue-during-frequency-sc.patch
1 From 1f1c12e85defba9459b41ec95b86f23b4791f1ab Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 4 Aug 2014 20:43:25 +0200
4 Subject: [PATCH 23/57] MIPS: ralink: mt7620: fix usb issue during frequency
5 scaling
6
7 If the USB HCD is running and the cpu is scaled too low, then the USB stops
8 working. Increase the idle speed of the core to fix this if the kernel is
9 built with USB support.
10
11 The values are taken from the Ralink SDK Kernel.
12
13 Signed-off-by: John Crispin <blogic@openwrt.org>
14 ---
15 arch/mips/ralink/mt7620.c | 19 +++++++++++++++++++
16 1 file changed, 19 insertions(+)
17
18 --- a/arch/mips/ralink/mt7620.c
19 +++ b/arch/mips/ralink/mt7620.c
20 @@ -36,6 +36,12 @@
21 #define PMU1_CFG 0x8C
22 #define DIG_SW_SEL BIT(25)
23
24 +/* clock scaling */
25 +#define CLKCFG_FDIV_MASK 0x1f00
26 +#define CLKCFG_FDIV_USB_VAL 0x0300
27 +#define CLKCFG_FFRAC_MASK 0x001f
28 +#define CLKCFG_FFRAC_USB_VAL 0x0003
29 +
30 /* does the board have sdram or ddram */
31 static int dram_type;
32
33 @@ -337,6 +343,19 @@ void __init ralink_clk_init(void)
34 ralink_clk_add("10000b00.spi", sys_rate);
35 ralink_clk_add("10000c00.uartlite", periph_rate);
36 ralink_clk_add("10180000.wmac", xtal_rate);
37 +
38 + if (IS_ENABLED(CONFIG_USB)) {
39 + /*
40 + * When the CPU goes into sleep mode, the BUS clock will be too low for
41 + * USB to function properly
42 + */
43 + u32 val = rt_sysc_r32(SYSC_REG_CPU_SYS_CLKCFG);
44 +
45 + val &= ~(CLKCFG_FDIV_MASK | CLKCFG_FFRAC_MASK);
46 + val |= CLKCFG_FDIV_USB_VAL | CLKCFG_FFRAC_USB_VAL;
47 +
48 + rt_sysc_w32(val, SYSC_REG_CPU_SYS_CLKCFG);
49 + }
50 }
51
52 void __init ralink_of_remap(void)