target/linux/ramips/patches-3.18/0055-asoc-add-mt7620-support.patch

   1 From 241188942603dc73f62cf2553c53cae2235c9957 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 27 Jul 2014 09:31:47 +0100
   4 Subject: [PATCH 55/57] asoc: add mt7620 support
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/ralink/of.c            |    2 +
   9  sound/soc/Kconfig                |    1 +
  10  sound/soc/Makefile               |    1 +
  11  sound/soc/ralink/Kconfig         |   15 ++
  12  sound/soc/ralink/Makefile        |   11 +
  13  sound/soc/ralink/mt7620-i2s.c    |  466 ++++++++++++++++++++++++++++++++++++++
  14  sound/soc/ralink/mt7620-wm8960.c |  125 ++++++++++
  15  sound/soc/soc-io.c               |   10 -
  16  8 files changed, 621 insertions(+), 10 deletions(-)
  17  create mode 100644 sound/soc/ralink/Kconfig
  18  create mode 100644 sound/soc/ralink/Makefile
  19  create mode 100644 sound/soc/ralink/mt7620-i2s.c
  20  create mode 100644 sound/soc/ralink/mt7620-wm8960.c
  21
  22 --- a/arch/mips/ralink/of.c
  23 +++ b/arch/mips/ralink/of.c
  24 @@ -15,6 +15,7 @@
  25  #include <linux/of_fdt.h>
  26  #include <linux/kernel.h>
  27  #include <linux/bootmem.h>
  28 +#include <linux/module.h>
  29  #include <linux/of_platform.h>
  30  #include <linux/of_address.h>
  31
  32 @@ -26,6 +27,7 @@
  33  #include "common.h"
  34
  35  __iomem void *rt_sysc_membase;
  36 +EXPORT_SYMBOL(rt_sysc_membase);
  37  __iomem void *rt_memc_membase;
  38
  39  __iomem void *plat_of_remap_node(const char *node)
  40 --- a/sound/soc/Kconfig
  41 +++ b/sound/soc/Kconfig
  42 @@ -48,6 +48,7 @@ source "sound/soc/intel/Kconfig"
  43  source "sound/soc/mxs/Kconfig"
  44  source "sound/soc/pxa/Kconfig"
  45  source "sound/soc/rockchip/Kconfig"
  46 +source "sound/soc/ralink/Kconfig"
  47  source "sound/soc/samsung/Kconfig"
  48  source "sound/soc/sh/Kconfig"
  49  source "sound/soc/sirf/Kconfig"
  50 --- a/sound/soc/Makefile
  51 +++ b/sound/soc/Makefile
  52 @@ -25,6 +25,7 @@ obj-$(CONFIG_SND_SOC) += omap/
  53  obj-$(CONFIG_SND_SOC)  += kirkwood/
  54  obj-$(CONFIG_SND_SOC)  += pxa/
  55  obj-$(CONFIG_SND_SOC)  += rockchip/
  56 +obj-$(CONFIG_SND_SOC)  += ralink/
  57  obj-$(CONFIG_SND_SOC)  += samsung/
  58  obj-$(CONFIG_SND_SOC)  += sh/
  59  obj-$(CONFIG_SND_SOC)  += sirf/
  60 --- /dev/null
  61 +++ b/sound/soc/ralink/Kconfig
  62 @@ -0,0 +1,15 @@
  63 +config SND_MT7620_SOC_I2S
  64 +       depends on SOC_MT7620 && SND_SOC
  65 +       select SND_SOC_GENERIC_DMAENGINE_PCM
  66 +       tristate "SoC Audio (I2S protocol) for Ralink MT7620 SoC"
  67 +       help
  68 +         Say Y if you want to use I2S protocol and I2S codec on Ingenic MT7620
  69 +         based boards.
  70 +
  71 +config SND_MT7620_SOC_WM8960
  72 +       tristate "SoC Audio support for Ralink WM8960"
  73 +       select SND_MT7620_SOC_I2S
  74 +       select SND_SOC_WM8960
  75 +       help
  76 +         Say Y if you want to add support for ASoC audio on the Qi LB60 board
  77 +         a.k.a Qi Ben NanoNote.
  78 --- /dev/null
  79 +++ b/sound/soc/ralink/Makefile
  80 @@ -0,0 +1,11 @@
  81 +#
  82 +# Jz4740 Platform Support
  83 +#
  84 +snd-soc-mt7620-i2s-objs := mt7620-i2s.o
  85 +
  86 +obj-$(CONFIG_SND_MT7620_SOC_I2S) += snd-soc-mt7620-i2s.o
  87 +
  88 +# Jz4740 Machine Support
  89 +snd-soc-mt7620-wm8960-objs := mt7620-wm8960.o
  90 +
  91 +obj-$(CONFIG_SND_MT7620_SOC_WM8960) += snd-soc-mt7620-wm8960.o
  92 --- /dev/null
  93 +++ b/sound/soc/ralink/mt7620-i2s.c
  94 @@ -0,0 +1,436 @@
  95 +/*
  96 + *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
  97 + *
  98 + *  This program is free software; you can redistribute it and/or modify it
  99 + *  under  the terms of the GNU General  Public License as published by the
 100 + *  Free Software Foundation;  either version 2 of the License, or (at your
 101 + *  option) any later version.
 102 + *
 103 + *  You should have received a copy of the GNU General Public License along
 104 + *  with this program; if not, write to the Free Software Foundation, Inc.,
 105 + *  675 Mass Ave, Cambridge, MA 02139, USA.
 106 + *
 107 + */
 108 +
 109 +#include <linux/init.h>
 110 +#include <linux/io.h>
 111 +#include <linux/kernel.h>
 112 +#include <linux/module.h>
 113 +#include <linux/platform_device.h>
 114 +#include <linux/slab.h>
 115 +
 116 +#include <linux/delay.h>
 117 +
 118 +#include <linux/dma-mapping.h>
 119 +
 120 +#include <sound/core.h>
 121 +#include <sound/pcm.h>
 122 +#include <sound/pcm_params.h>
 123 +#include <sound/soc.h>
 124 +#include <sound/initval.h>
 125 +#include <sound/dmaengine_pcm.h>
 126 +
 127 +#include <ralink_regs.h>
 128 +
 129 +#define I2S_REG_CFG0           0x00
 130 +#define I2S_REG_CFG0_EN                BIT(31)
 131 +#define I2S_REG_CFG0_DMA_EN    BIT(30)
 132 +#define I2S_REG_CFG0_BYTE_SWAP BIT(28)
 133 +#define I2S_REG_CFG0_TX_EN     BIT(24)
 134 +#define I2S_REG_CFG0_RX_EN     BIT(20)
 135 +#define I2S_REG_CFG0_SLAVE     BIT(16)
 136 +#define I2S_REG_CFG0_RX_THRES  12
 137 +#define I2S_REG_CFG0_TX_THRES  4
 138 +#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \
 139 +                                       (4 << I2S_REG_CFG0_TX_THRES)
 140 +
 141 +#define I2S_REG_INT_STATUS     0x04
 142 +#define I2S_REG_INT_EN         0x08
 143 +#define I2S_REG_FF_STATUS      0x0c
 144 +#define I2S_REG_WREG           0x10
 145 +#define I2S_REG_RREG           0x14
 146 +#define I2S_REG_CFG1           0x18
 147 +
 148 +#define I2S_REG_DIVCMP         0x20
 149 +#define I2S_REG_DIVINT         0x24
 150 +#define I2S_REG_CLK_EN         BIT(31)
 151 +
 152 +struct mt7620_i2s {
 153 +       struct resource *mem;
 154 +       void __iomem *base;
 155 +       dma_addr_t phys_base;
 156 +
 157 +       struct snd_dmaengine_dai_dma_data playback_dma_data;
 158 +       struct snd_dmaengine_dai_dma_data capture_dma_data;
 159 +};
 160 +
 161 +static inline uint32_t mt7620_i2s_read(const struct mt7620_i2s *i2s,
 162 +       unsigned int reg)
 163 +{
 164 +       return readl(i2s->base + reg);
 165 +}
 166 +
 167 +static inline void mt7620_i2s_write(const struct mt7620_i2s *i2s,
 168 +       unsigned int reg, uint32_t value)
 169 +{
 170 +       //printk("i2s --> %p = 0x%08X\n", i2s->base + reg, value);
 171 +       writel(value, i2s->base + reg);
 172 +}
 173 +
 174 +static int mt7620_i2s_startup(struct snd_pcm_substream *substream,
 175 +       struct snd_soc_dai *dai)
 176 +{
 177 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 178 +       uint32_t cfg;
 179 +
 180 +       if (dai->active)
 181 +               return 0;
 182 +
 183 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 184 +       cfg |= I2S_REG_CFG0_EN;
 185 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 186 +
 187 +       return 0;
 188 +}
 189 +
 190 +static void mt7620_i2s_shutdown(struct snd_pcm_substream *substream,
 191 +       struct snd_soc_dai *dai)
 192 +{
 193 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 194 +       uint32_t cfg;
 195 +
 196 +       if (dai->active)
 197 +               return;
 198 +
 199 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 200 +       cfg &= ~I2S_REG_CFG0_EN;
 201 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 202 +}
 203 +
 204 +static int mt7620_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 205 +       struct snd_soc_dai *dai)
 206 +{
 207 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 208 +
 209 +       uint32_t cfg;
 210 +       uint32_t mask;
 211 +
 212 +       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 213 +               mask = I2S_REG_CFG0_TX_EN;
 214 +       else
 215 +               mask = I2S_REG_CFG0_RX_EN;
 216 +
 217 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 218 +
 219 +       switch (cmd) {
 220 +       case SNDRV_PCM_TRIGGER_START:
 221 +       case SNDRV_PCM_TRIGGER_RESUME:
 222 +       case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 223 +               cfg |= mask;
 224 +               break;
 225 +       case SNDRV_PCM_TRIGGER_STOP:
 226 +       case SNDRV_PCM_TRIGGER_SUSPEND:
 227 +       case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 228 +               cfg &= ~mask;
 229 +               break;
 230 +       default:
 231 +               return -EINVAL;
 232 +       }
 233 +
 234 +       if (cfg & (I2S_REG_CFG0_TX_EN | I2S_REG_CFG0_RX_EN))
 235 +               cfg |= I2S_REG_CFG0_DMA_EN;
 236 +       else
 237 +               cfg &= ~I2S_REG_CFG0_DMA_EN;
 238 +
 239 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 240 +
 241 +       return 0;
 242 +}
 243 +
 244 +static int mt7620_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 245 +{
 246 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 247 +       uint32_t cfg;
 248 +
 249 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 250 +
 251 +       switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 252 +       case SND_SOC_DAIFMT_CBS_CFS:
 253 +               cfg |= I2S_REG_CFG0_SLAVE;
 254 +               break;
 255 +       case SND_SOC_DAIFMT_CBM_CFM:
 256 +               cfg &= ~I2S_REG_CFG0_SLAVE;
 257 +               break;
 258 +       case SND_SOC_DAIFMT_CBM_CFS:
 259 +       default:
 260 +               return -EINVAL;
 261 +       }
 262 +
 263 +       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 264 +       case SND_SOC_DAIFMT_I2S:
 265 +       case SND_SOC_DAIFMT_MSB:
 266 +               cfg &= ~I2S_REG_CFG0_BYTE_SWAP;
 267 +               break;
 268 +       case SND_SOC_DAIFMT_LSB:
 269 +               cfg |= I2S_REG_CFG0_BYTE_SWAP;
 270 +               break;
 271 +       default:
 272 +               return -EINVAL;
 273 +       }
 274 +
 275 +       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 276 +       case SND_SOC_DAIFMT_NB_NF:
 277 +               break;
 278 +       default:
 279 +               return -EINVAL;
 280 +       }
 281 +
 282 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 283 +
 284 +       return 0;
 285 +}
 286 +
 287 +static int mt7620_i2s_hw_params(struct snd_pcm_substream *substream,
 288 +       struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 289 +{
 290 +
 291 +       return 0;
 292 +}
 293 +
 294 +unsigned long i2sMaster_inclk_int[11] = {
 295 +       78,     56,     52,     39,     28,     26,     19,     14,     13,     9,      6};
 296 +unsigned long i2sMaster_inclk_comp[11] = {
 297 +       64,     352,    42,     32,     176,    21,     272,    88,     10,     455,    261};
 298 +
 299 +
 300 +static int mt7620_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
 301 +       unsigned int freq, int dir)
 302 +{
 303 +        struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 304 +
 305 +       printk("Internal REFCLK with fractional division\n");
 306 +
 307 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 308 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 309 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 310 +
 311 +/*     struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 312 +       struct clk *parent;
 313 +       int ret = 0;
 314 +
 315 +       switch (clk_id) {
 316 +       case JZ4740_I2S_CLKSRC_EXT:
 317 +               parent = clk_get(NULL, "ext");
 318 +               clk_set_parent(i2s->clk_i2s, parent);
 319 +               break;
 320 +       case JZ4740_I2S_CLKSRC_PLL:
 321 +               parent = clk_get(NULL, "pll half");
 322 +               clk_set_parent(i2s->clk_i2s, parent);
 323 +               ret = clk_set_rate(i2s->clk_i2s, freq);
 324 +               break;
 325 +       default:
 326 +               return -EINVAL;
 327 +       }
 328 +       clk_put(parent);
 329 +
 330 +       return ret;*/
 331 +       return 0;
 332 +}
 333 +
 334 +static void mt7620_i2c_init_pcm_config(struct mt7620_i2s *i2s)
 335 +{
 336 +       struct snd_dmaengine_dai_dma_data *dma_data;
 337 +
 338 +       /* Playback */
 339 +       dma_data = &i2s->playback_dma_data;
 340 +       dma_data->maxburst = 16;
 341 +       dma_data->slave_id = 2; //JZ4740_DMA_TYPE_AIC_TRANSMIT;
 342 +       dma_data->addr = i2s->phys_base + I2S_REG_WREG;
 343 +
 344 +       /* Capture */
 345 +       dma_data = &i2s->capture_dma_data;
 346 +       dma_data->maxburst = 16;
 347 +       dma_data->slave_id = 3; //JZ4740_DMA_TYPE_AIC_RECEIVE;
 348 +       dma_data->addr = i2s->phys_base + I2S_REG_RREG;
 349 +}
 350 +
 351 +static int mt7620_i2s_dai_probe(struct snd_soc_dai *dai)
 352 +{
 353 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 354 +       uint32_t data;
 355 +
 356 +       mt7620_i2c_init_pcm_config(i2s);
 357 +       dai->playback_dma_data = &i2s->playback_dma_data;
 358 +       dai->capture_dma_data = &i2s->capture_dma_data;
 359 +
 360 +       /* set share pins to i2s/gpio mode and i2c mode */
 361 +       data = rt_sysc_r32(0x60);
 362 +       data &= 0xFFFFFFE2;
 363 +       data |= 0x00000018;
 364 +       rt_sysc_w32(data, 0x60);
 365 +
 366 +       printk("Internal REFCLK with fractional division\n");
 367 +
 368 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, I2S_REG_CFG0_DFT_THRES);
 369 +       mt7620_i2s_write(i2s, I2S_REG_CFG1, 0);
 370 +       mt7620_i2s_write(i2s, I2S_REG_INT_EN, 0);
 371 +
 372 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 373 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 374 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 375 +
 376 +       return 0;
 377 +}
 378 +
 379 +static int mt7620_i2s_dai_remove(struct snd_soc_dai *dai)
 380 +{
 381 +       return 0;
 382 +}
 383 +
 384 +static const struct snd_soc_dai_ops mt7620_i2s_dai_ops = {
 385 +       .startup = mt7620_i2s_startup,
 386 +       .shutdown = mt7620_i2s_shutdown,
 387 +       .trigger = mt7620_i2s_trigger,
 388 +       .hw_params = mt7620_i2s_hw_params,
 389 +       .set_fmt = mt7620_i2s_set_fmt,
 390 +       .set_sysclk = mt7620_i2s_set_sysclk,
 391 +};
 392 +
 393 +#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
 394 +                        SNDRV_PCM_FMTBIT_S24_LE)
 395 +
 396 +static struct snd_soc_dai_driver mt7620_i2s_dai = {
 397 +       .probe = mt7620_i2s_dai_probe,
 398 +       .remove = mt7620_i2s_dai_remove,
 399 +       .playback = {
 400 +               .channels_min = 1,
 401 +               .channels_max = 2,
 402 +               .rates = SNDRV_PCM_RATE_8000_48000,
 403 +               .formats = JZ4740_I2S_FMTS,
 404 +       },
 405 +       .capture = {
 406 +               .channels_min = 2,
 407 +               .channels_max = 2,
 408 +               .rates = SNDRV_PCM_RATE_8000_48000,
 409 +               .formats = JZ4740_I2S_FMTS,
 410 +       },
 411 +       .symmetric_rates = 1,
 412 +       .ops = &mt7620_i2s_dai_ops,
 413 +};
 414 +
 415 +static const struct snd_pcm_hardware mt7620_pcm_hardware = {
 416 +       .info = SNDRV_PCM_INFO_MMAP |
 417 +               SNDRV_PCM_INFO_MMAP_VALID |
 418 +               SNDRV_PCM_INFO_INTERLEAVED |
 419 +               SNDRV_PCM_INFO_BLOCK_TRANSFER,
 420 +       .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
 421 +       .period_bytes_min       = PAGE_SIZE,
 422 +       .period_bytes_max       = 64 * 1024,
 423 +       .periods_min            = 2,
 424 +       .periods_max            = 128,
 425 +       .buffer_bytes_max       = 128 * 1024,
 426 +       .fifo_size              = 32,
 427 +};
 428 +
 429 +static const struct snd_dmaengine_pcm_config mt7620_dmaengine_pcm_config = {
 430 +       .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
 431 +       .pcm_hardware = &mt7620_pcm_hardware,
 432 +       .prealloc_buffer_size = 256 * PAGE_SIZE,
 433 +};
 434 +
 435 +static const struct snd_soc_component_driver mt7620_i2s_component = {
 436 +       .name = "mt7620-i2s",
 437 +};
 438 +
 439 +static int mt7620_i2s_dev_probe(struct platform_device *pdev)
 440 +{
 441 +       struct mt7620_i2s *i2s;
 442 +       int ret;
 443 +
 444 +       snd_dmaengine_pcm_register(&pdev->dev,
 445 +               &mt7620_dmaengine_pcm_config,
 446 +               SND_DMAENGINE_PCM_FLAG_COMPAT);
 447 +
 448 +       i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
 449 +       if (!i2s)
 450 +               return -ENOMEM;
 451 +
 452 +       i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 453 +       if (!i2s->mem) {
 454 +               ret = -ENOENT;
 455 +               goto err_free;
 456 +       }
 457 +
 458 +       i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
 459 +                               pdev->name);
 460 +       if (!i2s->mem) {
 461 +               ret = -EBUSY;
 462 +               goto err_free;
 463 +       }
 464 +
 465 +       i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
 466 +       if (!i2s->base) {
 467 +               ret = -EBUSY;
 468 +               goto err_release_mem_region;
 469 +       }
 470 +
 471 +       i2s->phys_base = i2s->mem->start;
 472 +
 473 +       platform_set_drvdata(pdev, i2s);
 474 +       ret = snd_soc_register_component(&pdev->dev, &mt7620_i2s_component,
 475 +                                        &mt7620_i2s_dai, 1);
 476 +
 477 +       if (!ret) {
 478 +               dev_err(&pdev->dev, "loaded\n");
 479 +               return ret;
 480 +       }
 481 +
 482 +       dev_err(&pdev->dev, "Failed to register DAI\n");
 483 +       iounmap(i2s->base);
 484 +
 485 +err_release_mem_region:
 486 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 487 +err_free:
 488 +       kfree(i2s);
 489 +
 490 +       return ret;
 491 +}
 492 +
 493 +static int mt7620_i2s_dev_remove(struct platform_device *pdev)
 494 +{
 495 +       struct mt7620_i2s *i2s = platform_get_drvdata(pdev);
 496 +
 497 +       snd_soc_unregister_component(&pdev->dev);
 498 +
 499 +       iounmap(i2s->base);
 500 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 501 +
 502 +       kfree(i2s);
 503 +
 504 +       snd_dmaengine_pcm_unregister(&pdev->dev);
 505 +
 506 +       return 0;
 507 +}
 508 +
 509 +static const struct of_device_id mt7620_i2s_match[] = {
 510 +       { .compatible = "ralink,mt7620a-i2s" },
 511 +       {},
 512 +};
 513 +MODULE_DEVICE_TABLE(of, mt7620_i2s_match);
 514 +
 515 +static struct platform_driver mt7620_i2s_driver = {
 516 +       .probe = mt7620_i2s_dev_probe,
 517 +       .remove = mt7620_i2s_dev_remove,
 518 +       .driver = {
 519 +               .name = "mt7620-i2s",
 520 +               .owner = THIS_MODULE,
 521 +               .of_match_table = mt7620_i2s_match,
 522 +       },
 523 +};
 524 +
 525 +module_platform_driver(mt7620_i2s_driver);
 526 +
 527 +MODULE_AUTHOR("Lars-Peter Clausen, <lars@metafoo.de>");
 528 +MODULE_DESCRIPTION("Ingenic JZ4740 SoC I2S driver");
 529 +MODULE_LICENSE("GPL");
 530 +MODULE_ALIAS("platform:mt7620-i2s");
 531 --- /dev/null
 532 +++ b/sound/soc/ralink/mt7620-wm8960.c
 533 @@ -0,0 +1,233 @@
 534 +/*
 535 + * Copyright 2013 Freescale Semiconductor, Inc.
 536 + *
 537 + * Based on mt7620-sgtl5000.c
 538 + * Copyright 2012 Freescale Semiconductor, Inc.
 539 + * Copyright 2012 Linaro Ltd.
 540 + *
 541 + * The code contained herein is licensed under the GNU General Public
 542 + * License. You may obtain a copy of the GNU General Public License
 543 + * Version 2 or later at the following locations:
 544 + *
 545 + * http://www.opensource.org/licenses/gpl-license.html
 546 + * http://www.gnu.org/copyleft/gpl.html
 547 + */
 548 +
 549 +#include <linux/module.h>
 550 +#include <linux/of_platform.h>
 551 +#include <linux/i2c.h>
 552 +#include <linux/slab.h>
 553 +#include <sound/soc.h>
 554 +#include <sound/pcm_params.h>
 555 +#include <sound/soc-dapm.h>
 556 +#include <linux/pinctrl/consumer.h>
 557 +
 558 +#include "../codecs/wm8960.h"
 559 +
 560 +#define DAI_NAME_SIZE  32
 561 +
 562 +struct mt7620_wm8960_data {
 563 +       struct snd_soc_dai_link dai;
 564 +       struct snd_soc_card card;
 565 +       char codec_dai_name[DAI_NAME_SIZE];
 566 +       char platform_name[DAI_NAME_SIZE];
 567 +       unsigned int clk_frequency;
 568 +};
 569 +
 570 +struct mt7620_priv {
 571 +       struct platform_device *pdev;
 572 +};
 573 +static struct mt7620_priv card_priv;
 574 +
 575 +static const struct snd_soc_dapm_widget mt7620_wm8960_dapm_widgets[] = {
 576 +       SND_SOC_DAPM_HP("Headphone Jack", NULL),
 577 +       SND_SOC_DAPM_SPK("Ext Spk", NULL),
 578 +       SND_SOC_DAPM_MIC("AMIC", NULL),
 579 +       SND_SOC_DAPM_MIC("DMIC", NULL),
 580 +};
 581 +
 582 +static int sample_rate = 44100;
 583 +static snd_pcm_format_t sample_format = SNDRV_PCM_FORMAT_S16_LE;
 584 +
 585 +static int mt7620_hifi_hw_params(struct snd_pcm_substream *substream,
 586 +               struct snd_pcm_hw_params *params)
 587 +{
 588 +       sample_rate = params_rate(params);
 589 +       sample_format = params_format(params);
 590 +
 591 +       return 0;
 592 +}
 593 +
 594 +static struct snd_soc_ops mt7620_hifi_ops = {
 595 +       .hw_params = mt7620_hifi_hw_params,
 596 +};
 597 +
 598 +static int mt7620_wm8960_set_bias_level(struct snd_soc_card *card,
 599 +                                       struct snd_soc_dapm_context *dapm,
 600 +                                       enum snd_soc_bias_level level)
 601 +{
 602 +       struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
 603 +       struct mt7620_priv *priv = &card_priv;
 604 +       struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
 605 +       struct device *dev = &priv->pdev->dev;
 606 +       int ret;
 607 +
 608 +       if (dapm->dev != codec_dai->dev)
 609 +               return 0;
 610 +
 611 +       switch (level) {
 612 +       case SND_SOC_BIAS_PREPARE:
 613 +               if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
 614 +               }
 615 +               break;
 616 +
 617 +       case SND_SOC_BIAS_STANDBY:
 618 +               if (dapm->bias_level == SND_SOC_BIAS_PREPARE) {
 619 +                       ret = snd_soc_dai_set_sysclk(codec_dai,
 620 +                                       WM8960_SYSCLK_MCLK, data->clk_frequency,
 621 +                                       SND_SOC_CLOCK_IN);
 622 +                       if (ret < 0) {
 623 +                               dev_err(dev,
 624 +                                       "failed to switch away from FLL: %d\n",
 625 +                                       ret);
 626 +                               return ret;
 627 +                       }
 628 +               }
 629 +               break;
 630 +
 631 +       default:
 632 +               break;
 633 +       }
 634 +
 635 +       return 0;
 636 +}
 637 +
 638 +static int mt7620_wm8960_late_probe(struct snd_soc_card *card)
 639 +{
 640 +       struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
 641 +       struct mt7620_priv *priv = &card_priv;
 642 +       struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
 643 +       struct device *dev = &priv->pdev->dev;
 644 +       int ret;
 645 +
 646 +       ret = snd_soc_dai_set_sysclk(codec_dai, WM8960_SYSCLK_MCLK,
 647 +                       data->clk_frequency, SND_SOC_CLOCK_IN);
 648 +       if (ret < 0)
 649 +               dev_err(dev, "failed to set sysclk in %s\n", __func__);
 650 +
 651 +       return ret;
 652 +}
 653 +
 654 +static int mt7620_wm8960_probe(struct platform_device *pdev)
 655 +{
 656 +       struct device_node *i2s_np, *codec_np;
 657 +       struct platform_device *i2s_pdev;
 658 +       struct mt7620_priv *priv = &card_priv;
 659 +       struct i2c_client *codec_dev;
 660 +       struct mt7620_wm8960_data *data;
 661 +       int ret;
 662 +
 663 +       priv->pdev = pdev;
 664 +
 665 +       i2s_np = of_parse_phandle(pdev->dev.of_node, "i2s-controller", 0);
 666 +       codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0);
 667 +       if (!i2s_np || !codec_np) {
 668 +               dev_err(&pdev->dev, "phandle missing or invalid\n");
 669 +               ret = -EINVAL;
 670 +               goto fail;
 671 +       }
 672 +
 673 +       i2s_pdev = of_find_device_by_node(i2s_np);
 674 +       if (!i2s_pdev) {
 675 +               dev_err(&pdev->dev, "failed to find SSI platform device\n");
 676 +               ret = -EINVAL;
 677 +               goto fail;
 678 +       }
 679 +       codec_dev = of_find_i2c_device_by_node(codec_np);
 680 +       if (!codec_dev || !codec_dev->dev.driver) {
 681 +               dev_err(&pdev->dev, "failed to find codec platform device\n");
 682 +               ret = -EINVAL;
 683 +               goto fail;
 684 +       }
 685 +
 686 +       data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 687 +       if (!data) {
 688 +               ret = -ENOMEM;
 689 +               goto fail;
 690 +       }
 691 +
 692 +       data->clk_frequency = 12000000;
 693 +       data->dai.name = "HiFi";
 694 +       data->dai.stream_name = "HiFi";
 695 +       data->dai.codec_dai_name = "wm8960-hifi";
 696 +       data->dai.codec_of_node = codec_np;
 697 +       data->dai.cpu_dai_name = dev_name(&i2s_pdev->dev);
 698 +       data->dai.platform_of_node = i2s_np;
 699 +       data->dai.ops = &mt7620_hifi_ops;
 700 +       data->dai.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
 701 +                           SND_SOC_DAIFMT_CBM_CFM;
 702 +
 703 +       data->card.dev = &pdev->dev;
 704 +       ret = snd_soc_of_parse_card_name(&data->card, "model");
 705 +       if (ret)
 706 +               goto fail;
 707 +       ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing");
 708 +       if (ret)
 709 +               goto fail;
 710 +       data->card.num_links = 1;
 711 +       data->card.dai_link = &data->dai;
 712 +       data->card.dapm_widgets = mt7620_wm8960_dapm_widgets;
 713 +       data->card.num_dapm_widgets = ARRAY_SIZE(mt7620_wm8960_dapm_widgets);
 714 +
 715 +       data->card.late_probe = mt7620_wm8960_late_probe;
 716 +       data->card.set_bias_level = mt7620_wm8960_set_bias_level;
 717 +
 718 +       platform_set_drvdata(pdev, &data->card);
 719 +       snd_soc_card_set_drvdata(&data->card, data);
 720 +
 721 +       ret = devm_snd_soc_register_card(&pdev->dev, &data->card);
 722 +       if (ret) {
 723 +               dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
 724 +               goto fail;
 725 +       }
 726 +
 727 +       of_node_put(i2s_np);
 728 +       of_node_put(codec_np);
 729 +
 730 +       return 0;
 731 +fail:
 732 +       if (i2s_np)
 733 +               of_node_put(i2s_np);
 734 +       if (codec_np)
 735 +               of_node_put(codec_np);
 736 +
 737 +       return ret;
 738 +}
 739 +
 740 +static int mt7620_wm8960_remove(struct platform_device *pdev)
 741 +{
 742 +       return 0;
 743 +}
 744 +
 745 +static const struct of_device_id mt7620_wm8960_dt_ids[] = {
 746 +       { .compatible = "mediatek,mt7620-audio-wm8960", },
 747 +       { /* sentinel */ }
 748 +};
 749 +MODULE_DEVICE_TABLE(of, mt7620_wm8960_dt_ids);
 750 +
 751 +static struct platform_driver mt7620_wm8960_driver = {
 752 +       .driver = {
 753 +               .name = "mt7620-wm8960",
 754 +               .owner = THIS_MODULE,
 755 +               .pm = &snd_soc_pm_ops,
 756 +               .of_match_table = mt7620_wm8960_dt_ids,
 757 +       },
 758 +       .probe = mt7620_wm8960_probe,
 759 +       .remove = mt7620_wm8960_remove,
 760 +};
 761 +module_platform_driver(mt7620_wm8960_driver);
 762 +
 763 +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 764 +MODULE_DESCRIPTION("Freescale i.MX WM8962 ASoC machine driver");
 765 +MODULE_LICENSE("GPL v2");
 766 +MODULE_ALIAS("platform:mt7620-wm8962");