target/linux/ramips/patches-3.8/0130-MIPS-ralink-add-cpu-feature-overrides.h-for-RT3662-3.patch

   1 From 4cca623b74420aacf656b968fde29aace96ae3db Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Sun, 7 Apr 2013 16:57:30 +0200
   4 Subject: [PATCH 3/3] MIPS: ralink: add cpu-feature-overrides.h for
   5  RT3662/3883 SoCs
   6
   7 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
   8 ---
   9  .../asm/mach-ralink/rt3883/cpu-feature-overrides.h |   55 ++++++++++++++++++++
  10  arch/mips/ralink/Platform                          |    1 +
  11  2 files changed, 56 insertions(+)
  12  create mode 100644 arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
  13
  14 --- /dev/null
  15 +++ b/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
  16 @@ -0,0 +1,55 @@
  17 +/*
  18 + * Ralink RT3662/RT3883 specific CPU feature overrides
  19 + *
  20 + * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
  21 + *
  22 + * This file was derived from: include/asm-mips/cpu-features.h
  23 + *     Copyright (C) 2003, 2004 Ralf Baechle
  24 + *     Copyright (C) 2004 Maciej W. Rozycki
  25 + *
  26 + * This program is free software; you can redistribute it and/or modify it
  27 + * under the terms of the GNU General Public License version 2 as published
  28 + * by the Free Software Foundation.
  29 + *
  30 + */
  31 +#ifndef _RT3883_CPU_FEATURE_OVERRIDES_H
  32 +#define _RT3883_CPU_FEATURE_OVERRIDES_H
  33 +
  34 +#define cpu_has_tlb            1
  35 +#define cpu_has_4kex           1
  36 +#define cpu_has_3k_cache       0
  37 +#define cpu_has_4k_cache       1
  38 +#define cpu_has_tx39_cache     0
  39 +#define cpu_has_sb1_cache      0
  40 +#define cpu_has_fpu            0
  41 +#define cpu_has_32fpr          0
  42 +#define cpu_has_counter                1
  43 +#define cpu_has_watch          1
  44 +#define cpu_has_divec          1
  45 +
  46 +#define cpu_has_prefetch       1
  47 +#define cpu_has_ejtag          1
  48 +#define cpu_has_llsc           1
  49 +
  50 +#define cpu_has_mips16         1
  51 +#define cpu_has_mdmx           0
  52 +#define cpu_has_mips3d         0
  53 +#define cpu_has_smartmips      0
  54 +
  55 +#define cpu_has_mips32r1       1
  56 +#define cpu_has_mips32r2       1
  57 +#define cpu_has_mips64r1       0
  58 +#define cpu_has_mips64r2       0
  59 +
  60 +#define cpu_has_dsp            1
  61 +#define cpu_has_mipsmt         0
  62 +
  63 +#define cpu_has_64bits         0
  64 +#define cpu_has_64bit_zero_reg 0
  65 +#define cpu_has_64bit_gp_regs  0
  66 +#define cpu_has_64bit_addresses        0
  67 +
  68 +#define cpu_dcache_line_size() 32
  69 +#define cpu_icache_line_size() 32
  70 +
  71 +#endif /* _RT3883_CPU_FEATURE_OVERRIDES_H */
  72 --- a/arch/mips/ralink/Platform
  73 +++ b/arch/mips/ralink/Platform
  74 @@ -20,6 +20,7 @@ cflags-$(CONFIG_SOC_RT305X)   += -I$(srctr
  75  # Ralink RT3883
  76  #
  77  load-$(CONFIG_SOC_RT3883)      += 0xffffffff80000000
  78 +cflags-$(CONFIG_SOC_RT3883)    += -I$(srctree)/arch/mips/include/asm/mach-ralink/rt3883
  79
  80  #
  81  # Ralink MT7620