42952f1ea9ed464c22e82f19e5f4ba172400f1a1
[openwrt/svn-archive/archive.git] / target / linux / ramips / patches-3.9 / 0153-i2c-MIPS-adds-ralink-I2C-driver.patch
1 From e5a800fb1dc440ee1e4ca656b2ed3f6e2debecca Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 29 Apr 2013 14:40:43 +0200
4 Subject: [PATCH 153/164] i2c: MIPS: adds ralink I2C driver
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 .../devicetree/bindings/i2c/i2c-ralink.txt | 27 ++
9 drivers/i2c/busses/Kconfig | 4 +
10 drivers/i2c/busses/Makefile | 1 +
11 drivers/i2c/busses/i2c-ralink.c | 274 ++++++++++++++++++++
12 4 files changed, 306 insertions(+)
13 create mode 100644 Documentation/devicetree/bindings/i2c/i2c-ralink.txt
14 create mode 100644 drivers/i2c/busses/i2c-ralink.c
15
16 diff --git a/Documentation/devicetree/bindings/i2c/i2c-ralink.txt b/Documentation/devicetree/bindings/i2c/i2c-ralink.txt
17 new file mode 100644
18 index 0000000..8fa8ac3
19 --- /dev/null
20 +++ b/Documentation/devicetree/bindings/i2c/i2c-ralink.txt
21 @@ -0,0 +1,27 @@
22 +I2C for Ralink platforms
23 +
24 +Required properties :
25 +- compatible : Must be "link,rt3052-i2c"
26 +- reg: physical base address of the controller and length of memory mapped
27 + region.
28 +- #address-cells = <1>;
29 +- #size-cells = <0>;
30 +
31 +Optional properties:
32 +- Child nodes conforming to i2c bus binding
33 +
34 +Example :
35 +
36 +palmbus@10000000 {
37 + i2c@900 {
38 + compatible = "link,rt3052-i2c";
39 + reg = <0x900 0x100>;
40 + #address-cells = <1>;
41 + #size-cells = <0>;
42 +
43 + hwmon@4b {
44 + compatible = "national,lm92";
45 + reg = <0x4b>;
46 + };
47 + };
48 +};
49 diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
50 index adfee98..ec925ae 100644
51 --- a/drivers/i2c/busses/Kconfig
52 +++ b/drivers/i2c/busses/Kconfig
53 @@ -628,6 +628,10 @@ config I2C_PXA_SLAVE
54 is necessary for systems where the PXA may be a target on the
55 I2C bus.
56
57 +config I2C_RALINK
58 + tristate "Ralink I2C Controller"
59 + select OF_I2C
60 +
61 config HAVE_S3C2410_I2C
62 bool
63 help
64 diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
65 index 8f4fc23..7e39a13 100644
66 --- a/drivers/i2c/busses/Makefile
67 +++ b/drivers/i2c/busses/Makefile
68 @@ -62,6 +62,7 @@ obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
69 obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
70 obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
71 obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
72 +obj-$(CONFIG_I2C_RALINK) += i2c-ralink.o
73 obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
74 obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
75 obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
76 diff --git a/drivers/i2c/busses/i2c-ralink.c b/drivers/i2c/busses/i2c-ralink.c
77 new file mode 100644
78 index 0000000..b5abf0f
79 --- /dev/null
80 +++ b/drivers/i2c/busses/i2c-ralink.c
81 @@ -0,0 +1,274 @@
82 +/*
83 + * drivers/i2c/busses/i2c-ralink.c
84 + *
85 + * Copyright (C) 2013 Steven Liu <steven_liu@mediatek.com>
86 + *
87 + * This software is licensed under the terms of the GNU General Public
88 + * License version 2, as published by the Free Software Foundation, and
89 + * may be copied, distributed, and modified under those terms.
90 + *
91 + * This program is distributed in the hope that it will be useful,
92 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
93 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
94 + * GNU General Public License for more details.
95 + *
96 + */
97 +
98 +#include <linux/interrupt.h>
99 +#include <linux/kernel.h>
100 +#include <linux/module.h>
101 +#include <linux/reset.h>
102 +#include <linux/delay.h>
103 +#include <linux/slab.h>
104 +#include <linux/init.h>
105 +#include <linux/errno.h>
106 +#include <linux/platform_device.h>
107 +#include <linux/i2c.h>
108 +#include <linux/io.h>
109 +#include <linux/of_i2c.h>
110 +#include <linux/err.h>
111 +
112 +#include <asm/mach-ralink/ralink_regs.h>
113 +
114 +#define REG_CONFIG_REG 0x00
115 +#define REG_CLKDIV_REG 0x04
116 +#define REG_DEVADDR_REG 0x08
117 +#define REG_ADDR_REG 0x0C
118 +#define REG_DATAOUT_REG 0x10
119 +#define REG_DATAIN_REG 0x14
120 +#define REG_STATUS_REG 0x18
121 +#define REG_STARTXFR_REG 0x1C
122 +#define REG_BYTECNT_REG 0x20
123 +
124 +#define I2C_STARTERR BIT(4)
125 +#define I2C_ACKERR BIT(3)
126 +#define I2C_DATARDY BIT(2)
127 +#define I2C_SDOEMPTY BIT(1)
128 +#define I2C_BUSY BIT(0)
129 +
130 +#define I2C_DEVADLEN_7 (6 << 2)
131 +#define I2C_ADDRDIS BIT(1)
132 +
133 +#define I2C_RETRY 0x400
134 +
135 +#define CLKDIV_VALUE 600
136 +
137 +#define READ_CMD 0x01
138 +#define WRITE_CMD 0x00
139 +#define READ_BLOCK 64
140 +
141 +static void __iomem *membase;
142 +static struct i2c_adapter *adapter;
143 +
144 +static void rt_i2c_w32(u32 val, unsigned reg)
145 +{
146 + iowrite32(val, membase + reg);
147 +}
148 +
149 +static u32 rt_i2c_r32(unsigned reg)
150 +{
151 + return ioread32(membase + reg);
152 +}
153 +
154 +static inline int rt_i2c_wait_rx_done(void)
155 +{
156 + int retries = I2C_RETRY;
157 +
158 + do {
159 + if (!retries--)
160 + break;
161 + } while(!(rt_i2c_r32(REG_STATUS_REG) & I2C_DATARDY));
162 +
163 + return (retries < 0);
164 +}
165 +
166 +static inline int rt_i2c_wait_idle(void)
167 +{
168 + int retries = I2C_RETRY;
169 +
170 + do {
171 + if (!retries--)
172 + break;
173 + } while(rt_i2c_r32(REG_STATUS_REG) & I2C_BUSY);
174 +
175 + return (retries < 0);
176 +}
177 +
178 +static inline int rt_i2c_wait_tx_done(void)
179 +{
180 + int retries = I2C_RETRY;
181 +
182 + do {
183 + if (!retries--)
184 + break;
185 + } while(!(rt_i2c_r32(REG_STATUS_REG) & I2C_SDOEMPTY));
186 +
187 + return (retries < 0);
188 +}
189 +
190 +static int rt_i2c_handle_msg(struct i2c_adapter *a, struct i2c_msg* msg)
191 +{
192 + int i = 0, j = 0, pos = 0;
193 + int nblock = msg->len / READ_BLOCK;
194 + int rem = msg->len % READ_BLOCK;
195 +
196 + if (msg->flags & I2C_M_TEN) {
197 + printk("10 bits addr not supported\n");
198 + return -EINVAL;
199 + }
200 +
201 + if (msg->flags & I2C_M_RD) {
202 + for (i = 0; i < nblock; i++) {
203 + rt_i2c_wait_idle();
204 + rt_i2c_w32(READ_BLOCK - 1, REG_BYTECNT_REG);
205 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
206 + for (j = 0; j < READ_BLOCK; j++) {
207 + if (rt_i2c_wait_rx_done())
208 + return -1;
209 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
210 + }
211 + }
212 +
213 + rt_i2c_wait_idle();
214 + rt_i2c_w32(rem - 1, REG_BYTECNT_REG);
215 + rt_i2c_w32(READ_CMD, REG_STARTXFR_REG);
216 + for (i = 0; i < rem; i++) {
217 + if (rt_i2c_wait_rx_done())
218 + return -1;
219 + msg->buf[pos++] = rt_i2c_r32(REG_DATAIN_REG);
220 + }
221 + } else {
222 + rt_i2c_wait_idle();
223 + rt_i2c_w32(msg->len - 1, REG_BYTECNT_REG);
224 + rt_i2c_w32(msg->buf[0], REG_DATAOUT_REG);
225 + rt_i2c_w32(WRITE_CMD, REG_STARTXFR_REG);
226 + for (i = 1; i < msg->len; i++) {
227 + rt_i2c_w32(msg->buf[i], REG_DATAOUT_REG);
228 + if (rt_i2c_wait_tx_done())
229 + return -1;
230 + }
231 + }
232 +
233 + return msg->len;
234 +}
235 +
236 +static int rt_i2c_master_xfer(struct i2c_adapter *a, struct i2c_msg *m, int n)
237 +{
238 + int i = 0;
239 + int ret = 0;
240 +
241 + if (rt_i2c_wait_idle()) {
242 + printk("i2c transfer failed\n");
243 + return 0;
244 + }
245 +
246 + device_reset(a->dev.parent);
247 +
248 + rt_i2c_w32(m->addr, REG_DEVADDR_REG);
249 + rt_i2c_w32(I2C_DEVADLEN_7 | I2C_ADDRDIS, REG_CONFIG_REG);
250 + rt_i2c_w32(CLKDIV_VALUE, REG_CLKDIV_REG);
251 +
252 + for (i = 0; i < n && !ret; i++)
253 + ret = rt_i2c_handle_msg(a, &m[i]);
254 +
255 + if (ret) {
256 + printk("i2c transfer failed\n");
257 + return 0;
258 + }
259 +
260 + return n;
261 +}
262 +
263 +static u32 rt_i2c_func(struct i2c_adapter *a)
264 +{
265 + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
266 +}
267 +
268 +static const struct i2c_algorithm rt_i2c_algo = {
269 + .master_xfer = rt_i2c_master_xfer,
270 + .functionality = rt_i2c_func,
271 +};
272 +
273 +static int rt_i2c_probe(struct platform_device *pdev)
274 +{
275 + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
276 + int ret;
277 +
278 + if (!res) {
279 + dev_err(&pdev->dev, "no memory resource found\n");
280 + return -ENODEV;
281 + }
282 +
283 + adapter = devm_kzalloc(&pdev->dev, sizeof(struct i2c_adapter), GFP_KERNEL);
284 + if (!adapter) {
285 + dev_err(&pdev->dev, "failed to allocate i2c_adapter\n");
286 + return -ENOMEM;
287 + }
288 +
289 + membase = devm_request_and_ioremap(&pdev->dev, res);
290 + if (IS_ERR(membase))
291 + return PTR_ERR(membase);
292 +
293 + strlcpy(adapter->name, dev_name(&pdev->dev), sizeof(adapter->name));
294 + adapter->owner = THIS_MODULE;
295 + adapter->nr = pdev->id;
296 + adapter->timeout = HZ;
297 + adapter->algo = &rt_i2c_algo;
298 + adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
299 + adapter->dev.parent = &pdev->dev;
300 + adapter->dev.of_node = pdev->dev.of_node;
301 +
302 + ret = i2c_add_numbered_adapter(adapter);
303 + if (ret)
304 + return ret;
305 +
306 + of_i2c_register_devices(adapter);
307 +
308 + platform_set_drvdata(pdev, adapter);
309 +
310 + dev_info(&pdev->dev, "loaded\n");
311 +
312 + return 0;
313 +}
314 +
315 +static int rt_i2c_remove(struct platform_device *pdev)
316 +{
317 + platform_set_drvdata(pdev, NULL);
318 +
319 + return 0;
320 +}
321 +
322 +static const struct of_device_id i2c_rt_dt_ids[] = {
323 + { .compatible = "ralink,rt2880-i2c", },
324 + { /* sentinel */ }
325 +};
326 +
327 +MODULE_DEVICE_TABLE(of, i2c_rt_dt_ids);
328 +
329 +static struct platform_driver rt_i2c_driver = {
330 + .probe = rt_i2c_probe,
331 + .remove = rt_i2c_remove,
332 + .driver = {
333 + .owner = THIS_MODULE,
334 + .name = "i2c-ralink",
335 + .of_match_table = i2c_rt_dt_ids,
336 + },
337 +};
338 +
339 +static int __init i2c_rt_init (void)
340 +{
341 + return platform_driver_register(&rt_i2c_driver);
342 +}
343 +subsys_initcall(i2c_rt_init);
344 +
345 +static void __exit i2c_rt_exit (void)
346 +{
347 + platform_driver_unregister(&rt_i2c_driver);
348 +}
349 +
350 +module_exit (i2c_rt_exit);
351 +
352 +MODULE_AUTHOR("Steven Liu <steven_liu@mediatek.com>");
353 +MODULE_DESCRIPTION("Ralink I2c host driver");
354 +MODULE_LICENSE("GPL");
355 +MODULE_ALIAS("platform:Ralink-I2C");
356 --
357 1.7.10.4
358