ralink: bump to the target to v4.3
[openwrt/svn-archive/archive.git] / target / linux / ramips / patches-4.3 / 0026-DT-Add-documentation-for-gpio-ralink.patch
1 From d410e5478c622c01fcf31427533df5f433df9146 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Sun, 28 Jul 2013 19:45:30 +0200
4 Subject: [PATCH 26/53] DT: Add documentation for gpio-ralink
5
6 Describe gpio-ralink binding.
7
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 Cc: linux-mips@linux-mips.org
10 Cc: devicetree@vger.kernel.org
11 Cc: linux-gpio@vger.kernel.org
12 ---
13 .../devicetree/bindings/gpio/gpio-ralink.txt | 40 ++++++++++++++++++++
14 1 file changed, 40 insertions(+)
15 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-ralink.txt
16
17 diff --git a/Documentation/devicetree/bindings/gpio/gpio-ralink.txt b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt
18 new file mode 100644
19 index 0000000..b4acf02
20 --- /dev/null
21 +++ b/Documentation/devicetree/bindings/gpio/gpio-ralink.txt
22 @@ -0,0 +1,40 @@
23 +Ralink SoC GPIO controller bindings
24 +
25 +Required properties:
26 +- compatible:
27 + - "ralink,rt2880-gpio" for Ralink controllers
28 +- #gpio-cells : Should be two.
29 + - first cell is the pin number
30 + - second cell is used to specify optional parameters (unused)
31 +- gpio-controller : Marks the device node as a GPIO controller
32 +- reg : Physical base address and length of the controller's registers
33 +- interrupt-parent: phandle to the INTC device node
34 +- interrupts : Specify the INTC interrupt number
35 +- ralink,num-gpios : Specify the number of GPIOs
36 +- ralink,register-map : The register layout depends on the GPIO bank and actual
37 + SoC type. Register offsets need to be in this order.
38 + [ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ]
39 +
40 +Optional properties:
41 +- ralink,gpio-base : Specify the GPIO chips base number
42 +
43 +Example:
44 +
45 + gpio0: gpio@600 {
46 + compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
47 +
48 + #gpio-cells = <2>;
49 + gpio-controller;
50 +
51 + reg = <0x600 0x34>;
52 +
53 + interrupt-parent = <&intc>;
54 + interrupts = <6>;
55 +
56 + ralink,gpio-base = <0>;
57 + ralink,num-gpios = <24>;
58 + ralink,register-map = [ 00 04 08 0c
59 + 20 24 28 2c
60 + 30 34 ];
61 +
62 + };
63 --
64 1.7.10.4
65