91dae89999d50dccbcb142915b6b3cf8cc10c604
[openwrt/svn-archive/archive.git] / target / linux / rb1xx-2.6 / files / arch / mips / pci / ops-adm5120.c
1 /*
2 * Copyright (C) ADMtek Incorporated.
3 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
4 * Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
5 * Copyright (C) 2007 OpenWrt.org
6 */
7
8 #include <linux/autoconf.h>
9 #include <linux/types.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13
14 #include <adm5120_defs.h>
15
16 volatile u32* pci_config_address_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_ADDR);
17 volatile u32* pci_config_data_reg = (volatile u32*)KSEG1ADDR(ADM5120_PCICFG_DATA);
18
19 #define PCI_ENABLE 0x80000000
20
21 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where,
22 int size, uint32_t *val)
23 {
24 *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
25 ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
26 switch (size) {
27 case 1:
28 *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xff;
29 break;
30 case 2:
31 *val = ((*pci_config_data_reg)>>((where&3)<<3))&0xffff;
32 break;
33 default:
34 *val = (*pci_config_data_reg);
35 }
36 return PCIBIOS_SUCCESSFUL;
37 }
38
39 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where,
40 int size, uint32_t val)
41 {
42 *pci_config_address_reg = ((bus->number & 0xff) << 0x10) |
43 ((devfn & 0xff) << 0x08) | (where & 0xfc) | PCI_ENABLE;
44 switch (size) {
45 case 1:
46 *(volatile u8 *)(((int)pci_config_data_reg) +
47 (where & 3)) = val;
48 break;
49 case 2:
50 *(volatile u16 *)(((int)pci_config_data_reg) +
51 (where & 2)) = (val);
52 break;
53 default:
54 *pci_config_data_reg = (val);
55 }
56
57 return PCIBIOS_SUCCESSFUL;
58 }
59
60 struct pci_ops adm5120_pci_ops = {
61 .read = pci_config_read,
62 .write = pci_config_write,
63 };