Convert the NAND driver to platform_driver, allow tgz image to be built correctly
[openwrt/svn-archive/archive.git] / target / linux / rb532-2.6 / files / arch / mips / rb500 / devices.c
1 /*
2 * RouterBoard 500 Platform devices
3 *
4 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * $Id$
17 */
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/ctype.h>
22 #include <linux/string.h>
23 #include <linux/platform_device.h>
24 #include <asm/unaligned.h>
25 #include <asm/io.h>
26
27 #include <asm/rc32434/rc32434.h>
28 #include <asm/rc32434/dma.h>
29 #include <asm/rc32434/dma_v.h>
30 #include <asm/rc32434/eth.h>
31 #include <asm/rc32434/rb.h>
32
33 #define ETH0_DMA_RX_IRQ GROUP1_IRQ_BASE + 0
34 #define ETH0_DMA_TX_IRQ GROUP1_IRQ_BASE + 1
35 #define ETH0_RX_OVR_IRQ GROUP3_IRQ_BASE + 9
36 #define ETH0_TX_UND_IRQ GROUP3_IRQ_BASE + 10
37
38 #define ETH0_RX_DMA_ADDR (DMA0_PhysicalAddress + 0*DMA_CHAN_OFFSET)
39 #define ETH0_TX_DMA_ADDR (DMA0_PhysicalAddress + 1*DMA_CHAN_OFFSET)
40
41 static struct resource korina_dev0_res[] = {
42 {
43 .name = "korina_regs",
44 .start = ETH0_PhysicalAddress,
45 .end = ETH0_PhysicalAddress + sizeof(ETH_t),
46 .flags = IORESOURCE_MEM,
47 },
48 {
49 .name = "korina_rx",
50 .start = ETH0_DMA_RX_IRQ,
51 .end = ETH0_DMA_RX_IRQ,
52 .flags = IORESOURCE_IRQ
53 },
54 {
55 .name = "korina_tx",
56 .start = ETH0_DMA_TX_IRQ,
57 .end = ETH0_DMA_TX_IRQ,
58 .flags = IORESOURCE_IRQ
59 },
60 {
61 .name = "korina_ovr",
62 .start = ETH0_RX_OVR_IRQ,
63 .end = ETH0_RX_OVR_IRQ,
64 .flags = IORESOURCE_IRQ
65 },
66 {
67 .name = "korina_und",
68 .start = ETH0_TX_UND_IRQ,
69 .end = ETH0_TX_UND_IRQ,
70 .flags = IORESOURCE_IRQ
71 },
72 {
73 .name = "korina_dma_rx",
74 .start = ETH0_RX_DMA_ADDR,
75 .end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
76 .flags = IORESOURCE_MEM,
77 },
78 {
79 .name = "korina_dma_tx",
80 .start = ETH0_TX_DMA_ADDR,
81 .end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
82 .flags = IORESOURCE_MEM,
83 }
84 };
85
86 static struct korina_device korina_dev0_data = {
87 .name = "korina0",
88 .mac = { 0xde, 0xca, 0xff, 0xc0, 0xff, 0xee }
89 };
90
91 static struct platform_device korina_dev0 = {
92 .id = 0,
93 .name = "korina",
94 .dev.platform_data = &korina_dev0_data,
95 .resource = korina_dev0_res,
96 .num_resources = ARRAY_SIZE(korina_dev0_res),
97 };
98
99
100 #define CF_GPIO_NUM 13
101
102 static struct resource cf_slot0_res[] = {
103 {
104 .name = "cf_membase",
105 .flags = IORESOURCE_MEM
106 },
107 {
108 .name = "cf_irq",
109 .start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */
110 .end = (8 + 4 * 32 + CF_GPIO_NUM),
111 .flags = IORESOURCE_IRQ
112 }
113 };
114
115 static struct cf_device cf_slot0_data = {
116 .gpio_pin = 13
117 };
118
119 static struct platform_device cf_slot0 = {
120 .id = 0,
121 .name = "rb500-cf",
122 .dev.platform_data = &cf_slot0_data,
123 .resource = cf_slot0_res,
124 .num_resources = ARRAY_SIZE(cf_slot0_res),
125 };
126
127 /* Resources and device for NAND. There is no data needed and no irqs, so just define the memory used. */
128 static struct resource nand_slot0_res[] = {
129 {
130 .name = "nand_membase",
131 .start = 0x18a20000,
132 .end = (0x18a20000+0x1000)-1,
133 .flags = IORESOURCE_MEM
134 }
135 };
136
137 static struct platform_device nand_slot0 = {
138 .id = 0,
139 .name = "rb500-nand",
140 .resource = nand_slot0_res,
141 .num_resources = ARRAY_SIZE(nand_slot0_res),
142 };
143
144 static struct platform_device rb500led = {
145 .name = "rb500-led",
146 .id = 0,
147 };
148
149
150 static struct platform_device *rb500_devs[] = {
151 &korina_dev0,
152 &nand_slot0,
153 &cf_slot0,
154 &rb500led
155 };
156
157 static void __init parse_mac_addr(char* macstr)
158 {
159 int i, j;
160 unsigned char result, value;
161
162 for (i=0; i<6; i++) {
163 result = 0;
164 if (i != 5 && *(macstr+2) != ':') {
165 return;
166 }
167 for (j=0; j<2; j++) {
168 if (isxdigit(*macstr) && (value = isdigit(*macstr) ? *macstr-'0' :
169 toupper(*macstr)-'A'+10) < 16) {
170 result = result*16 + value;
171 macstr++;
172 }
173 else return;
174 }
175
176 macstr++;
177 korina_dev0_data.mac[i] = result;
178 }
179 }
180
181
182 /* DEVICE CONTROLLER 1 */
183 #define CFG_DC_DEV1 (void*)0xb8010010
184 #define CFG_DC_DEV2 (void*)0xb8010020
185 #define CFG_DC_DEVBASE 0x0
186 #define CFG_DC_DEVMASK 0x4
187 #define CFG_DC_DEVC 0x8
188 #define CFG_DC_DEVTC 0xC
189
190
191 static int __init plat_setup_devices(void)
192 {
193 /* Look for the CF card reader */
194 if (!readl(CFG_DC_DEV1 + CFG_DC_DEVMASK))
195 rb500_devs[1] = NULL;
196 else {
197 cf_slot0_res[0].start = readl(CFG_DC_DEV1 + CFG_DC_DEVBASE);
198 cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
199 }
200
201 /* There is always a NAND device */
202 nand_slot0_res[0].start = readl( CFG_DC_DEV2 + CFG_DC_DEVBASE);
203 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
204
205 return platform_add_devices(rb500_devs, ARRAY_SIZE(rb500_devs));
206 }
207
208 static int __init setup_kmac(char *s)
209 {
210 printk("korina mac = %s\n",s);
211 parse_mac_addr(s);
212 return 0;
213 }
214
215 __setup("kmac=", setup_kmac);
216 arch_initcall(plat_setup_devices);
217
218