target/linux/rb532-2.6/files/arch/mips/rb500/irq.c

   1 /*
   2  * BRIEF MODULE DESCRIPTION
   3  *      RC32434 interrupt routines.
   4  *
   5  * Copyright 2002 MontaVista Software Inc.
   6  * Author: MontaVista Software, Inc.
   7  *              stevel@mvista.com or source@mvista.com
   8  *
   9  *  This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  */
  29
  30 #include <linux/errno.h>
  31 #include <linux/init.h>
  32 #include <linux/kernel_stat.h>
  33 #include <linux/module.h>
  34 #include <linux/signal.h>
  35 #include <linux/sched.h>
  36 #include <linux/types.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/ioport.h>
  39 #include <linux/timex.h>
  40 #include <linux/slab.h>
  41 #include <linux/random.h>
  42 #include <linux/delay.h>
  43
  44 #include <asm/bitops.h>
  45 #include <asm/bootinfo.h>
  46 #include <asm/io.h>
  47 #include <asm/irq.h>
  48 #include <asm/time.h>
  49 #include <asm/mipsregs.h>
  50 #include <asm/system.h>
  51 #include <asm/rc32434/rc32434.h>
  52 #include <asm/rc32434/gpio.h>
  53
  54 extern void set_debug_traps(void);
  55 extern irq_cpustat_t irq_stat [NR_CPUS];
  56 unsigned int local_bh_count[NR_CPUS];
  57 unsigned int local_irq_count[NR_CPUS];
  58
  59 static unsigned int startup_irq(unsigned int irq);
  60 static void rb500_end_irq(unsigned int irq_nr);
  61 static void mask_and_ack_irq(unsigned int irq_nr);
  62 static void rb500_enable_irq(unsigned int irq_nr);
  63 static void rb500_disable_irq(unsigned int irq_nr);
  64
  65 extern void __init init_generic_irq(void);
  66
  67 typedef struct {
  68   u32 mask;       /* mask of valid bits in pending/mask registers */
  69   volatile u32 *base_addr;
  70 } intr_group_t;
  71
  72 #define RC32434_NR_IRQS  (GROUP4_IRQ_BASE + 32)
  73
  74 #if (NR_IRQS < RC32434_NR_IRQS)
  75 #error Too little irqs defined. Did you override <asm/irq.h> ?
  76 #endif
  77
  78 static const intr_group_t intr_group[NUM_INTR_GROUPS] = {
  79   { 0x0000efff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET) },
  80   { 0x00001fff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET) },
  81   { 0x00000007, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET) },
  82   { 0x0003ffff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET) },
  83   { 0xffffffff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET) }
  84 };
  85
  86 #define READ_PEND(base) (*(base))
  87 #define READ_MASK(base) (*(base + 2))
  88 #define WRITE_MASK(base, val) (*(base + 2) = (val))
  89
  90 static inline int irq_to_group(unsigned int irq_nr)
  91 {
  92   return ((irq_nr - GROUP0_IRQ_BASE) >> 5);
  93 }
  94
  95 static inline int group_to_ip(unsigned int group)
  96 {
  97   return group + 2;
  98 }
  99
 100 static inline void enable_local_irq(unsigned int ip)
 101 {
 102   int ipnum = 0x100 << ip;
 103   clear_c0_cause(ipnum);
 104   set_c0_status(ipnum);
 105 }
 106
 107 static inline void disable_local_irq(unsigned int ip)
 108 {
 109   int ipnum = 0x100 << ip;
 110   clear_c0_status(ipnum);
 111 }
 112
 113 static inline void ack_local_irq(unsigned int ip)
 114 {
 115   int ipnum = 0x100 << ip;
 116   clear_c0_cause(ipnum);
 117 }
 118
 119 static void rb500_enable_irq(unsigned int irq_nr)
 120 {
 121   int           ip = irq_nr - GROUP0_IRQ_BASE;
 122   unsigned int  group, intr_bit;
 123   volatile unsigned int  *addr;
 124
 125
 126   if (ip < 0)
 127     enable_local_irq(irq_nr);
 128   else {
 129     group = ip >> 5;
 130
 131     ip &= (1<<5)-1;
 132     intr_bit = 1 << ip;
 133
 134     enable_local_irq(group_to_ip(group));
 135
 136     addr = intr_group[group].base_addr;
 137     WRITE_MASK(addr, READ_MASK(addr) & ~intr_bit);
 138   }
 139 }
 140
 141 static void rb500_disable_irq(unsigned int irq_nr)
 142 {
 143   int           ip = irq_nr - GROUP0_IRQ_BASE;
 144   unsigned int  group, intr_bit, mask;
 145   volatile unsigned int  *addr;
 146
 147   if (ip < 0) {
 148         disable_local_irq(irq_nr);
 149     }else{
 150     group = ip >> 5;
 151
 152     ip &= (1<<5) -1;
 153     intr_bit = 1 << ip;
 154     addr = intr_group[group].base_addr;
 155     mask = READ_MASK(addr);
 156     mask |= intr_bit;
 157     WRITE_MASK(addr,mask);
 158
 159     /*
 160      * if there are no more interrupts enabled in this
 161      * group, disable corresponding IP
 162      */
 163     if (mask == intr_group[group].mask)
 164       disable_local_irq(group_to_ip(group));
 165   }
 166 }
 167
 168 static unsigned int startup_irq(unsigned int irq_nr)
 169 {
 170   rb500_enable_irq(irq_nr);
 171   return 0;
 172 }
 173
 174 static void shutdown_irq(unsigned int irq_nr)
 175 {
 176   rb500_disable_irq(irq_nr);
 177   return;
 178 }
 179
 180 static void mask_and_ack_irq(unsigned int irq_nr)
 181 {
 182   rb500_disable_irq(irq_nr);
 183   ack_local_irq(group_to_ip(irq_to_group(irq_nr)));
 184 }
 185
 186 static void rb500_end_irq(unsigned int irq_nr)
 187 {
 188
 189   int ip = irq_nr - GROUP0_IRQ_BASE;
 190   unsigned int intr_bit, group;
 191   volatile unsigned int *addr;
 192
 193         if ((irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
 194                 printk("warning: end_irq %d did not enable (%x)\n",
 195                         irq_nr, irq_desc[irq_nr].status);
 196                 return;
 197         }
 198
 199         if (ip < 0) {
 200                 enable_local_irq(irq_nr);
 201         } else {
 202                 group = ip >> 5;
 203
 204                 ip &= (1 << 5) - 1;
 205                 intr_bit = 1 << ip;
 206
 207                 if (irq_nr >= GROUP4_IRQ_BASE && irq_nr <= (GROUP4_IRQ_BASE + 13)) {
 208                         gpio->gpioistat = gpio->gpioistat & ~intr_bit;
 209                 }
 210
 211                 enable_local_irq(group_to_ip(group));
 212
 213                 addr = intr_group[group].base_addr;
 214                 WRITE_MASK(addr, READ_MASK(addr) & ~intr_bit);
 215         }
 216 }
 217
 218 static struct hw_interrupt_type rc32434_irq_type = {
 219   .typename = "RB500",
 220   .startup = startup_irq,
 221   .shutdown = shutdown_irq,
 222   .enable = rb500_enable_irq,
 223   .disable = rb500_disable_irq,
 224   .ack = mask_and_ack_irq,
 225   .end = rb500_end_irq,
 226 };
 227
 228
 229 void __init arch_init_irq(void)
 230 {
 231         int i;
 232
 233         printk("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS);
 234         memset(irq_desc, 0, sizeof(irq_desc));
 235
 236         for (i = 0; i < RC32434_NR_IRQS; i++) {
 237                 irq_desc[i].status = IRQ_DISABLED;
 238                 irq_desc[i].action = NULL;
 239                 irq_desc[i].depth = 1;
 240                 irq_desc[i].chip = &rc32434_irq_type;
 241                 spin_lock_init(&irq_desc[i].lock);
 242         }
 243 }
 244
 245 /* Main Interrupt dispatcher */
 246 asmlinkage void plat_irq_dispatch(void)
 247 {
 248         unsigned int ip, pend, group;
 249         volatile unsigned int *addr;
 250         unsigned int cp0_cause = read_c0_cause() & read_c0_status();
 251
 252         if (cp0_cause & CAUSEF_IP7) {
 253                 ll_timer_interrupt(7);
 254         } else if ((ip = (cp0_cause & 0x7c00))) {
 255                 group = 21 - rc32434_clz(ip);
 256
 257                 addr = intr_group[group].base_addr;
 258
 259                 pend = READ_PEND(addr);
 260                 pend &= ~READ_MASK(addr); // only unmasked interrupts
 261                 pend = 39 - rc32434_clz(pend);
 262                 do_IRQ((group << 5) + pend);
 263         }
 264 }