convert rb532 to the new structure
[openwrt/svn-archive/archive.git] / target / linux / rb532-2.6 / files / arch / mips / rb500 / time.c
1 /*
2 ****************************************************************************
3 * Carsten Langgaard, carstenl@mips.com
4 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
5 *
6 ***************************************************************************
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 *
21 ****************************************************************************
22 *
23 * Setting up the clock on the MIPS boards.
24 *
25 ****************************************************************************
26 * P. Sadik Oct 10, 2003
27 *
28 * Started change log.
29 * mips_counter_frequency is now calculated at run time, based on idt_cpu_freq.
30 * Code cleanup
31 ****************************************************************************
32 */
33
34 #include <linux/autoconf.h>
35 #include <linux/init.h>
36 #include <linux/kernel_stat.h>
37 #include <linux/sched.h>
38 #include <linux/spinlock.h>
39 #include <linux/mc146818rtc.h>
40 #include <linux/irq.h>
41 #include <linux/timex.h>
42
43 #include <asm/mipsregs.h>
44 #include <asm/ptrace.h>
45 #include <asm/debug.h>
46 #include <asm/rc32434/rc32434.h>
47
48 static unsigned long r4k_offset; /* Amount to incr compare reg each time */
49 static unsigned long r4k_cur; /* What counter should be at next timer irq */
50 extern unsigned int mips_hpt_frequency;
51 extern unsigned int idt_cpu_freq;
52
53 /*
54 * Figure out the r4k offset, the amount to increment the compare
55 * register for each time tick. There is no RTC available.
56 *
57 * The RC32434 counts at half the CPU *core* speed.
58 */
59 static unsigned long __init cal_r4koff(void)
60 {
61 mips_hpt_frequency = idt_cpu_freq * IDT_CLOCK_MULT / 2;
62 return (mips_hpt_frequency / HZ);
63 }
64
65
66 void __init rc32434_time_init(void)
67 {
68 unsigned int est_freq, flags;
69
70 local_irq_save(flags);
71
72 printk("calculating r4koff... ");
73 r4k_offset = cal_r4koff();
74 printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
75
76 est_freq = 2*r4k_offset*HZ;
77 est_freq += 5000; /* round */
78 est_freq -= est_freq%10000;
79 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
80 (est_freq%1000000)*100/1000000);
81 local_irq_restore(flags);
82 }
83
84 void __init plat_timer_setup(struct irqaction *irq)
85 {
86 /* we are using the cpu counter for timer interrupts */
87 setup_irq(MIPS_CPU_TIMER_IRQ, irq);
88
89 /* to generate the first timer interrupt */
90 r4k_cur = (read_c0_count() + r4k_offset);
91 write_c0_compare(r4k_cur);
92 }
93