watchdog driver for RB 532
[openwrt/svn-archive/archive.git] / target / linux / rb532 / files / include / asm-mips / rc32434 / integ.h
1 #ifndef __IDT_INTEG_H__
2 #define __IDT_INTEG_H__
3
4 /*******************************************************************************
5 *
6 * Copyright 2002 Integrated Device Technology, Inc.
7 * All rights reserved.
8 *
9 * System Integrity register definition.
10 *
11 * File : $Id: integ.h,v 1.3 2002/06/06 18:34:04 astichte Exp $
12 *
13 * Author : ryan.holmQVist@idt.com
14 * Date : 20011005
15 * Update :
16 * $Log: integ.h,v $
17 * Revision 1.3 2002/06/06 18:34:04 astichte
18 * Added XXX_PhysicalAddress and XXX_VirtualAddress
19 *
20 * Revision 1.2 2002/06/05 18:32:33 astichte
21 * Removed IDTField
22 *
23 * Revision 1.1 2002/05/29 17:33:22 sysarch
24 * jba File moved from vcode/include/idt/acacia
25 *
26 ******************************************************************************/
27
28 enum
29 {
30 INTEG0_PhysicalAddress = 0x18030000,
31 INTEG_PhysicalAddress = INTEG0_PhysicalAddress, // Default
32
33 INTEG0_VirtualAddress = 0xb8030000,
34 INTEG_VirtualAddress = INTEG0_VirtualAddress, // Default
35 } ;
36
37 // if you are looing for CEA, try rst.h
38 typedef struct
39 {
40 u32 filler [0xc] ; // 0x30 bytes unused.
41 u32 errcs ; // sticky use ERRCS_
42 u32 wtcount ; // Watchdog timer count reg.
43 u32 wtcompare ; // Watchdog timer timeout value.
44 u32 wtc ; // Watchdog timer control. use WTC_
45 } volatile *INTEG_t ;
46
47 enum
48 {
49 ERRCS_wto_b = 0, // In INTEG_t -> errcs
50 ERRCS_wto_m = 0x00000001,
51 ERRCS_wne_b = 1, // In INTEG_t -> errcs
52 ERRCS_wne_m = 0x00000002,
53 ERRCS_ucw_b = 2, // In INTEG_t -> errcs
54 ERRCS_ucw_m = 0x00000004,
55 ERRCS_ucr_b = 3, // In INTEG_t -> errcs
56 ERRCS_ucr_m = 0x00000008,
57 ERRCS_upw_b = 4, // In INTEG_t -> errcs
58 ERRCS_upw_m = 0x00000010,
59 ERRCS_upr_b = 5, // In INTEG_t -> errcs
60 ERRCS_upr_m = 0x00000020,
61 ERRCS_udw_b = 6, // In INTEG_t -> errcs
62 ERRCS_udw_m = 0x00000040,
63 ERRCS_udr_b = 7, // In INTEG_t -> errcs
64 ERRCS_udr_m = 0x00000080,
65 ERRCS_sae_b = 8, // In INTEG_t -> errcs
66 ERRCS_sae_m = 0x00000100,
67 ERRCS_wre_b = 9, // In INTEG_t -> errcs
68 ERRCS_wre_m = 0x00000200,
69
70 WTC_en_b = 0, // In INTEG_t -> wtc
71 WTC_en_m = 0x00000001,
72 WTC_to_b = 1, // In INTEG_t -> wtc
73 WTC_to_m = 0x00000002,
74 } ;
75
76 #endif // __IDT_INTEG_H__