5786803e471fb6dabd5e857ca64e9c1795f00f21
[openwrt/svn-archive/archive.git] / target / linux / rb532 / patches-2.6.27 / 002-pci_io_map_base.patch
1 The code is rather based on trial-and-error than knowledge. Verified Via
2 Rhine functionality in PIO as well as MMIO mode.
3
4 Signed-off-by: Phil Sutter <n0-1@freewrt.org>
5 Tested-by: Florian Fainelli <florian@openwrt.org>
6 ---
7 arch/mips/pci/pci-rc32434.c | 11 +++++++++++
8 1 files changed, 11 insertions(+), 0 deletions(-)
9
10 diff --git a/arch/mips/pci/pci-rc32434.c b/arch/mips/pci/pci-rc32434.c
11 index 1c2821e..71f7d27 100644
12 --- a/arch/mips/pci/pci-rc32434.c
13 +++ b/arch/mips/pci/pci-rc32434.c
14 @@ -205,6 +205,8 @@ static int __init rc32434_pcibridge_init(void)
15
16 static int __init rc32434_pci_init(void)
17 {
18 + void __iomem *io_map_base;
19 +
20 pr_info("PCI: Initializing PCI\n");
21
22 ioport_resource.start = rc32434_res_pci_io1.start;
23 @@ -212,6 +214,15 @@ static int __init rc32434_pci_init(void)
24
25 rc32434_pcibridge_init();
26
27 + io_map_base = ioremap(rc32434_res_pci_io1.start,
28 + rc32434_res_pci_io1.end - rc32434_res_pci_io1.start + 1);
29 +
30 + if (!io_map_base)
31 + return -ENOMEM;
32 +
33 + rc32434_controller.io_map_base =
34 + (unsigned long)io_map_base - rc32434_res_pci_io1.start;
35 +
36 register_pci_controller(&rc32434_controller);
37 rc32434_sync();
38
39 --
40 1.5.6.4
41
42