target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.h

   1 #ifndef __GLAMO_CORE_H
   2 #define __GLAMO_CORE_H
   3
   4 #include <asm/system.h>
   5 #include <linux/glamo-engine.h>
   6
   7 /* for the time being, we put the on-screen framebuffer into the lowest
   8  * VRAM space.  This should make the code easily compatible with the various
   9  * 2MB/4MB/8MB variants of the Smedia chips */
  10 #define GLAMO_OFFSET_VRAM       0x800000
  11 #define GLAMO_OFFSET_FB (GLAMO_OFFSET_VRAM)
  12
  13 /* we only allocate the minimum possible size for the framebuffer to make
  14  * sure we have sufficient memory for other functions of the chip */
  15 //#define GLAMO_FB_SIZE (640*480*4)     /* == 0x12c000 */
  16 #define GLAMO_INTERNAL_RAM_SIZE 0x800000
  17 #define GLAMO_MMC_BUFFER_SIZE (64 * 1024)
  18 #define GLAMO_FB_SIZE   (GLAMO_INTERNAL_RAM_SIZE - GLAMO_MMC_BUFFER_SIZE)
  19
  20 struct glamo_core {
  21         int irq;
  22         int irq_works; /* 0 means PCB does not support Glamo IRQ */
  23         struct resource *mem;
  24         struct resource *mem_core;
  25         void __iomem *base;
  26         struct platform_device *pdev;
  27         struct glamofb_platform_data *pdata;
  28         u_int16_t type;
  29         u_int16_t revision;
  30         spinlock_t lock;
  31         u32 engine_enabled_bitfield;
  32         u32 engine_enabled_bitfield_suspend;
  33         int suspending;
  34 };
  35
  36 struct glamo_script {
  37         u_int16_t reg;
  38         u_int16_t val;
  39 };
  40
  41 int glamo_run_script(struct glamo_core *glamo,
  42                      struct glamo_script *script, int len, int may_sleep);
  43
  44 struct glamo_mci_pdata {
  45         struct glamo_core * pglamo;
  46         unsigned int    gpio_detect;
  47         unsigned int    gpio_wprotect;
  48         unsigned long   ocr_avail;
  49         int             (*glamo_can_set_mci_power)(void);
  50         /* glamo-mci asking if it should use the slow clock to card */
  51         int             (*glamo_mci_use_slow)(void);
  52         int             (*glamo_irq_is_wired)(void);
  53         void            (*mci_suspending)(struct platform_device *dev);
  54         int             (*mci_all_dependencies_resumed)(struct platform_device *dev);
  55
  56 };
  57
  58 int glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine);
  59 int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine);
  60 void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine);
  61 int glamo_engine_reclock(struct glamo_core *glamo,
  62                          enum glamo_engine engine, int ps);
  63
  64 void glamo_engine_clkreg_set(struct glamo_core *glamo,
  65                              enum glamo_engine engine,
  66                              u_int16_t mask, u_int16_t val);
  67
  68 u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
  69                                   enum glamo_engine engine);
  70 #endif /* __GLAMO_CORE_H */