target/linux/s3c24xx/patches-2.6.24/1012-gta01-jbt6k74.patch.patch

   1 From 6887823c9ab409a15ea73bda8a8b0523cebbe444 Mon Sep 17 00:00:00 2001
   2 From: mokopatches <mokopatches@openmoko.org>
   3 Date: Fri, 4 Apr 2008 11:31:13 +0100
   4 Subject: [PATCH] gta01-jbt6k74.patch
   5  This driver adds support for the SPI-based control interface of the LCM (LCD
   6  Panel) found on the FIC GTA01 hardware.
   7
   8 The specific panel in this hardware is a TPO TD028TTEC1, but the driver should
   9 be able to drive any other diplay based on the JBT6K74-AS controller ASIC.
  10
  11 Signed-off-by: Harald Welte <laforge@openmoko.org>
  12 ---
  13  arch/arm/mach-s3c2410/Kconfig   |    1 +
  14  drivers/video/display/Kconfig   |   11 +
  15  drivers/video/display/Makefile  |    1 +
  16  drivers/video/display/jbt6k74.c |  678 +++++++++++++++++++++++++++++++++++++++
  17  4 files changed, 691 insertions(+), 0 deletions(-)
  18  create mode 100644 drivers/video/display/jbt6k74.c
  19
  20 diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
  21 index a2acd65..ff339e1 100644
  22 --- a/arch/arm/mach-s3c2410/Kconfig
  23 +++ b/arch/arm/mach-s3c2410/Kconfig
  24 @@ -107,6 +107,7 @@ config MACH_VR1000
  25  config MACH_QT2410
  26         bool "QT2410"
  27         select CPU_S3C2410
  28 +       select DISPLAY_JBT6K74
  29         help
  30            Say Y here if you are using the Armzone QT2410
  31
  32 diff --git a/drivers/video/display/Kconfig b/drivers/video/display/Kconfig
  33 index f99af93..f0da483 100644
  34 --- a/drivers/video/display/Kconfig
  35 +++ b/drivers/video/display/Kconfig
  36 @@ -21,4 +21,15 @@ config DISPLAY_SUPPORT
  37  comment "Display hardware drivers"
  38         depends on DISPLAY_SUPPORT
  39
  40 +config DISPLAY_JBT6K74
  41 +       tristate "TPO JBT6K74-AS TFT display ASIC control interface"
  42 +       depends on SPI_MASTER && SYSFS
  43 +       help
  44 +         SPI driver for the control interface of TFT panels containing
  45 +         the TPO JBT6K74-AS controller ASIC, such as the TPO TD028TTEC1
  46 +         TFT diplay module used in the FIC/OpenMoko Neo1973 GSM phones.
  47 +
  48 +         The control interface is required for display operation, as it
  49 +         controls power management, display timing and gamma calibration.
  50 +
  51  endmenu
  52 diff --git a/drivers/video/display/Makefile b/drivers/video/display/Makefile
  53 index c0ea832..011b69d 100644
  54 --- a/drivers/video/display/Makefile
  55 +++ b/drivers/video/display/Makefile
  56 @@ -3,4 +3,5 @@
  57  display-objs                           := display-sysfs.o
  58
  59  obj-$(CONFIG_DISPLAY_SUPPORT)          += display.o
  60 +obj-$(CONFIG_DISPLAY_JBT6K74)          += jbt6k74.o
  61
  62 diff --git a/drivers/video/display/jbt6k74.c b/drivers/video/display/jbt6k74.c
  63 new file mode 100644
  64 index 0000000..d021d7e
  65 --- /dev/null
  66 +++ b/drivers/video/display/jbt6k74.c
  67 @@ -0,0 +1,678 @@
  68 +/* Linux kernel driver for the tpo JBT6K74-AS LCM ASIC
  69 + *
  70 + * Copyright (C) 2006-2007 by OpenMoko, Inc.
  71 + * Author: Harald Welte <laforge@openmoko.org>,
  72 + *        Stefan Schmidt <stefan@openmoko.org>
  73 + * All rights reserved.
  74 + *
  75 + * This program is free software; you can redistribute it and/or
  76 + * modify it under the terms of the GNU General Public License as
  77 + * published by the Free Software Foundation; either version 2 of
  78 + * the License, or (at your option) any later version.
  79 + *
  80 + * This program is distributed in the hope that it will be useful,
  81 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  82 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  83 + * GNU General Public License for more details.
  84 + *
  85 + * You should have received a copy of the GNU General Public License
  86 + * along with this program; if not, write to the Free Software
  87 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  88 + * MA 02111-1307 USA
  89 + *
  90 + */
  91 +#include <linux/kernel.h>
  92 +#include <linux/types.h>
  93 +#include <linux/module.h>
  94 +#include <linux/device.h>
  95 +#include <linux/platform_device.h>
  96 +#include <linux/delay.h>
  97 +
  98 +#include <linux/spi/spi.h>
  99 +
 100 +enum jbt_register {
 101 +       JBT_REG_SLEEP_IN                = 0x10,
 102 +       JBT_REG_SLEEP_OUT               = 0x11,
 103 +
 104 +       JBT_REG_DISPLAY_OFF             = 0x28,
 105 +       JBT_REG_DISPLAY_ON              = 0x29,
 106 +
 107 +       JBT_REG_RGB_FORMAT              = 0x3a,
 108 +       JBT_REG_QUAD_RATE               = 0x3b,
 109 +
 110 +       JBT_REG_POWER_ON_OFF            = 0xb0,
 111 +       JBT_REG_BOOSTER_OP              = 0xb1,
 112 +       JBT_REG_BOOSTER_MODE            = 0xb2,
 113 +       JBT_REG_BOOSTER_FREQ            = 0xb3,
 114 +       JBT_REG_OPAMP_SYSCLK            = 0xb4,
 115 +       JBT_REG_VSC_VOLTAGE             = 0xb5,
 116 +       JBT_REG_VCOM_VOLTAGE            = 0xb6,
 117 +       JBT_REG_EXT_DISPL               = 0xb7,
 118 +       JBT_REG_OUTPUT_CONTROL          = 0xb8,
 119 +       JBT_REG_DCCLK_DCEV              = 0xb9,
 120 +       JBT_REG_DISPLAY_MODE1           = 0xba,
 121 +       JBT_REG_DISPLAY_MODE2           = 0xbb,
 122 +       JBT_REG_DISPLAY_MODE            = 0xbc,
 123 +       JBT_REG_ASW_SLEW                = 0xbd,
 124 +       JBT_REG_DUMMY_DISPLAY           = 0xbe,
 125 +       JBT_REG_DRIVE_SYSTEM            = 0xbf,
 126 +
 127 +       JBT_REG_SLEEP_OUT_FR_A          = 0xc0,
 128 +       JBT_REG_SLEEP_OUT_FR_B          = 0xc1,
 129 +       JBT_REG_SLEEP_OUT_FR_C          = 0xc2,
 130 +       JBT_REG_SLEEP_IN_LCCNT_D        = 0xc3,
 131 +       JBT_REG_SLEEP_IN_LCCNT_E        = 0xc4,
 132 +       JBT_REG_SLEEP_IN_LCCNT_F        = 0xc5,
 133 +       JBT_REG_SLEEP_IN_LCCNT_G        = 0xc6,
 134 +
 135 +       JBT_REG_GAMMA1_FINE_1           = 0xc7,
 136 +       JBT_REG_GAMMA1_FINE_2           = 0xc8,
 137 +       JBT_REG_GAMMA1_INCLINATION      = 0xc9,
 138 +       JBT_REG_GAMMA1_BLUE_OFFSET      = 0xca,
 139 +
 140 +       /* VGA */
 141 +       JBT_REG_BLANK_CONTROL           = 0xcf,
 142 +       JBT_REG_BLANK_TH_TV             = 0xd0,
 143 +       JBT_REG_CKV_ON_OFF              = 0xd1,
 144 +       JBT_REG_CKV_1_2                 = 0xd2,
 145 +       JBT_REG_OEV_TIMING              = 0xd3,
 146 +       JBT_REG_ASW_TIMING_1            = 0xd4,
 147 +       JBT_REG_ASW_TIMING_2            = 0xd5,
 148 +
 149 +       /* QVGA */
 150 +       JBT_REG_BLANK_CONTROL_QVGA      = 0xd6,
 151 +       JBT_REG_BLANK_TH_TV_QVGA        = 0xd7,
 152 +       JBT_REG_CKV_ON_OFF_QVGA         = 0xd8,
 153 +       JBT_REG_CKV_1_2_QVGA            = 0xd9,
 154 +       JBT_REG_OEV_TIMING_QVGA         = 0xde,
 155 +       JBT_REG_ASW_TIMING_1_QVGA       = 0xdf,
 156 +       JBT_REG_ASW_TIMING_2_QVGA       = 0xe0,
 157 +
 158 +
 159 +       JBT_REG_HCLOCK_VGA              = 0xec,
 160 +       JBT_REG_HCLOCK_QVGA             = 0xed,
 161 +
 162 +};
 163 +
 164 +enum jbt_state {
 165 +       JBT_STATE_DEEP_STANDBY,
 166 +       JBT_STATE_SLEEP,
 167 +       JBT_STATE_NORMAL,
 168 +       JBT_STATE_QVGA_NORMAL,
 169 +};
 170 +
 171 +static const char *jbt_state_names[] = {
 172 +       [JBT_STATE_DEEP_STANDBY]        = "deep-standby",
 173 +       [JBT_STATE_SLEEP]               = "sleep",
 174 +       [JBT_STATE_NORMAL]              = "normal",
 175 +       [JBT_STATE_QVGA_NORMAL]         = "qvga-normal",
 176 +};
 177 +
 178 +struct jbt_info {
 179 +       enum jbt_state state, last_state;
 180 +       struct spi_device *spi_dev;
 181 +       struct mutex lock;              /* protects tx_buf and reg_cache */
 182 +       u16 tx_buf[8];
 183 +       u16 reg_cache[0xEE];
 184 +};
 185 +
 186 +#define JBT_COMMAND    0x000
 187 +#define JBT_DATA       0x100
 188 +
 189 +static int jbt_reg_write_nodata(struct jbt_info *jbt, u8 reg)
 190 +{
 191 +       int rc;
 192 +
 193 +       mutex_lock(&jbt->lock);
 194 +
 195 +       jbt->tx_buf[0] = JBT_COMMAND | reg;
 196 +       rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
 197 +                      1*sizeof(u16));
 198 +       if (rc == 0)
 199 +               jbt->reg_cache[reg] = 0;
 200 +
 201 +       mutex_unlock(&jbt->lock);
 202 +
 203 +       return rc;
 204 +}
 205 +
 206 +
 207 +static int jbt_reg_write(struct jbt_info *jbt, u8 reg, u8 data)
 208 +{
 209 +       int rc;
 210 +
 211 +       mutex_lock(&jbt->lock);
 212 +
 213 +       jbt->tx_buf[0] = JBT_COMMAND | reg;
 214 +       jbt->tx_buf[1] = JBT_DATA | data;
 215 +       rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
 216 +                      2*sizeof(u16));
 217 +       if (rc == 0)
 218 +               jbt->reg_cache[reg] = data;
 219 +
 220 +       mutex_unlock(&jbt->lock);
 221 +
 222 +       return rc;
 223 +}
 224 +
 225 +static int jbt_reg_write16(struct jbt_info *jbt, u8 reg, u16 data)
 226 +{
 227 +       int rc;
 228 +
 229 +       mutex_lock(&jbt->lock);
 230 +
 231 +       jbt->tx_buf[0] = JBT_COMMAND | reg;
 232 +       jbt->tx_buf[1] = JBT_DATA | (data >> 8);
 233 +       jbt->tx_buf[2] = JBT_DATA | (data & 0xff);
 234 +
 235 +       rc = spi_write(jbt->spi_dev, (u8 *)jbt->tx_buf,
 236 +                      3*sizeof(u16));
 237 +       if (rc == 0)
 238 +               jbt->reg_cache[reg] = data;
 239 +
 240 +       mutex_unlock(&jbt->lock);
 241 +
 242 +       return rc;
 243 +}
 244 +
 245 +static int jbt_init_regs(struct jbt_info *jbt, int qvga)
 246 +{
 247 +       int rc;
 248 +
 249 +       dev_dbg(&jbt->spi_dev->dev, "entering %cVGA mode\n", qvga ? 'Q' : ' ');
 250 +
 251 +       rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE1, 0x01);
 252 +       rc |= jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE2, 0x00);
 253 +       rc |= jbt_reg_write(jbt, JBT_REG_RGB_FORMAT, 0x60);
 254 +       rc |= jbt_reg_write(jbt, JBT_REG_DRIVE_SYSTEM, 0x10);
 255 +       rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_OP, 0x56);
 256 +       rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_MODE, 0x33);
 257 +       rc |= jbt_reg_write(jbt, JBT_REG_BOOSTER_FREQ, 0x11);
 258 +       rc |= jbt_reg_write(jbt, JBT_REG_OPAMP_SYSCLK, 0x02);
 259 +       rc |= jbt_reg_write(jbt, JBT_REG_VSC_VOLTAGE, 0x2b);
 260 +       rc |= jbt_reg_write(jbt, JBT_REG_VCOM_VOLTAGE, 0x40);
 261 +       rc |= jbt_reg_write(jbt, JBT_REG_EXT_DISPL, 0x03);
 262 +       rc |= jbt_reg_write(jbt, JBT_REG_DCCLK_DCEV, 0x04);
 263 +       /*
 264 +        * default of 0x02 in JBT_REG_ASW_SLEW responsible for 72Hz requirement
 265 +        * to avoid red / blue flicker
 266 +        */
 267 +       rc |= jbt_reg_write(jbt, JBT_REG_ASW_SLEW, 0x04);
 268 +       rc |= jbt_reg_write(jbt, JBT_REG_DUMMY_DISPLAY, 0x00);
 269 +
 270 +       rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_A, 0x11);
 271 +       rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_B, 0x11);
 272 +       rc |= jbt_reg_write(jbt, JBT_REG_SLEEP_OUT_FR_C, 0x11);
 273 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_D, 0x2040);
 274 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_E, 0x60c0);
 275 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_F, 0x1020);
 276 +       rc |= jbt_reg_write16(jbt, JBT_REG_SLEEP_IN_LCCNT_G, 0x60c0);
 277 +
 278 +       rc |= jbt_reg_write16(jbt, JBT_REG_GAMMA1_FINE_1, 0x5533);
 279 +       rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_FINE_2, 0x00);
 280 +       rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_INCLINATION, 0x00);
 281 +       rc |= jbt_reg_write(jbt, JBT_REG_GAMMA1_BLUE_OFFSET, 0x00);
 282 +
 283 +       if (!qvga) {
 284 +               rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_VGA, 0x1f0);
 285 +               rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL, 0x02);
 286 +               rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV, 0x0804);
 287 +
 288 +               rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF, 0x01);
 289 +               rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2, 0x0000);
 290 +
 291 +               rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING, 0x0d0e);
 292 +               rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1, 0x11a4);
 293 +               rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2, 0x0e);
 294 +       } else {
 295 +               rc |= jbt_reg_write16(jbt, JBT_REG_HCLOCK_QVGA, 0x00ff);
 296 +               rc |= jbt_reg_write(jbt, JBT_REG_BLANK_CONTROL_QVGA, 0x02);
 297 +               rc |= jbt_reg_write16(jbt, JBT_REG_BLANK_TH_TV_QVGA, 0x0804);
 298 +
 299 +               rc |= jbt_reg_write(jbt, JBT_REG_CKV_ON_OFF_QVGA, 0x01);
 300 +               rc |= jbt_reg_write16(jbt, JBT_REG_CKV_1_2_QVGA, 0x0008);
 301 +
 302 +               rc |= jbt_reg_write16(jbt, JBT_REG_OEV_TIMING_QVGA, 0x050a);
 303 +               rc |= jbt_reg_write16(jbt, JBT_REG_ASW_TIMING_1_QVGA, 0x0a19);
 304 +               rc |= jbt_reg_write(jbt, JBT_REG_ASW_TIMING_2_QVGA, 0x0a);
 305 +       }
 306 +
 307 +       return rc ? -EIO : 0;
 308 +}
 309 +
 310 +static int standby_to_sleep(struct jbt_info *jbt)
 311 +{
 312 +       int rc;
 313 +
 314 +       /* three times command zero */
 315 +       rc = jbt_reg_write_nodata(jbt, 0x00);
 316 +       mdelay(1);
 317 +       rc |= jbt_reg_write_nodata(jbt, 0x00);
 318 +       mdelay(1);
 319 +       rc |= jbt_reg_write_nodata(jbt, 0x00);
 320 +       mdelay(1);
 321 +
 322 +       /* deep standby out */
 323 +       rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x17);
 324 +
 325 +       return rc ? -EIO : 0;
 326 +}
 327 +
 328 +static int sleep_to_normal(struct jbt_info *jbt)
 329 +{
 330 +       int rc;
 331 +
 332 +       /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
 333 +       rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x80);
 334 +
 335 +       /* Quad mode off */
 336 +       rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x00);
 337 +
 338 +       /* AVDD on, XVDD on */
 339 +       rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
 340 +
 341 +       /* Output control */
 342 +       rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
 343 +
 344 +       /* Sleep mode off */
 345 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
 346 +
 347 +       /* initialize register set */
 348 +       rc |= jbt_init_regs(jbt, 0);
 349 +
 350 +       return rc ? -EIO : 0;
 351 +}
 352 +
 353 +static int sleep_to_qvga_normal(struct jbt_info *jbt)
 354 +{
 355 +       int rc;
 356 +
 357 +       /* RGB I/F on, RAM wirte off, QVGA through, SIGCON enable */
 358 +       rc = jbt_reg_write(jbt, JBT_REG_DISPLAY_MODE, 0x81);
 359 +
 360 +       /* Quad mode on */
 361 +       rc |= jbt_reg_write(jbt, JBT_REG_QUAD_RATE, 0x22);
 362 +
 363 +       /* AVDD on, XVDD on */
 364 +       rc |= jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x16);
 365 +
 366 +       /* Output control */
 367 +       rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0xfff9);
 368 +
 369 +       /* Sleep mode off */
 370 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_OUT);
 371 +
 372 +       /* initialize register set for qvga*/
 373 +       rc |= jbt_init_regs(jbt, 1);
 374 +
 375 +       return rc ? -EIO : 0;
 376 +}
 377 +
 378 +static int normal_to_sleep(struct jbt_info *jbt)
 379 +{
 380 +       int rc;
 381 +
 382 +       rc = jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
 383 +       rc |= jbt_reg_write16(jbt, JBT_REG_OUTPUT_CONTROL, 0x8002);
 384 +       rc |= jbt_reg_write_nodata(jbt, JBT_REG_SLEEP_IN);
 385 +
 386 +       return rc ? -EIO : 0;
 387 +}
 388 +
 389 +static int sleep_to_standby(struct jbt_info *jbt)
 390 +{
 391 +       return jbt_reg_write(jbt, JBT_REG_POWER_ON_OFF, 0x00);
 392 +}
 393 +
 394 +/* frontend function */
 395 +int jbt6k74_enter_state(struct jbt_info *jbt, enum jbt_state new_state)
 396 +{
 397 +       int rc = -EINVAL;
 398 +
 399 +       dev_dbg(&jbt->spi_dev->dev, "entering (old_state=%u, "
 400 +               "new_state=%u)\n", jbt->state, new_state);
 401 +
 402 +       switch (jbt->state) {
 403 +       case JBT_STATE_DEEP_STANDBY:
 404 +               switch (new_state) {
 405 +               case JBT_STATE_DEEP_STANDBY:
 406 +                       rc = 0;
 407 +                       break;
 408 +               case JBT_STATE_SLEEP:
 409 +                       rc = standby_to_sleep(jbt);
 410 +                       break;
 411 +               case JBT_STATE_NORMAL:
 412 +                       /* first transition into sleep */
 413 +                       rc = standby_to_sleep(jbt);
 414 +                       /* then transition into normal */
 415 +                       rc |= sleep_to_normal(jbt);
 416 +                       break;
 417 +               case JBT_STATE_QVGA_NORMAL:
 418 +                       /* first transition into sleep */
 419 +                       rc = standby_to_sleep(jbt);
 420 +                       /* then transition into normal */
 421 +                       rc |= sleep_to_qvga_normal(jbt);
 422 +                       break;
 423 +               }
 424 +               break;
 425 +       case JBT_STATE_SLEEP:
 426 +               switch (new_state) {
 427 +               case JBT_STATE_SLEEP:
 428 +                       rc = 0;
 429 +                       break;
 430 +               case JBT_STATE_DEEP_STANDBY:
 431 +                       rc = sleep_to_standby(jbt);
 432 +                       break;
 433 +               case JBT_STATE_NORMAL:
 434 +                       rc = sleep_to_normal(jbt);
 435 +                       break;
 436 +               case JBT_STATE_QVGA_NORMAL:
 437 +                       rc = sleep_to_qvga_normal(jbt);
 438 +                       break;
 439 +               }
 440 +               break;
 441 +       case JBT_STATE_NORMAL:
 442 +               switch (new_state) {
 443 +               case JBT_STATE_NORMAL:
 444 +                       rc = 0;
 445 +                       break;
 446 +               case JBT_STATE_DEEP_STANDBY:
 447 +                       /* first transition into sleep */
 448 +                       rc = normal_to_sleep(jbt);
 449 +                       /* then transition into deep standby */
 450 +                       rc |= sleep_to_standby(jbt);
 451 +                       break;
 452 +               case JBT_STATE_SLEEP:
 453 +                       rc = normal_to_sleep(jbt);
 454 +                       break;
 455 +               case JBT_STATE_QVGA_NORMAL:
 456 +                       /* first transition into sleep */
 457 +                       rc = normal_to_sleep(jbt);
 458 +                       /* second transition into deep standby */
 459 +                       rc |= sleep_to_standby(jbt);
 460 +                       /* third transition into sleep */
 461 +                       rc |= standby_to_sleep(jbt);
 462 +                       /* fourth transition into normal */
 463 +                       rc |= sleep_to_qvga_normal(jbt);
 464 +                       break;
 465 +               }
 466 +               break;
 467 +       case JBT_STATE_QVGA_NORMAL:
 468 +               switch (new_state) {
 469 +               case JBT_STATE_QVGA_NORMAL:
 470 +                       rc = 0;
 471 +                       break;
 472 +               case JBT_STATE_DEEP_STANDBY:
 473 +                       /* first transition into sleep */
 474 +                       rc = normal_to_sleep(jbt);
 475 +                       /* then transition into deep standby */
 476 +                       rc |= sleep_to_standby(jbt);
 477 +                       break;
 478 +               case JBT_STATE_SLEEP:
 479 +                       rc = normal_to_sleep(jbt);
 480 +                       break;
 481 +               case JBT_STATE_NORMAL:
 482 +                       /* first transition into sleep */
 483 +                       rc = normal_to_sleep(jbt);
 484 +                       /* second transition into deep standby */
 485 +                       rc |= sleep_to_standby(jbt);
 486 +                       /* third transition into sleep */
 487 +                       rc |= standby_to_sleep(jbt);
 488 +                       /* fourth transition into normal */
 489 +                       rc |= sleep_to_normal(jbt);
 490 +                       break;
 491 +               }
 492 +               break;
 493 +       }
 494 +       if (rc == 0)
 495 +               jbt->state = new_state;
 496 +
 497 +       return rc;
 498 +}
 499 +EXPORT_SYMBOL_GPL(jbt6k74_enter_state);
 500 +
 501 +int jbt6k74_display_onoff(struct jbt_info *jbt, int on)
 502 +{
 503 +       if (on)
 504 +               return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_ON);
 505 +       else
 506 +               return jbt_reg_write_nodata(jbt, JBT_REG_DISPLAY_OFF);
 507 +}
 508 +EXPORT_SYMBOL_GPL(jbt6k74_display_onoff);
 509 +
 510 +static ssize_t state_read(struct device *dev, struct device_attribute *attr,
 511 +                         char *buf)
 512 +{
 513 +       struct jbt_info *jbt = dev_get_drvdata(dev);
 514 +
 515 +       if (jbt->state >= ARRAY_SIZE(jbt_state_names))
 516 +               return -EIO;
 517 +
 518 +       return sprintf(buf, "%s\n", jbt_state_names[jbt->state]);
 519 +}
 520 +
 521 +static ssize_t state_write(struct device *dev, struct device_attribute *attr,
 522 +                          const char *buf, size_t count)
 523 +{
 524 +       struct jbt_info *jbt = dev_get_drvdata(dev);
 525 +       int i, rc;
 526 +
 527 +       for (i = 0; i < ARRAY_SIZE(jbt_state_names); i++) {
 528 +               if (!strncmp(buf, jbt_state_names[i],
 529 +                            strlen(jbt_state_names[i]))) {
 530 +                       rc = jbt6k74_enter_state(jbt, i);
 531 +                       if (rc)
 532 +                               return rc;
 533 +                       switch (i) {
 534 +                       case JBT_STATE_NORMAL:
 535 +                       case JBT_STATE_QVGA_NORMAL:
 536 +                               /* Enable display again after deep-standby */
 537 +                               rc = jbt6k74_display_onoff(jbt, 1);
 538 +                               if (rc)
 539 +                                       return rc;
 540 +                               break;
 541 +                       default:
 542 +                               break;
 543 +                       }
 544 +                       return count;
 545 +               }
 546 +       }
 547 +
 548 +       return -EINVAL;
 549 +}
 550 +
 551 +static DEVICE_ATTR(state, 0644, state_read, state_write);
 552 +
 553 +static int reg_by_string(const char *name)
 554 +{
 555 +       if (!strcmp(name, "gamma_fine1"))
 556 +               return JBT_REG_GAMMA1_FINE_1;
 557 +       else if (!strcmp(name, "gamma_fine2"))
 558 +               return JBT_REG_GAMMA1_FINE_2;
 559 +       else if (!strcmp(name, "gamma_inclination"))
 560 +               return JBT_REG_GAMMA1_INCLINATION;
 561 +       else
 562 +               return JBT_REG_GAMMA1_BLUE_OFFSET;
 563 +}
 564 +
 565 +static ssize_t gamma_read(struct device *dev, struct device_attribute *attr,
 566 +                         char *buf)
 567 +{
 568 +       struct jbt_info *jbt = dev_get_drvdata(dev);
 569 +       int reg = reg_by_string(attr->attr.name);
 570 +       u16 val;
 571 +
 572 +       mutex_lock(&jbt->lock);
 573 +       val = jbt->reg_cache[reg];
 574 +       mutex_unlock(&jbt->lock);
 575 +
 576 +       return sprintf(buf, "0x%04x\n", val);
 577 +}
 578 +
 579 +static ssize_t gamma_write(struct device *dev, struct device_attribute *attr,
 580 +                          const char *buf, size_t count)
 581 +{
 582 +       struct jbt_info *jbt = dev_get_drvdata(dev);
 583 +       int reg = reg_by_string(attr->attr.name);
 584 +       unsigned long val = simple_strtoul(buf, NULL, 10);
 585 +
 586 +       jbt_reg_write(jbt, reg, val & 0xff);
 587 +
 588 +       return count;
 589 +}
 590 +
 591 +static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write);
 592 +static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write);
 593 +static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write);
 594 +static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write);
 595 +
 596 +static struct attribute *jbt_sysfs_entries[] = {
 597 +       &dev_attr_state.attr,
 598 +       &dev_attr_gamma_fine1.attr,
 599 +       &dev_attr_gamma_fine2.attr,
 600 +       &dev_attr_gamma_inclination.attr,
 601 +       &dev_attr_gamma_blue_offset.attr,
 602 +       NULL,
 603 +};
 604 +
 605 +static struct attribute_group jbt_attr_group = {
 606 +       .name   = NULL,
 607 +       .attrs  = jbt_sysfs_entries,
 608 +};
 609 +
 610 +/* linux device model infrastructure */
 611 +
 612 +static int __devinit jbt_probe(struct spi_device *spi)
 613 +{
 614 +       int rc;
 615 +       struct jbt_info *jbt;
 616 +
 617 +       /* the controller doesn't have a MISO pin; we can't do detection */
 618 +
 619 +       spi->mode = SPI_CPOL | SPI_CPHA;
 620 +       spi->bits_per_word = 9;
 621 +
 622 +       rc = spi_setup(spi);
 623 +       if (rc < 0) {
 624 +               dev_err(&spi->dev,
 625 +                       "error during spi_setup of jbt6k74 driver\n");
 626 +               return rc;
 627 +       }
 628 +
 629 +       jbt = kzalloc(sizeof(*jbt), GFP_KERNEL);
 630 +       if (!jbt)
 631 +               return -ENOMEM;
 632 +
 633 +       jbt->spi_dev = spi;
 634 +       jbt->state = JBT_STATE_DEEP_STANDBY;
 635 +       mutex_init(&jbt->lock);
 636 +
 637 +       dev_set_drvdata(&spi->dev, jbt);
 638 +
 639 +       rc = jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
 640 +       if (rc < 0) {
 641 +               dev_err(&spi->dev, "cannot enter NORMAL state\n");
 642 +               goto err_free_drvdata;
 643 +       }
 644 +
 645 +       rc = jbt6k74_display_onoff(jbt, 1);
 646 +       if (rc < 0) {
 647 +               dev_err(&spi->dev, "cannot switch display on\n");
 648 +               goto err_standby;
 649 +       }
 650 +
 651 +       rc = sysfs_create_group(&spi->dev.kobj, &jbt_attr_group);
 652 +       if (rc < 0) {
 653 +               dev_err(&spi->dev, "cannot create sysfs group\n");
 654 +               goto err_off;
 655 +       }
 656 +
 657 +       return 0;
 658 +
 659 +err_off:
 660 +       jbt6k74_display_onoff(jbt, 0);
 661 +err_standby:
 662 +       jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
 663 +err_free_drvdata:
 664 +       dev_set_drvdata(&spi->dev, NULL);
 665 +       kfree(jbt);
 666 +
 667 +       return rc;
 668 +}
 669 +
 670 +static int __devexit jbt_remove(struct spi_device *spi)
 671 +{
 672 +       struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
 673 +
 674 +       /* We don't want to switch off the display in case the user
 675 +        * accidentially onloads the module (whose use count normally is 0) */
 676 +
 677 +       sysfs_remove_group(&spi->dev.kobj, &jbt_attr_group);
 678 +       dev_set_drvdata(&spi->dev, NULL);
 679 +       kfree(jbt);
 680 +
 681 +       return 0;
 682 +}
 683 +
 684 +#ifdef CONFIG_PM
 685 +static int jbt_suspend(struct spi_device *spi, pm_message_t state)
 686 +{
 687 +       struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
 688 +
 689 +       /* Save mode for resume */
 690 +       jbt->last_state = jbt->state;
 691 +       jbt6k74_enter_state(jbt, JBT_STATE_DEEP_STANDBY);
 692 +
 693 +       return 0;
 694 +}
 695 +
 696 +static int jbt_resume(struct spi_device *spi)
 697 +{
 698 +       struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
 699 +
 700 +       jbt6k74_enter_state(jbt, jbt->last_state);
 701 +
 702 +       switch (jbt->last_state) {
 703 +       case JBT_STATE_NORMAL:
 704 +       case JBT_STATE_QVGA_NORMAL:
 705 +               jbt6k74_display_onoff(jbt, 1);
 706 +               break;
 707 +       default:
 708 +               break;
 709 +       }
 710 +
 711 +       return 0;
 712 +}
 713 +#else
 714 +#define jbt_suspend    NULL
 715 +#define jbt_resume     NULL
 716 +#endif
 717 +
 718 +static struct spi_driver jbt6k74_driver = {
 719 +       .driver = {
 720 +               .name   = "jbt6k74",
 721 +               .owner  = THIS_MODULE,
 722 +       },
 723 +
 724 +       .probe   = jbt_probe,
 725 +       .remove  = __devexit_p(jbt_remove),
 726 +       .suspend = jbt_suspend,
 727 +       .resume  = jbt_resume,
 728 +};
 729 +
 730 +static int __init jbt_init(void)
 731 +{
 732 +       return spi_register_driver(&jbt6k74_driver);
 733 +}
 734 +
 735 +static void __exit jbt_exit(void)
 736 +{
 737 +       spi_unregister_driver(&jbt6k74_driver);
 738 +}
 739 +
 740 +MODULE_DESCRIPTION("SPI driver for tpo JBT6K74-AS LCM control interface");
 741 +MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>");
 742 +MODULE_LICENSE("GPL");
 743 +
 744 +module_init(jbt_init);
 745 +module_exit(jbt_exit);
 746 --
 747 1.5.6.5
 748