target/linux/s3c24xx/patches-2.6.24/1215-From-119f4e02ba81cffe4dbc88d8ff667048ad28d925-Mon-Se.patch

   1 From e2303161c93a90b966679b84c18838398b847d2c Mon Sep 17 00:00:00 2001
   2 From: Andrzej Zaborowski <balrog@zabor.org>
   3 Date: Wed, 2 Jul 2008 22:44:22 +0100
   4 Subject: [PATCH] From 119f4e02ba81cffe4dbc88d8ff667048ad28d925 Mon Sep 17 00:00:00 2001
   5  Subject: [PATCH] Hacky CONFIG_NO_IDLE_HZ (dyn-tick) support for S3C24xx.
   6
   7 ---
   8  arch/arm/plat-s3c24xx/time.c |  247 +++++++++++++++++++++++++++++++++++-------
   9  1 files changed, 209 insertions(+), 38 deletions(-)
  10
  11 diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c
  12 index 39fc33d..42d7111 100644
  13 --- a/arch/arm/plat-s3c24xx/time.c
  14 +++ b/arch/arm/plat-s3c24xx/time.c
  15 @@ -3,6 +3,8 @@
  16   * Copyright (C) 2003-2005 Simtec Electronics
  17   *     Ben Dooks, <ben@simtec.co.uk>
  18   *
  19 + * dyn_tick support by Andrzej Zaborowski based on omap_dyn_tick_timer.
  20 + *
  21   * This program is free software; you can redistribute it and/or modify
  22   * it under the terms of the GNU General Public License as published by
  23   * the Free Software Foundation; either version 2 of the License, or
  24 @@ -44,6 +46,9 @@ static unsigned long timer_startval;
  25  static unsigned long timer_usec_ticks;
  26  static struct work_struct resume_work;
  27
  28 +unsigned long pclk;
  29 +struct clk *clk;
  30 +
  31  #define TIMER_USEC_SHIFT 16
  32
  33  /* we use the shifted arithmetic to work out the ratio of timer ticks
  34 @@ -180,11 +185,7 @@ static void s3c2410_timer_setup (void)
  35                 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
  36                 tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
  37         } else {
  38 -               unsigned long pclk;
  39 -               struct clk *clk;
  40 -
  41 -               /* for the h1940 (and others), we use the pclk from the core
  42 -                * to generate the timer values. since values around 50 to
  43 +               /* since values around 50 to
  44                  * 70MHz are not values we can directly generate the timer
  45                  * value from, we need to pre-scale and divide before using it.
  46                  *
  47 @@ -192,20 +193,7 @@ static void s3c2410_timer_setup (void)
  48                  * (8.45 ticks per usec)
  49                  */
  50
  51 -               /* this is used as default if no other timer can be found */
  52 -
  53 -               clk = clk_get(NULL, "timers");
  54 -               if (IS_ERR(clk))
  55 -                       panic("failed to get clock for system timer");
  56 -
  57 -               clk_enable(clk);
  58 -
  59 -               pclk = clk_get_rate(clk);
  60 -
  61 -               printk("pclk = %lu\n", pclk);
  62 -
  63                 /* configure clock tick */
  64 -
  65                 timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
  66                 printk("timer_usec_ticks = %lu\n", timer_usec_ticks);
  67
  68 @@ -216,11 +204,6 @@ static void s3c2410_timer_setup (void)
  69                 tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT;
  70
  71                 tcnt = (pclk / 6) / HZ;
  72 -
  73 -               /* start the timer running */
  74 -               tcon |= S3C2410_TCON_T4START | S3C2410_TCON_T4RELOAD;
  75 -               tcon &= ~S3C2410_TCON_T4MANUALUPD;
  76 -               __raw_writel(tcon, S3C2410_TCON);
  77         }
  78
  79         /* timers reload after counting zero, so reduce the count by 1 */
  80 @@ -262,27 +245,37 @@ static void s3c2410_timer_setup (void)
  81
  82  }
  83
  84 +struct sys_timer s3c24xx_timer;
  85  static void timer_resume_work(struct work_struct *work)
  86  {
  87 -       s3c2410_timer_setup();
  88 -}
  89 -
  90 -/* ooh a nasty situation arises if we try to call s3c2410_timer_setup() from
  91 - * the resume handler.  It is called in atomic context but the clock APIs
  92 - * try to lock a mutex which may sleep.  We are in a bit of an unusual
  93 - * situation because we don't have a tick source right now, but it should be
  94 - * okay to try to schedule a work item... hopefully
  95 - */
  96 -
  97 -static void s3c2410_timer_resume_atomic(void)
  98 -{
  99 -       int ret = schedule_work(&resume_work);
 100 -       if (!ret)
 101 -               printk(KERN_INFO"Failed to schedule_work tick ctr (%d)\n", ret);
 102 +       clk_enable(clk);
 103 +
 104 +#ifdef CONFIG_NO_IDLE_HZ
 105 +       if (s3c24xx_timer.dyn_tick->state & DYN_TICK_ENABLED)
 106 +               s3c24xx_timer.dyn_tick->enable();
 107 +       else
 108 +#endif
 109 +               s3c2410_timer_setup();
 110  }
 111
 112  static void __init s3c2410_timer_init (void)
 113  {
 114 +       if (!use_tclk1_12()) {
 115 +               /* for the h1940 (and others), we use the pclk from the core
 116 +                * to generate the timer values.
 117 +                */
 118 +
 119 +               /* this is used as default if no other timer can be found */
 120 +               clk = clk_get(NULL, "timers");
 121 +               if (IS_ERR(clk))
 122 +                       panic("failed to get clock for system timer");
 123 +
 124 +               clk_enable(clk);
 125 +
 126 +               pclk = clk_get_rate(clk);
 127 +               printk("pclk = %lu\n", pclk);
 128 +       }
 129 +
 130         INIT_WORK(&resume_work, timer_resume_work);
 131         s3c2410_timer_setup();
 132         setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
 133 @@ -304,8 +297,186 @@ static void s3c2410_timer_resume(void)
 134                     "s3c2410_timer_resume_work already queued ???\n");
 135  }
 136
 137 +#ifdef CONFIG_NO_IDLE_HZ
 138 +/*
 139 + * We'll set a constant prescaler so we don't have to bother setting it
 140 + * when reprogramming and so that we avoid costly divisions.
 141 + *
 142 + * (2 * HZ) << INPUT_FREQ_SHIFT is the desired frequency after prescaler.
 143 + * At HZ == 200, HZ * 1024 should work for PCLKs of up to ~53.5 MHz.
 144 + */
 145 +#define INPUT_FREQ_SHIFT       9
 146 +
 147 +static int ticks_last;
 148 +static int ticks_left;
 149 +static uint32_t tcnto_last;
 150 +
 151 +static inline int s3c24xx_timer_read(void)
 152 +{
 153 +       uint32_t tcnto = __raw_readl(S3C2410_TCNTO(4));
 154 +
 155 +       /*
 156 +        * WARNING: sometimes we get called before TCNTB has been
 157 +        * loaded into the counter and TCNTO then returns its previous
 158 +        * value and kill us, so don't do anything before counter is
 159 +        * reloaded.
 160 +        */
 161 +       if (unlikely(tcnto == tcnto_last))
 162 +               return ticks_last;
 163 +
 164 +       tcnto_last = -1;
 165 +       return tcnto <<
 166 +               ((__raw_readl(S3C2410_TCFG1) >> S3C2410_TCFG1_MUX4_SHIFT) & 3);
 167 +}
 168 +
 169 +static inline void s3c24xx_timer_program(int ticks)
 170 +{
 171 +       uint32_t tcon = __raw_readl(S3C2410_TCON) & ~(7 << 20);
 172 +       uint32_t tcfg1 = __raw_readl(S3C2410_TCFG1) & ~S3C2410_TCFG1_MUX4_MASK;
 173 +
 174 +       /* Just make sure the timer is stopped.  */
 175 +       __raw_writel(tcon, S3C2410_TCON);
 176 +
 177 +       /* TODO: add likely()ies / unlikely()ies */
 178 +       if (ticks >> 18) {
 179 +               ticks_last = min(ticks, 0xffff << 3);
 180 +               ticks_left = ticks - ticks_last;
 181 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV16, S3C2410_TCFG1);
 182 +               __raw_writel(ticks_last >> 3, S3C2410_TCNTB(4));
 183 +       } else if (ticks >> 17) {
 184 +               ticks_last = ticks;
 185 +               ticks_left = 0;
 186 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV8, S3C2410_TCFG1);
 187 +               __raw_writel(ticks_last >> 2, S3C2410_TCNTB(4));
 188 +       } else if (ticks >> 16) {
 189 +               ticks_last = ticks;
 190 +               ticks_left = 0;
 191 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV4, S3C2410_TCFG1);
 192 +               __raw_writel(ticks_last >> 1, S3C2410_TCNTB(4));
 193 +       } else {
 194 +               ticks_last = ticks;
 195 +               ticks_left = 0;
 196 +               __raw_writel(tcfg1 | S3C2410_TCFG1_MUX4_DIV2, S3C2410_TCFG1);
 197 +               __raw_writel(ticks_last >> 0, S3C2410_TCNTB(4));
 198 +       }
 199 +
 200 +       tcnto_last = __raw_readl(S3C2410_TCNTO(4));
 201 +       __raw_writel(tcon | S3C2410_TCON_T4MANUALUPD,
 202 +                       S3C2410_TCON);
 203 +       __raw_writel(tcon | S3C2410_TCON_T4START,
 204 +                       S3C2410_TCON);
 205 +}
 206 +
 207 +/*
 208 + * If we have already waited all the time we were supposed to wait,
 209 + * kick the timer, setting the longest allowed timeout value just
 210 + * for time-keeping.
 211 + */
 212 +static inline void s3c24xx_timer_program_idle(void)
 213 +{
 214 +       s3c24xx_timer_program(0xffff << 3);
 215 +}
 216 +
 217 +static inline void s3c24xx_timer_update(int restart)
 218 +{
 219 +       int ticks_cur = s3c24xx_timer_read();
 220 +       int jiffies_elapsed = (ticks_last - ticks_cur) >> INPUT_FREQ_SHIFT;
 221 +       int subjiffy = ticks_last - (jiffies_elapsed << INPUT_FREQ_SHIFT);
 222 +
 223 +       if (restart) {
 224 +               if (ticks_left >= (1 << INPUT_FREQ_SHIFT))
 225 +                       s3c24xx_timer_program(ticks_left);
 226 +               else
 227 +                       s3c24xx_timer_program_idle();
 228 +               ticks_last += subjiffy;
 229 +       } else
 230 +               ticks_last = subjiffy;
 231 +
 232 +       while (jiffies_elapsed --)
 233 +               timer_tick();
 234 +}
 235 +
 236 +/* Called when the timer expires.  */
 237 +static irqreturn_t s3c24xx_timer_handler(int irq, void *dev_id)
 238 +{
 239 +       tcnto_last = -1;
 240 +       s3c24xx_timer_update(1);
 241 +
 242 +       return IRQ_HANDLED;
 243 +}
 244 +
 245 +/* Called to update jiffies with time elapsed.  */
 246 +static irqreturn_t s3c24xx_timer_handler_dyn_tick(int irq, void *dev_id)
 247 +{
 248 +       s3c24xx_timer_update(0);
 249 +
 250 +       return IRQ_HANDLED;
 251 +}
 252 +
 253 +/*
 254 + * Programs the next timer interrupt needed.  Called when dynamic tick is
 255 + * enabled, and to reprogram the ticks to skip from pm_idle.  The CPU goes
 256 + * to sleep directly after this.
 257 + */
 258 +static void s3c24xx_timer_reprogram_dyn_tick(unsigned long next_jiffies)
 259 +{
 260 +       int subjiffy_left = ticks_last - s3c24xx_timer_read();
 261 +
 262 +       s3c24xx_timer_program(max((int) next_jiffies, 1) << INPUT_FREQ_SHIFT);
 263 +       ticks_last += subjiffy_left;
 264 +}
 265 +
 266 +static unsigned long s3c24xx_timer_offset_dyn_tick(void)
 267 +{
 268 +       /* TODO */
 269 +       return 0;
 270 +}
 271 +
 272 +static int s3c24xx_timer_enable_dyn_tick(void)
 273 +{
 274 +       /* Set our constant prescaler.  */
 275 +       uint32_t tcfg0 = __raw_readl(S3C2410_TCFG0);
 276 +       int prescaler =
 277 +               max(min(256, (int) pclk / (HZ << (INPUT_FREQ_SHIFT + 1))), 1);
 278 +
 279 +       tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
 280 +       tcfg0 |= (prescaler - 1) << S3C2410_TCFG_PRESCALER1_SHIFT;
 281 +       __raw_writel(tcfg0, S3C2410_TCFG0);
 282 +
 283 +       /* Override handlers.  */
 284 +       s3c2410_timer_irq.handler = s3c24xx_timer_handler;
 285 +       s3c24xx_timer.offset = s3c24xx_timer_offset_dyn_tick;
 286 +
 287 +       printk(KERN_INFO "dyn_tick enabled on s3c24xx timer 4, "
 288 +                       "%li Hz pclk with prescaler %i\n", pclk, prescaler);
 289 +
 290 +       s3c24xx_timer_program_idle();
 291 +
 292 +       return 0;
 293 +}
 294 +
 295 +static int s3c24xx_timer_disable_dyn_tick(void)
 296 +{
 297 +       s3c2410_timer_irq.handler = s3c2410_timer_interrupt;
 298 +       s3c24xx_timer.offset = s3c2410_gettimeoffset;
 299 +       s3c2410_timer_setup();
 300 +
 301 +       return 0;
 302 +}
 303 +
 304 +static struct dyn_tick_timer s3c24xx_dyn_tick_timer = {
 305 +       .enable         = s3c24xx_timer_enable_dyn_tick,
 306 +       .disable        = s3c24xx_timer_disable_dyn_tick,
 307 +       .reprogram      = s3c24xx_timer_reprogram_dyn_tick,
 308 +       .handler        = s3c24xx_timer_handler_dyn_tick,
 309 +};
 310 +#endif /* CONFIG_NO_IDLE_HZ */
 311 +
 312  struct sys_timer s3c24xx_timer = {
 313         .init           = s3c2410_timer_init,
 314         .offset         = s3c2410_gettimeoffset,
 315         .resume         = s3c2410_timer_resume,
 316 +#ifdef CONFIG_NO_IDLE_HZ
 317 +       .dyn_tick       = &s3c24xx_dyn_tick_timer,
 318 +#endif
 319  };
 320 --
 321 1.5.6.5
 322