[storm] refresh patches
[openwrt/svn-archive/archive.git] / target / linux / storm / patches / 004-gmac_enable_napi.patch
1 --- a/drivers/net/sl351x_gmac.c
2 +++ b/drivers/net/sl351x_gmac.c
3 @@ -68,9 +68,11 @@
4 #include <linux/ip.h>
5 #endif
6
7 +/* Enables NAPI unconditionally */
8 +#define CONFIG_SL_NAPI 1
9 +
10 // #define SL351x_TEST_WORKAROUND
11 #ifdef CONFIG_SL351x_NAT
12 -#define CONFIG_SL_NAPI 1
13 #endif
14 #define GMAX_TX_INTR_DISABLED 1
15 #define DO_HW_CHKSUM 1
16 @@ -124,12 +126,17 @@ static char _debug_prefetch_buf[_DEBUG_P
17 *************************************************************/
18 static int gmac_initialized = 0;
19 TOE_INFO_T toe_private_data;
20 -//static int do_again = 0;
21 +static int do_again = 0;
22 spinlock_t gmac_fq_lock;
23 unsigned int FLAG_SWITCH;
24
25 static unsigned int next_tick = 3 * HZ;
26 -static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {{0x00,0x11,0x11,0x87,0x87,0x87}, {0x00,0x22,0x22,0xab,0xab,0xab}};
27 +static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {
28 + {0x00,0x11,0x11,0x87,0x87,0x87},
29 +#if GMAC_NUM != 1
30 + {0x00,0x22,0x22,0xab,0xab,0xab}
31 +#endif
32 +};
33
34 #undef CONFIG_SL351x_RXTOE
35 extern NAT_CFG_T nat_cfg;
36 @@ -2443,7 +2450,8 @@ static irqreturn_t toe_gmac_interrupt (i
37 toe = (TOE_INFO_T *)&toe_private_data;
38 // handle NAPI
39 #ifdef CONFIG_SL_NAPI
40 -if (storlink_ctl.pauseoff == 1)
41 + /* XXX: check this, changed from 'storlink_ctl.pauseoff == 1' to if (1) */
42 +if (1)
43 {
44 /* disable GMAC interrupt */
45 //toe_gmac_disable_interrupt(tp->irq);
46 @@ -2530,7 +2538,7 @@ if (storlink_ctl.pauseoff == 1)
47 {
48 if (likely(netif_rx_schedule_prep(dev)))
49 {
50 - unsigned int data32;
51 + // unsigned int data32;
52 // disable GMAC-0 rx interrupt
53 // class-Q & TOE-Q are implemented in future
54 //data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
55 @@ -2563,7 +2571,7 @@ if (storlink_ctl.pauseoff == 1)
56 {
57 if (likely(netif_rx_schedule_prep(dev)))
58 {
59 - unsigned int data32;
60 + // unsigned int data32;
61 // disable GMAC-0 rx interrupt
62 // class-Q & TOE-Q are implemented in future
63 //data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
64 @@ -4217,7 +4225,7 @@ static int gmac_rx_poll(struct net_devic
65 GMAC_INFO_T *tp = (GMAC_INFO_T *)dev->priv;
66 unsigned int status4;
67 volatile DMA_RWPTR_T fq_rwptr;
68 - int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
69 + // int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
70 //unsigned long rx_old_bytes;
71 struct net_device_stats *isPtr = (struct net_device_stats *)&tp->ifStatics;
72 //unsigned long long rx_time;
73 @@ -4479,7 +4487,7 @@ static int gmac_rx_poll(struct net_devic
74
75 if (rwptr.bits.rptr == rwptr.bits.wptr)
76 {
77 - unsigned int data32;
78 + // unsigned int data32;
79 //printk("%s:---[rwptr.bits.rptr == rwptr.bits.wptr] rx_pkts_num=%d------rwptr.bits.rptr=0x%x------->Default_Q [rwptr.bits.rptr(SW)=0x%x, rwptr.bits.wptr(HW) = 0x%x ]---->Free_Q(SW_HW) = 0x%8x \n",__func__,rx_pkts_num,rwptr.bits.rptr,rwptr.bits.rptr,rwptr.bits.wptr,fq_rwptr.bits32 );
80
81 /* Receive descriptor is empty now */