target/linux/sunxi/patches-4.1/126-2-dt-sun5i-add-nand-ctrlpin-defs.patch

   1 From a8ad7637cec0c2c2b1322d78b142beea4621dd23 Mon Sep 17 00:00:00 2001
   2 From: Hans de Goede <hdegoede@redhat.com>
   3 Date: Tue, 26 May 2015 17:18:26 +0200
   4 Subject: [PATCH] ARM: dts: sun5i: Add NAND controller pin definitions
   5
   6 Define the NAND controller pin configs.
   7
   8 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
   9 ---
  10  arch/arm/boot/dts/sun5i-a10s.dtsi | 14 ++++++++++++++
  11  arch/arm/boot/dts/sun5i.dtsi      | 38 ++++++++++++++++++++++++++++++++++++++
  12  2 files changed, 52 insertions(+)
  13
  14 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi
  15 +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
  16 @@ -656,4 +656,18 @@
  17                         clocks = <&ahb_gates 28>;
  18                 };
  19         };
  20 +
  21 +       nand_cs2_pins_a: nand_cs@2 {
  22 +               allwinner,pins = "PC17";
  23 +               allwinner,function = "nand0";
  24 +               allwinner,drive = <0>;
  25 +               allwinner,pull = <0>;
  26 +       };
  27 +
  28 +       nand_cs3_pins_a: nand_cs@3 {
  29 +               allwinner,pins = "PC18";
  30 +               allwinner,function = "nand0";
  31 +               allwinner,drive = <0>;
  32 +               allwinner,pull = <0>;
  33 +       };
  34  };
  35 --- a/arch/arm/boot/dts/sun5i-a13.dtsi
  36 +++ b/arch/arm/boot/dts/sun5i-a13.dtsi
  37 @@ -528,6 +528,44 @@
  38                                 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
  39                                 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
  40                         };
  41 +
  42 +                       nand_pins_a: nand_base0@0 {
  43 +                               allwinner,pins = "PC0", "PC1", "PC2",
  44 +                                               "PC5", "PC8", "PC9", "PC10",
  45 +                                               "PC11", "PC12", "PC13", "PC14",
  46 +                                               "PC15";
  47 +                               allwinner,function = "nand0";
  48 +                               allwinner,drive = <0>;
  49 +                               allwinner,pull = <0>;
  50 +                       };
  51 +
  52 +                       nand_cs0_pins_a: nand_cs@0 {
  53 +                               allwinner,pins = "PC4";
  54 +                               allwinner,function = "nand0";
  55 +                               allwinner,drive = <0>;
  56 +                               allwinner,pull = <0>;
  57 +                       };
  58 +
  59 +                       nand_cs1_pins_a: nand_cs@1 {
  60 +                               allwinner,pins = "PC3";
  61 +                               allwinner,function = "nand0";
  62 +                               allwinner,drive = <0>;
  63 +                               allwinner,pull = <0>;
  64 +                       };
  65 +
  66 +                       nand_rb0_pins_a: nand_rb@0 {
  67 +                               allwinner,pins = "PC6";
  68 +                               allwinner,function = "nand0";
  69 +                               allwinner,drive = <0>;
  70 +                               allwinner,pull = <0>;
  71 +                       };
  72 +
  73 +                       nand_rb1_pins_a: nand_rb@1 {
  74 +                               allwinner,pins = "PC7";
  75 +                               allwinner,function = "nand0";
  76 +                               allwinner,drive = <0>;
  77 +                               allwinner,pull = <0>;
  78 +                       };
  79                 };
  80
  81                 timer@01c20c00 {