1754de71b6c12f4fb9cd5d7ea5a5938783fa12ab
[openwrt/svn-archive/archive.git] / target / linux / xburst / patches-3.10 / 003-NAND-Add-support-for-subpage-reads-for-NAND_ECC_HW_O.patch
1 From 90e325c5e16db262818bca442b00f5ac10b9c852 Mon Sep 17 00:00:00 2001
2 From: Lars-Peter Clausen <lars@metafoo.de>
3 Date: Tue, 15 Mar 2011 12:33:41 +0100
4 Subject: [PATCH 03/16] NAND: Add support for subpage reads for
5 NAND_ECC_HW_OOB_FIRST
6
7 Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
8 ---
9 drivers/mtd/nand/nand_base.c | 80 ++++++++++++++++++++++++++++++++++++++++--
10 include/linux/mtd/nand.h | 2 +-
11 2 files changed, 78 insertions(+), 4 deletions(-)
12
13 --- a/drivers/mtd/nand/nand_base.c
14 +++ b/drivers/mtd/nand/nand_base.c
15 @@ -1118,7 +1118,7 @@ static int nand_read_page_swecc(struct m
16 * @bufpoi: buffer to store read data
17 */
18 static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
19 - uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
20 + uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
21 {
22 int start_step, end_step, num_steps;
23 uint32_t *eccpos = chip->ecc.layout->eccpos;
24 @@ -1311,6 +1311,75 @@ static int nand_read_page_hwecc_oob_firs
25 }
26
27 /**
28 + * nand_read_subpage_hwecc_oob_first - [REPLACABLE] hw ecc based sub-page read function
29 + * @mtd: mtd info structure
30 + * @chip: nand chip info structure
31 + * @data_offs: offset of requested data within the page
32 + * @readlen: data length
33 + * @bufpoi: buffer to store read data
34 + * @page: page number to read
35 + *
36 + * Hardware ECC for large page chips, require OOB to be read first.
37 + * For this ECC mode, the write_page method is re-used from ECC_HW.
38 + * These methods read/write ECC from the OOB area, unlike the
39 + * ECC_HW_SYNDROME support with multiple ECC steps, follows the
40 + * "infix ECC" scheme and reads/writes ECC from the data area, by
41 + * overwriting the NAND manufacturer bad block markings.
42 + */
43 +static int nand_read_subpage_hwecc_oob_first(struct mtd_info *mtd, struct nand_chip *chip,
44 + uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, int page)
45 +{
46 + int start_step, end_step, num_steps;
47 + uint32_t *eccpos = chip->ecc.layout->eccpos;
48 + uint8_t *p;
49 + int data_col_addr;
50 + int eccsize = chip->ecc.size;
51 + int eccbytes = chip->ecc.bytes;
52 + uint8_t *ecc_code = chip->buffers->ecccode;
53 + uint8_t *ecc_calc = chip->buffers->ecccalc;
54 + int i;
55 +
56 + /* Column address wihin the page aligned to ECC size */
57 + start_step = data_offs / chip->ecc.size;
58 + end_step = (data_offs + readlen - 1) / chip->ecc.size;
59 + num_steps = end_step - start_step + 1;
60 +
61 + data_col_addr = start_step * chip->ecc.size;
62 +
63 + /* Read the OOB area first */
64 + if (mtd->writesize > 512) {
65 + chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
66 + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
67 + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
68 + } else {
69 + chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
70 + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
71 + chip->cmdfunc(mtd, NAND_CMD_READ0, data_col_addr, page);
72 + }
73 +
74 + for (i = 0; i < chip->ecc.total; i++)
75 + ecc_code[i] = chip->oob_poi[eccpos[i]];
76 +
77 + p = bufpoi + data_col_addr;
78 +
79 + for (i = eccbytes * start_step; num_steps; num_steps--, i += eccbytes, p += eccsize) {
80 + int stat;
81 +
82 + chip->ecc.hwctl(mtd, NAND_ECC_READ);
83 + chip->read_buf(mtd, p, eccsize);
84 + chip->ecc.calculate(mtd, p, &ecc_calc[i]);
85 +
86 + stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
87 + if (stat < 0)
88 + mtd->ecc_stats.failed++;
89 + else
90 + mtd->ecc_stats.corrected += stat;
91 + }
92 +
93 + return 0;
94 +}
95 +
96 +/**
97 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
98 * @mtd: mtd info structure
99 * @chip: nand chip info structure
100 @@ -1477,7 +1546,7 @@ static int nand_do_read_ops(struct mtd_i
101 else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) &&
102 !oob)
103 ret = chip->ecc.read_subpage(mtd, chip,
104 - col, bytes, bufpoi);
105 + col, bytes, bufpoi, page);
106 else
107 ret = chip->ecc.read_page(mtd, chip, bufpoi,
108 oob_required, page);
109 @@ -3475,8 +3544,13 @@ int nand_scan_tail(struct mtd_info *mtd)
110 "hardware ECC not possible\n");
111 BUG();
112 }
113 - if (!chip->ecc.read_page)
114 + if (!chip->ecc.read_page) {
115 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
116 + if (!chip->ecc.read_subpage) {
117 + chip->ecc.read_subpage = nand_read_subpage_hwecc_oob_first;
118 + chip->options |= NAND_SUBPAGE_READ;
119 + }
120 + }
121
122 case NAND_ECC_HW:
123 /* Use standard hwecc read page function? */
124 --- a/include/linux/mtd/nand.h
125 +++ b/include/linux/mtd/nand.h
126 @@ -349,7 +349,7 @@ struct nand_ecc_ctrl {
127 int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
128 uint8_t *buf, int oob_required, int page);
129 int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
130 - uint32_t offs, uint32_t len, uint8_t *buf);
131 + uint32_t offs, uint32_t len, uint8_t *buf, int page);
132 int (*write_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
133 uint32_t offset, uint32_t data_len,
134 const uint8_t *data_buf, int oob_required);