1 From aff616f4a33bd3a9ab1506fdbe97fcfe285cb7b0 Mon Sep 17 00:00:00 2001
2 From: Paul Cercueil <paul@crapouillou.net>
3 Date: Thu, 13 Sep 2012 00:09:20 +0200
4 Subject: [PATCH 07/16] RTC: JZ4740: Init the "regulator" register on startup.
6 This register controls the accuracy of the RTC. uC/OS-II use
7 the RTC as a 100Hz clock, and writes a completely wrong value
8 on that register, that we have to overwrite if we want a working
11 Signed-off-by: Paul Cercueil <paul@crapouillou.net>
12 Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
14 drivers/rtc/rtc-jz4740.c | 17 +++++++++++++++++
15 1 file changed, 17 insertions(+)
17 diff --git a/drivers/rtc/rtc-jz4740.c b/drivers/rtc/rtc-jz4740.c
18 index 1e48686..722fb0c 100644
19 --- a/drivers/rtc/rtc-jz4740.c
20 +++ b/drivers/rtc/rtc-jz4740.c
25 +#include <linux/clk.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 @@ -215,6 +216,7 @@ static int jz4740_rtc_probe(struct platform_device *pdev)
31 struct jz4740_rtc *rtc;
33 + struct clk *rtc_clk;
35 rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
37 @@ -280,6 +282,21 @@ static int jz4740_rtc_probe(struct platform_device *pdev)
41 + rtc_clk = clk_get(&pdev->dev, "rtc");
42 + if (IS_ERR(rtc_clk)) {
43 + dev_err(&pdev->dev, "Failed to get RTC clock\n");
47 + /* TODO: initialize the ADJC bits (25:16) to fine-tune
48 + * the accuracy of the RTC */
49 + ret = jz4740_rtc_reg_write(rtc, JZ_REG_RTC_REGULATOR,
50 + (clk_get_rate(rtc_clk) - 1) & 0xffff);
54 + dev_warn(&pdev->dev, "Could not update RTC regulator register\n");