gcc: use the -sf suffix for musl ldso on powerpc
[openwrt/svn-archive/archive.git] / toolchain / musl / patches / 010-Add-PowerPC-soft-float-support.patch
1 From: Felix Fietkau <nbd@openwrt.org>
2 Date: Wed, 8 Jul 2015 13:56:37 +0200
3 Subject: [PATCH] Add PowerPC soft-float support
4
5 Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different
6 instruction set for floating point operations (SPE).
7 Executing regular PowerPC floating point instructions results in
8 "Illegal instruction" errors.
9
10 Make it possible to run these devices in soft-float mode.
11
12 Signed-off-by: Felix Fietkau <nbd@openwrt.org>
13 ---
14 create mode 100644 src/fenv/powerpc-sf/fenv.sub
15 create mode 100644 src/setjmp/powerpc-sf/longjmp.s
16 create mode 100644 src/setjmp/powerpc-sf/longjmp.sub
17 create mode 100644 src/setjmp/powerpc-sf/setjmp.s
18 create mode 100644 src/setjmp/powerpc-sf/setjmp.sub
19
20 --- a/arch/powerpc/reloc.h
21 +++ b/arch/powerpc/reloc.h
22 @@ -1,4 +1,10 @@
23 -#define LDSO_ARCH "powerpc"
24 +#ifdef _SOFT_FLOAT
25 +#define FP_SUFFIX "-sf"
26 +#else
27 +#define FP_SUFFIX ""
28 +#endif
29 +
30 +#define LDSO_ARCH "powerpc" FP_SUFFIX
31
32 #define TPOFF_K (-0x7000)
33
34 --- a/configure
35 +++ b/configure
36 @@ -498,6 +498,10 @@ trycppif "_MIPSEL || __MIPSEL || __MIPSE
37 trycppif __mips_soft_float "$t" && SUBARCH=${SUBARCH}-sf
38 fi
39
40 +if test "$ARCH" = "powerpc" ; then
41 +trycppif _SOFT_FLOAT "$t" && SUBARCH=${SUBARCH}-sf
42 +fi
43 +
44 test "$ARCH" = "microblaze" && trycppif __MICROBLAZEEL__ "$t" \
45 && SUBARCH=${SUBARCH}el
46
47 --- /dev/null
48 +++ b/src/fenv/powerpc-sf/fenv.sub
49 @@ -0,0 +1 @@
50 +../fenv.c
51 --- /dev/null
52 +++ b/src/setjmp/powerpc-sf/longjmp.s
53 @@ -0,0 +1,47 @@
54 + .global _longjmp
55 + .global longjmp
56 + .type _longjmp,@function
57 + .type longjmp,@function
58 +_longjmp:
59 +longjmp:
60 +# void longjmp(jmp_buf env, int val);
61 +# put val into return register and restore the env saved in setjmp
62 +# if val(r4) is 0, put 1 there.
63 + # 0) move old return address into r0
64 + lwz 0, 0(3)
65 + # 1) put it into link reg
66 + mtlr 0
67 + #2 ) restore stack ptr
68 + lwz 1, 4(3)
69 + #3) restore control reg
70 + lwz 0, 8(3)
71 + mtcr 0
72 + #4) restore r14-r31
73 + lwz 14, 12(3)
74 + lwz 15, 16(3)
75 + lwz 16, 20(3)
76 + lwz 17, 24(3)
77 + lwz 18, 28(3)
78 + lwz 19, 32(3)
79 + lwz 20, 36(3)
80 + lwz 21, 40(3)
81 + lwz 22, 44(3)
82 + lwz 23, 48(3)
83 + lwz 24, 52(3)
84 + lwz 25, 56(3)
85 + lwz 26, 60(3)
86 + lwz 27, 64(3)
87 + lwz 28, 68(3)
88 + lwz 29, 72(3)
89 + lwz 30, 76(3)
90 + lwz 31, 80(3)
91 + #5) put val into return reg r3
92 + mr 3, 4
93 +
94 + #6) check if return value is 0, make it 1 in that case
95 + cmpwi cr7, 4, 0
96 + bne cr7, 1f
97 + li 3, 1
98 +1:
99 + blr
100 +
101 --- /dev/null
102 +++ b/src/setjmp/powerpc-sf/longjmp.sub
103 @@ -0,0 +1 @@
104 +longjmp.s
105 --- /dev/null
106 +++ b/src/setjmp/powerpc-sf/setjmp.s
107 @@ -0,0 +1,43 @@
108 + .global ___setjmp
109 + .hidden ___setjmp
110 + .global __setjmp
111 + .global _setjmp
112 + .global setjmp
113 + .type __setjmp,@function
114 + .type _setjmp,@function
115 + .type setjmp,@function
116 +___setjmp:
117 +__setjmp:
118 +_setjmp:
119 +setjmp:
120 + # 0) store IP int 0, then into the jmpbuf pointed to by r3 (first arg)
121 + mflr 0
122 + stw 0, 0(3)
123 + # 1) store reg1 (SP)
124 + stw 1, 4(3)
125 + # 2) store cr
126 + mfcr 0
127 + stw 0, 8(3)
128 + # 3) store r14-31
129 + stw 14, 12(3)
130 + stw 15, 16(3)
131 + stw 16, 20(3)
132 + stw 17, 24(3)
133 + stw 18, 28(3)
134 + stw 19, 32(3)
135 + stw 20, 36(3)
136 + stw 21, 40(3)
137 + stw 22, 44(3)
138 + stw 23, 48(3)
139 + stw 24, 52(3)
140 + stw 25, 56(3)
141 + stw 26, 60(3)
142 + stw 27, 64(3)
143 + stw 28, 68(3)
144 + stw 29, 72(3)
145 + stw 30, 76(3)
146 + stw 31, 80(3)
147 + # 4) set return value to 0
148 + li 3, 0
149 + # 5) return
150 + blr
151 --- /dev/null
152 +++ b/src/setjmp/powerpc-sf/setjmp.sub
153 @@ -0,0 +1 @@
154 +setjmp.s