ath5k: fix restoring the mac timing setting after a sleep clock setting change

[openwrt/svn-archive/archive.git] / package / mac80211 / patches / 300-pending_work.patch

diff --git a/package/mac80211/patches/300-pending_work.patch b/package/mac80211/patches/300-pending_work.patch
index 4f9138cbc76c29491afdf18182bba03ca8514983..0900596dc980c44360dddf8c6b33304c00cd13c8 100644 (file)
--- a/package/mac80211/patches/300-pending_work.patch
+++ b/package/mac80211/patches/300-pending_work.patch
@@ -9,6 +9,19 @@
  
        mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
                                          IEEE80211_STYPE_ACTION);
+@@ -262,7 +264,11 @@ void ieee80211_process_addba_request(str
+                               "%pM on tid %u\n",
+                               mgmt->sa, tid);
+ #endif /* CONFIG_MAC80211_HT_DEBUG */
+-              goto end;
++
++              /* delete existing Rx BA session on the same tid */
++              ___ieee80211_stop_rx_ba_session(sta, tid, WLAN_BACK_RECIPIENT,
++                                              WLAN_STATUS_UNSPECIFIED_QOS,
++                                              false);
+       }
+ 
+       /* prepare A-MPDU MLME for Rx aggregation */
 --- a/net/mac80211/agg-tx.c
 +++ b/net/mac80211/agg-tx.c
 @@ -79,7 +79,8 @@ static void ieee80211_send_addba_request
@@ -334,7 +347,17 @@
  }
  
  static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
-@@ -2169,7 +2166,9 @@ static void ath_tx_complete_poll_work(st
+@@ -664,7 +661,8 @@ static int ath_compute_num_delims(struct
+        * TODO - this could be improved to be dependent on the rate.
+        *      The hardware can keep up at lower rates, but not higher rates
+        */
+-      if (fi->keyix != ATH9K_TXKEYIX_INVALID)
++      if ((fi->keyix != ATH9K_TXKEYIX_INVALID) &&
++          !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))
+               ndelim += ATH_AGGR_ENCRYPTDELIM;
+ 
+       /*
+@@ -2169,7 +2167,9 @@ static void ath_tx_complete_poll_work(st
        if (needreset) {
                ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
                        "tx hung, resetting the chip\n");