---- a/drivers/net/wireless/ath/ath.h
-+++ b/drivers/net/wireless/ath/ath.h
-@@ -71,9 +71,7 @@ struct ath_regulatory {
- char alpha2[2];
- u16 country_code;
- u16 max_power_level;
-- u32 tp_scale;
- u16 current_rd;
-- u16 current_rd_ext;
- int16_t power_limit;
- struct reg_dmn_pair_mapping *regpair;
- };
---- a/drivers/net/wireless/ath/ath9k/Makefile
-+++ b/drivers/net/wireless/ath/ath9k/Makefile
-@@ -21,6 +21,7 @@ ath9k_hw-y:= \
- ar5008_phy.o \
- ar9002_calib.o \
- ar9003_calib.o \
-+ ar9003_rtt.o \
- calib.o \
- eeprom.o \
- eeprom_def.o \
---- a/drivers/net/wireless/ath/ath9k/ani.c
-+++ b/drivers/net/wireless/ath/ath9k/ani.c
-@@ -504,9 +504,6 @@ static void ath9k_ani_reset_old(struct a
- ath9k_hw_ani_control(ah, ATH9K_ANI_CCK_WEAK_SIGNAL_THR,
- ATH9K_ANI_CCK_WEAK_SIG_THR);
-
-- ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) |
-- ATH9K_RX_FILTER_PHYERR);
--
- ath9k_ani_restart(ah);
- return;
+--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
++++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+@@ -210,8 +210,8 @@ ath5k_config(struct ieee80211_hw *hw, u3
}
-@@ -527,8 +524,6 @@ static void ath9k_ani_reset_old(struct a
- ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,
- aniState->firstepLevel);
-
-- ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) &
-- ~ATH9K_RX_FILTER_PHYERR);
- ath9k_ani_restart(ah);
-
- ENABLE_REGWRITE_BUFFER(ah);
---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-@@ -763,10 +763,8 @@ static void ar5008_hw_set_channel_regs(s
- static int ar5008_hw_process_ini(struct ath_hw *ah,
- struct ath9k_channel *chan)
+
+ if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
+- (ah->power_level != conf->power_level)) {
+- ah->power_level = conf->power_level;
++ (ah->ah_txpower.txp_requested != conf->power_level)) {
++ ah->ah_txpower.txp_requested = conf->power_level;
+
+ /* Half dB steps */
+ ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2));
+@@ -622,7 +622,7 @@ ath5k_conf_tx(struct ieee80211_hw *hw, s
+ qi.tqi_aifs = params->aifs;
+ qi.tqi_cw_min = params->cw_min;
+ qi.tqi_cw_max = params->cw_max;
+- qi.tqi_burst_time = params->txop;
++ qi.tqi_burst_time = params->txop * 32;
+
+ ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
+ "Configure tx [queue %d], "
+--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+@@ -26,106 +26,74 @@
+ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
{
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- struct ath_common *common = ath9k_hw_common(ah);
- int i, regWrites = 0;
-- struct ieee80211_channel *channel = chan->chan;
- u32 modesIndex, freqIndex;
-
- switch (chan->chanmode) {
-@@ -903,14 +901,7 @@ static int ar5008_hw_process_ini(struct
- ar5008_hw_set_channel_regs(ah, chan);
- ar5008_hw_init_chain_masks(ah);
- ath9k_olc_init(ah);
--
-- /* Set TX power */
-- ah->eep_ops->set_txpower(ah, chan,
-- ath9k_regd_get_ctl(regulatory, chan),
-- channel->max_antenna_gain * 2,
-- channel->max_power * 2,
-- min((u32) MAX_RATE_POWER,
-- (u32) regulatory->power_limit), false);
-+ ath9k_hw_apply_txpower(ah, chan);
-
- /* Write analog registers */
- if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
---- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
-@@ -24,11 +24,11 @@ static const u32 ar9300_2p2_radio_postam
- {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
- {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
- {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
-- {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0001610c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
- {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
-- {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0001650c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
- {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
-- {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0001690c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
- {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
- };
+ if (AR_SREV_9271(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
+- ARRAY_SIZE(ar9271Modes_9271), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
+- ARRAY_SIZE(ar9271Common_9271), 2);
+- INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
+- ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);
++ INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
++ INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
+ return;
+ }
-@@ -190,7 +190,7 @@ static const u32 ar9300_2p2_radio_core[]
- {0x00016288, 0x05a20408},
- {0x0001628c, 0x00038c07},
- {0x00016290, 0x00000004},
-- {0x00016294, 0x458aa14f},
-+ {0x00016294, 0x458a214f},
- {0x00016380, 0x00000000},
- {0x00016384, 0x00000000},
- {0x00016388, 0x00800700},
-@@ -835,107 +835,107 @@ static const u32 ar9300_2p2_baseband_cor
-
- static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
-- {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
-- {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
-+ {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
-+ {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
-- {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
-- {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
-- {0x0000a518, 0x21002220, 0x21002220, 0x16000402, 0x16000402},
-- {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
-- {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
-- {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
-- {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
-- {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
-- {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
-- {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
-- {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
-- {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
-- {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
-- {0x0000a544, 0x52022470, 0x52022470, 0x3f001861, 0x3f001861},
-- {0x0000a548, 0x55022490, 0x55022490, 0x43001a81, 0x43001a81},
-- {0x0000a54c, 0x59022492, 0x59022492, 0x47001a83, 0x47001a83},
-- {0x0000a550, 0x5d022692, 0x5d022692, 0x4a001c84, 0x4a001c84},
-- {0x0000a554, 0x61022892, 0x61022892, 0x4e001ce3, 0x4e001ce3},
-- {0x0000a558, 0x65024890, 0x65024890, 0x52001ce5, 0x52001ce5},
-- {0x0000a55c, 0x69024892, 0x69024892, 0x56001ce9, 0x56001ce9},
-- {0x0000a560, 0x6e024c92, 0x6e024c92, 0x5a001ceb, 0x5a001ceb},
-- {0x0000a564, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
-- {0x0000a568, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
-- {0x0000a56c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
-- {0x0000a570, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
-- {0x0000a574, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
-- {0x0000a578, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
-- {0x0000a57c, 0x74026e92, 0x74026e92, 0x5d001eec, 0x5d001eec},
-+ {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
-+ {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
-+ {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
-+ {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
-+ {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
-+ {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
-+ {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
-+ {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
-+ {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
-+ {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
-+ {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
-+ {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
-+ {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
-+ {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
-+ {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
-+ {0x0000a54c, 0x5a08442e, 0x5a08442e, 0x47001a83, 0x47001a83},
-+ {0x0000a550, 0x5e0a4431, 0x5e0a4431, 0x4a001c84, 0x4a001c84},
-+ {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
-+ {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
-+ {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
-+ {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
-+ {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
-+ {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
-+ {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
-+ {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
-+ {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
-+ {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
-+ {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
- {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
- {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
- {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
- {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
-- {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
-- {0x0000a594, 0x1c800223, 0x1c800223, 0x12800400, 0x12800400},
-- {0x0000a598, 0x21802220, 0x21802220, 0x16800402, 0x16800402},
-- {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
-- {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1c800603, 0x1c800603},
-- {0x0000a5a4, 0x2f822222, 0x2f822222, 0x21800a02, 0x21800a02},
-- {0x0000a5a8, 0x34822225, 0x34822225, 0x25800a04, 0x25800a04},
-- {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x28800a20, 0x28800a20},
-- {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2c800e20, 0x2c800e20},
-- {0x0000a5b4, 0x4282242a, 0x4282242a, 0x30800e22, 0x30800e22},
-- {0x0000a5b8, 0x4782244a, 0x4782244a, 0x34800e24, 0x34800e24},
-- {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x38801640, 0x38801640},
-- {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x3c801660, 0x3c801660},
-- {0x0000a5c4, 0x52822470, 0x52822470, 0x3f801861, 0x3f801861},
-- {0x0000a5c8, 0x55822490, 0x55822490, 0x43801a81, 0x43801a81},
-- {0x0000a5cc, 0x59822492, 0x59822492, 0x47801a83, 0x47801a83},
-- {0x0000a5d0, 0x5d822692, 0x5d822692, 0x4a801c84, 0x4a801c84},
-- {0x0000a5d4, 0x61822892, 0x61822892, 0x4e801ce3, 0x4e801ce3},
-- {0x0000a5d8, 0x65824890, 0x65824890, 0x52801ce5, 0x52801ce5},
-- {0x0000a5dc, 0x69824892, 0x69824892, 0x56801ce9, 0x56801ce9},
-- {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x5a801ceb, 0x5a801ceb},
-- {0x0000a5e4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
-- {0x0000a5e8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
-- {0x0000a5ec, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
-- {0x0000a5f0, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
-- {0x0000a5f4, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
-- {0x0000a5f8, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
-- {0x0000a5fc, 0x74826e92, 0x74826e92, 0x5d801eec, 0x5d801eec},
-+ {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
-+ {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
-+ {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
-+ {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
-+ {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
-+ {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
-+ {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
-+ {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
-+ {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
-+ {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
-+ {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
-+ {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
-+ {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
-+ {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
-+ {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
-+ {0x0000a5cc, 0x5a88442e, 0x5a88442e, 0x47801a83, 0x47801a83},
-+ {0x0000a5d0, 0x5e8a4431, 0x5e8a4431, 0x4a801c84, 0x4a801c84},
-+ {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
-+ {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
-+ {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
-+ {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
-+ {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
-+ {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
-+ {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
-+ {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
-+ {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
-+ {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
-+ {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
-- {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
-- {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
-- {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
-- {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
-- {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
-- {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
-- {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
-- {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
-- {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
-- {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
-- {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
-- {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
-- {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
-+ {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
-+ {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
-+ {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
-+ {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
-+ {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
-+ {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
-+ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
-+ {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
-+ {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
-+ {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
-+ {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
-+ {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
-+ {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
-+ {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
-+ {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
-+ {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
-- {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
-- {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
-+ {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
-+ {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
- {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
- {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
-- {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
-+ {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
- {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
- {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
-- {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
-+ {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
- {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
- {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
-- {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
-+ {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
- {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
- };
+ if (ah->config.pcie_clock_req)
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9280PciePhy_clkreq_off_L1_9280,
+- ARRAY_SIZE(ar9280PciePhy_clkreq_off_L1_9280), 2);
++ ar9280PciePhy_clkreq_off_L1_9280);
+ else
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9280PciePhy_clkreq_always_on_L1_9280,
+- ARRAY_SIZE(ar9280PciePhy_clkreq_always_on_L1_9280), 2);
++ ar9280PciePhy_clkreq_always_on_L1_9280);
+ #ifdef CONFIG_PM_SLEEP
+ INIT_INI_ARRAY(&ah->iniPcieSerdesWow,
+- ar9280PciePhy_awow,
+- ARRAY_SIZE(ar9280PciePhy_awow), 2);
++ ar9280PciePhy_awow);
+ #endif
---- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-@@ -17,8 +17,9 @@
- #include "hw.h"
- #include "hw-ops.h"
- #include "ar9003_phy.h"
-+#include "ar9003_rtt.h"
-
--#define MAX_MEASUREMENT 8
-+#define MAX_MEASUREMENT MAX_IQCAL_MEASUREMENT
- #define MAX_MAG_DELTA 11
- #define MAX_PHS_DELTA 10
-
-@@ -659,10 +660,12 @@ static void ar9003_hw_detect_outlier(int
-
- static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
- u8 num_chains,
-- struct coeff *coeff)
-+ struct coeff *coeff,
-+ bool is_reusable)
- {
- int i, im, nmeasurement;
- u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
-+ struct ath9k_hw_cal_data *caldata = ah->caldata;
-
- memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
- for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
-@@ -712,7 +715,13 @@ static void ar9003_hw_tx_iqcal_load_avg_
- REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
- AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
- coeff->iqc_coeff[0]);
-+
-+ if (caldata)
-+ caldata->tx_corr_coeff[im][i] =
-+ coeff->iqc_coeff[0];
+ if (AR_SREV_9287_11_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
+- ARRAY_SIZE(ar9287Modes_9287_1_1), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
+- ARRAY_SIZE(ar9287Common_9287_1_1), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1);
+ } else if (AR_SREV_9285_12_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
+- ARRAY_SIZE(ar9285Modes_9285_1_2), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
+- ARRAY_SIZE(ar9285Common_9285_1_2), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2);
+ } else if (AR_SREV_9280_20_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
+- ARRAY_SIZE(ar9280Modes_9280_2), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
+- ARRAY_SIZE(ar9280Common_9280_2), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2);
++ INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9280Modes_fast_clock_9280_2,
+- ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
++ ar9280Modes_fast_clock_9280_2);
+ } else if (AR_SREV_9160_10_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
+- ARRAY_SIZE(ar5416Modes_9160), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
+- ARRAY_SIZE(ar5416Common_9160), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160);
++ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160);
+ if (AR_SREV_9160_11(ah)) {
+ INIT_INI_ARRAY(&ah->iniAddac,
+- ar5416Addac_9160_1_1,
+- ARRAY_SIZE(ar5416Addac_9160_1_1), 2);
++ ar5416Addac_9160_1_1);
+ } else {
+- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160,
+- ARRAY_SIZE(ar5416Addac_9160), 2);
++ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9160);
}
-+ if (caldata)
-+ caldata->num_measures[i] = nmeasurement;
+ } else if (AR_SREV_9100_OR_LATER(ah)) {
+- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
+- ARRAY_SIZE(ar5416Modes_9100), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
+- ARRAY_SIZE(ar5416Common_9100), 2);
+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100,
+- ARRAY_SIZE(ar5416Bank6_9100), 3);
+- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100,
+- ARRAY_SIZE(ar5416Addac_9100), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
++ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
++ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
+ } else {
+- INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
+- ARRAY_SIZE(ar5416Modes), 5);
+- INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
+- ARRAY_SIZE(ar5416Common), 2);
+- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC,
+- ARRAY_SIZE(ar5416Bank6TPC), 3);
+- INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac,
+- ARRAY_SIZE(ar5416Addac), 2);
++ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
++ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
++ INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
++ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
}
- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
-@@ -720,8 +729,10 @@ static void ar9003_hw_tx_iqcal_load_avg_
- REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
- AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
+ if (!AR_SREV_9280_20_OR_LATER(ah)) {
+ /* Common for AR5416, AR913x, AR9160 */
+- INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain,
+- ARRAY_SIZE(ar5416BB_RfGain), 3);
++ INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
+
+- INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
+- ARRAY_SIZE(ar5416Bank0), 2);
+- INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1,
+- ARRAY_SIZE(ar5416Bank1), 2);
+- INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2,
+- ARRAY_SIZE(ar5416Bank2), 2);
+- INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3,
+- ARRAY_SIZE(ar5416Bank3), 3);
+- INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7,
+- ARRAY_SIZE(ar5416Bank7), 2);
++ INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
++ INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
++ INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
++ INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
++ INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
+
+ /* Common for AR5416, AR9160 */
+ if (!AR_SREV_9100(ah))
+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6,
+- ARRAY_SIZE(ar5416Bank6), 3);
++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
+
+ /* Common for AR913x, AR9160 */
+ if (!AR_SREV_5416(ah))
+- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC_9100,
+- ARRAY_SIZE(ar5416Bank6TPC_9100), 3);
++ INIT_INI_ARRAY(&ah->iniBank6TPC,
++ ar5416Bank6TPC_9100);
+ }
-- return;
-+ if (caldata)
-+ caldata->done_txiqcal_once = is_reusable;
+ /* iniAddac needs to be modified for these chips */
+@@ -148,13 +116,9 @@ static void ar9002_hw_init_mode_regs(str
+ }
+ if (AR_SREV_9287_11_OR_LATER(ah)) {
+ INIT_INI_ARRAY(&ah->iniCckfirNormal,
+- ar9287Common_normal_cck_fir_coeff_9287_1_1,
+- ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_9287_1_1),
+- 2);
++ ar9287Common_normal_cck_fir_coeff_9287_1_1);
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+- ar9287Common_japan_2484_cck_fir_coeff_9287_1_1,
+- ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_9287_1_1),
+- 2);
++ ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
+ }
+ }
-+ return;
+@@ -168,20 +132,16 @@ static void ar9280_20_hw_init_rxgain_ini
+
+ if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_backoff_13db_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);
++ ar9280Modes_backoff_13db_rxgain_9280_2);
+ else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_backoff_23db_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);
++ ar9280Modes_backoff_23db_rxgain_9280_2);
+ else
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_original_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
++ ar9280Modes_original_rxgain_9280_2);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9280Modes_original_rxgain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
++ ar9280Modes_original_rxgain_9280_2);
+ }
}
- static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
-@@ -748,7 +759,7 @@ static bool ar9003_hw_tx_iq_cal_run(stru
- return true;
+@@ -191,16 +151,13 @@ static void ar9280_20_hw_init_txgain_ini
+ AR5416_EEP_MINOR_VER_19) {
+ if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9280Modes_high_power_tx_gain_9280_2,
+- ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);
++ ar9280Modes_high_power_tx_gain_9280_2);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9280Modes_original_tx_gain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
++ ar9280Modes_original_tx_gain_9280_2);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9280Modes_original_tx_gain_9280_2,
+- ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
++ ar9280Modes_original_tx_gain_9280_2);
+ }
}
--static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah)
-+static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, bool is_reusable)
+@@ -208,12 +165,10 @@ static void ar9271_hw_init_txgain_ini(st
{
- struct ath_common *common = ath9k_hw_common(ah);
- const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
-@@ -837,7 +848,8 @@ static void ar9003_hw_tx_iq_cal_post_pro
- coeff.phs_coeff[i][im] -= 128;
- }
- }
-- ar9003_hw_tx_iqcal_load_avg_2_passes(ah, num_chains, &coeff);
-+ ar9003_hw_tx_iqcal_load_avg_2_passes(ah, num_chains,
-+ &coeff, is_reusable);
+ if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9271Modes_high_power_tx_gain_9271,
+- ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);
++ ar9271Modes_high_power_tx_gain_9271);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9271Modes_normal_power_tx_gain_9271,
+- ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);
++ ar9271Modes_normal_power_tx_gain_9271);
+ }
- return;
+ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
+@@ -222,8 +177,7 @@ static void ar9002_hw_init_mode_gain_reg
-@@ -845,11 +857,128 @@ tx_iqcal_fail:
- ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
- return;
- }
-+
-+static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah)
-+{
-+ struct ath9k_hw_cal_data *caldata = ah->caldata;
-+ u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
-+ int i, im;
-+
-+ memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
-+ for (i = 0; i < MAX_MEASUREMENT / 2; i++) {
-+ tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] =
-+ AR_PHY_TX_IQCAL_CORR_COEFF_B0(i);
-+ if (!AR_SREV_9485(ah)) {
-+ tx_corr_coeff[i * 2][1] =
-+ tx_corr_coeff[(i * 2) + 1][1] =
-+ AR_PHY_TX_IQCAL_CORR_COEFF_B1(i);
-+
-+ tx_corr_coeff[i * 2][2] =
-+ tx_corr_coeff[(i * 2) + 1][2] =
-+ AR_PHY_TX_IQCAL_CORR_COEFF_B2(i);
-+ }
-+ }
-+
-+ for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-+ if (!(ah->txchainmask & (1 << i)))
-+ continue;
-+
-+ for (im = 0; im < caldata->num_measures[i]; im++) {
-+ if ((im % 2) == 0)
-+ REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
-+ AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE,
-+ caldata->tx_corr_coeff[im][i]);
-+ else
-+ REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
-+ AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE,
-+ caldata->tx_corr_coeff[im][i]);
-+ }
-+ }
-+
-+ REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
-+ AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1);
-+ REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
-+ AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1);
-+}
-+
-+static bool ar9003_hw_rtt_restore(struct ath_hw *ah, struct ath9k_channel *chan)
-+{
-+ struct ath9k_rtt_hist *hist = &ah->caldata->rtt_hist;
-+ u32 *table;
-+ int i;
-+ bool restore;
-+
-+ if (!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT))
-+ return false;
-+
-+ ar9003_hw_rtt_enable(ah);
-+ ar9003_hw_rtt_set_mask(ah, 0x10);
-+ for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-+ if (!(ah->rxchainmask & (1 << i)))
-+ continue;
-+ table = &hist->table[i][hist->num_readings][0];
-+ ar9003_hw_rtt_load_hist(ah, i, table);
-+ }
-+ restore = ar9003_hw_rtt_force_restore(ah);
-+ ar9003_hw_rtt_disable(ah);
-+
-+ return restore;
-+}
-+
- static bool ar9003_hw_init_cal(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
- struct ath_common *common = ath9k_hw_common(ah);
-- bool txiqcal_done = false;
-+ struct ath9k_hw_cal_data *caldata = ah->caldata;
-+ bool txiqcal_done = false, txclcal_done = false;
-+ bool is_reusable = true, status = true;
-+ bool run_rtt_cal = false, run_agc_cal;
-+ bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
-+ u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
-+ AR_PHY_AGC_CONTROL_FLTR_CAL |
-+ AR_PHY_AGC_CONTROL_PKDET_CAL;
-+ int i, j;
-+ u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
-+ AR_PHY_CL_TAB_1,
-+ AR_PHY_CL_TAB_2 };
-+
-+ if (rtt) {
-+ if (!ar9003_hw_rtt_restore(ah, chan))
-+ run_rtt_cal = true;
-+
-+ ath_dbg(common, ATH_DBG_CALIBRATE, "RTT restore %s\n",
-+ run_rtt_cal ? "failed" : "succeed");
-+ }
-+ run_agc_cal = run_rtt_cal;
-+
-+ if (run_rtt_cal) {
-+ ar9003_hw_rtt_enable(ah);
-+ ar9003_hw_rtt_set_mask(ah, 0x00);
-+ ar9003_hw_rtt_clear_hist(ah);
-+ }
-+
-+ if (rtt && !run_rtt_cal) {
-+ agc_ctrl = REG_READ(ah, AR_PHY_AGC_CONTROL);
-+ agc_supp_cals &= agc_ctrl;
-+ agc_ctrl &= ~(AR_PHY_AGC_CONTROL_OFFSET_CAL |
-+ AR_PHY_AGC_CONTROL_FLTR_CAL |
-+ AR_PHY_AGC_CONTROL_PKDET_CAL);
-+ REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
-+ }
-+
-+ if (ah->enabled_cals & TX_CL_CAL) {
-+ if (caldata && caldata->done_txclcal_once)
-+ REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL,
-+ AR_PHY_CL_CAL_ENABLE);
-+ else {
-+ REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL,
-+ AR_PHY_CL_CAL_ENABLE);
-+ run_agc_cal = true;
-+ }
-+ }
-+
-+ if (!(ah->enabled_cals & TX_IQ_CAL))
-+ goto skip_tx_iqcal;
-
- /* Do Tx IQ Calibration */
- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
-@@ -860,30 +989,96 @@ static bool ar9003_hw_init_cal(struct at
- * For AR9485 or later chips, TxIQ cal runs as part of
- * AGC calibration
- */
-- if (AR_SREV_9485_OR_LATER(ah))
-- txiqcal_done = true;
-- else {
-- txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
-- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
-- udelay(5);
-- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
-- }
--
-- /* Calibrate the AGC */
-- REG_WRITE(ah, AR_PHY_AGC_CONTROL,
-- REG_READ(ah, AR_PHY_AGC_CONTROL) |
-- AR_PHY_AGC_CONTROL_CAL);
--
-- /* Poll for offset calibration complete */
-- if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
-- 0, AH_WAIT_TIMEOUT)) {
-+ if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
-+ if (caldata && !caldata->done_txiqcal_once)
-+ REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
-+ AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
-+ else
-+ REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
-+ AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
-+ txiqcal_done = run_agc_cal = true;
-+ goto skip_tx_iqcal;
-+ } else if (caldata && !caldata->done_txiqcal_once)
-+ run_agc_cal = true;
-+
-+ txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
-+ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
-+ udelay(5);
-+ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
-+
-+skip_tx_iqcal:
-+ if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
-+ /* Calibrate the AGC */
-+ REG_WRITE(ah, AR_PHY_AGC_CONTROL,
-+ REG_READ(ah, AR_PHY_AGC_CONTROL) |
-+ AR_PHY_AGC_CONTROL_CAL);
-+
-+ /* Poll for offset calibration complete */
-+ status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
-+ AR_PHY_AGC_CONTROL_CAL,
-+ 0, AH_WAIT_TIMEOUT);
-+ }
-+ if (rtt && !run_rtt_cal) {
-+ agc_ctrl |= agc_supp_cals;
-+ REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl);
-+ }
-+
-+ if (!status) {
-+ if (run_rtt_cal)
-+ ar9003_hw_rtt_disable(ah);
-+
- ath_dbg(common, ATH_DBG_CALIBRATE,
-- "offset calibration failed to complete in 1ms; noisy environment?\n");
-+ "offset calibration failed to complete in 1ms;"
-+ "noisy environment?\n");
- return false;
+ if (AR_SREV_9287_11_OR_LATER(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9287Modes_rx_gain_9287_1_1,
+- ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);
++ ar9287Modes_rx_gain_9287_1_1);
+ else if (AR_SREV_9280_20(ah))
+ ar9280_20_hw_init_rxgain_ini(ah);
+
+@@ -231,8 +185,7 @@ static void ar9002_hw_init_mode_gain_reg
+ ar9271_hw_init_txgain_ini(ah, txgain_type);
+ } else if (AR_SREV_9287_11_OR_LATER(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9287Modes_tx_gain_9287_1_1,
+- ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);
++ ar9287Modes_tx_gain_9287_1_1);
+ } else if (AR_SREV_9280_20(ah)) {
+ ar9280_20_hw_init_txgain_ini(ah, txgain_type);
+ } else if (AR_SREV_9285_12_OR_LATER(ah)) {
+@@ -240,26 +193,18 @@ static void ar9002_hw_init_mode_gain_reg
+ if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) {
+ if (AR_SREV_9285E_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_XE2_0_high_power,
+- ARRAY_SIZE(
+- ar9285Modes_XE2_0_high_power), 5);
++ ar9285Modes_XE2_0_high_power);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_high_power_tx_gain_9285_1_2,
+- ARRAY_SIZE(
+- ar9285Modes_high_power_tx_gain_9285_1_2), 5);
++ ar9285Modes_high_power_tx_gain_9285_1_2);
+ }
+ } else {
+ if (AR_SREV_9285E_20(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_XE2_0_normal_power,
+- ARRAY_SIZE(
+- ar9285Modes_XE2_0_normal_power), 5);
++ ar9285Modes_XE2_0_normal_power);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9285Modes_original_tx_gain_9285_1_2,
+- ARRAY_SIZE(
+- ar9285Modes_original_tx_gain_9285_1_2), 5);
++ ar9285Modes_original_tx_gain_9285_1_2);
+ }
+ }
+ }
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -131,8 +131,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -331,8 +332,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -704,8 +706,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -904,8 +907,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -1278,8 +1282,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -1478,8 +1483,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -1852,8 +1858,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80c080),
+ .papdRateMaskHt40 = LE32(0x0080c080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -2052,8 +2059,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -2425,8 +2433,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0c80C080),
+ .papdRateMaskHt40 = LE32(0x0080C080),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext1 = {
+@@ -2625,8 +2634,9 @@ static const struct ar9300_eeprom ar9300
+ .thresh62 = 28,
+ .papdRateMaskHt20 = LE32(0x0cf0e0e0),
+ .papdRateMaskHt40 = LE32(0x6cf0e0e0),
++ .xlna_bias_strength = 0,
+ .futureModal = {
+- 0, 0, 0, 0, 0, 0, 0, 0,
++ 0, 0, 0, 0, 0, 0, 0,
+ },
+ },
+ .base_ext2 = {
+@@ -2971,14 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
+ return (pBase->txrxMask >> 4) & 0xf;
+ case EEP_RX_MASK:
+ return pBase->txrxMask & 0xf;
+- case EEP_DRIVE_STRENGTH:
+-#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
+- return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
+- case EEP_INTERNAL_REGULATOR:
+- /* Bit 4 is internal regulator flag */
+- return (pBase->featureEnable & 0x10) >> 4;
+- case EEP_SWREG:
+- return le32_to_cpu(pBase->swreg);
+ case EEP_PAPRD:
+ return !!(pBase->featureEnable & BIT(5));
+ case EEP_CHAIN_MASK_REDUCE:
+@@ -2989,8 +2991,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
+ return eep->modalHeader5G.antennaGain;
+ case EEP_ANTENNA_GAIN_2G:
+ return eep->modalHeader2G.antennaGain;
+- case EEP_QUICK_DROP:
+- return pBase->miscConfiguration & BIT(1);
+ default:
+ return 0;
}
+@@ -3260,10 +3260,20 @@ static int ar9300_eeprom_restore_interna
+ int it;
+ u16 checksum, mchecksum;
+ struct ath_common *common = ath9k_hw_common(ah);
++ struct ar9300_eeprom *eep;
+ eeprom_read_op read;
- if (txiqcal_done)
-- ar9003_hw_tx_iq_cal_post_proc(ah);
-+ ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
-+ else if (caldata && caldata->done_txiqcal_once)
-+ ar9003_hw_tx_iq_cal_reload(ah);
-+
-+#define CL_TAB_ENTRY(reg_base) (reg_base + (4 * j))
-+ if (caldata && (ah->enabled_cals & TX_CL_CAL)) {
-+ txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
-+ AR_PHY_AGC_CONTROL_CLC_SUCCESS);
-+ if (caldata->done_txclcal_once) {
-+ for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-+ if (!(ah->txchainmask & (1 << i)))
-+ continue;
-+ for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
-+ REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
-+ caldata->tx_clcal[i][j]);
-+ }
-+ } else if (is_reusable && txclcal_done) {
-+ for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-+ if (!(ah->txchainmask & (1 << i)))
-+ continue;
-+ for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
-+ caldata->tx_clcal[i][j] =
-+ REG_READ(ah,
-+ CL_TAB_ENTRY(cl_idx[i]));
-+ }
-+ caldata->done_txclcal_once = true;
-+ }
-+ }
-+#undef CL_TAB_ENTRY
+- if (ath9k_hw_use_flash(ah))
+- return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
++ if (ath9k_hw_use_flash(ah)) {
++ u8 txrx;
+
-+ if (run_rtt_cal) {
-+ struct ath9k_rtt_hist *hist = &ah->caldata->rtt_hist;
-+ if (is_reusable && (hist->num_readings < RTT_HIST_MAX)) {
-+ u32 *table;
++ ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
+
-+ for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-+ if (!(ah->rxchainmask & (1 << i)))
-+ continue;
-+ table = &hist->table[i][hist->num_readings][0];
-+ ar9003_hw_rtt_fill_hist(ah, i, table);
-+ }
-+ }
-+
-+ ar9003_hw_rtt_disable(ah);
++ /* check if eeprom contains valid data */
++ eep = (struct ar9300_eeprom *) mptr;
++ txrx = eep->baseEepHeader.txrxMask;
++ if (txrx != 0 && txrx != 0xff)
++ return 0;
+ }
- ath9k_hw_loadnf(ah, chan);
- ath9k_hw_start_nfcal(ah, true);
-@@ -912,8 +1107,8 @@ static bool ar9003_hw_init_cal(struct at
- if (ah->cal_list_curr)
- ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
+ word = kzalloc(2048, GFP_KERNEL);
+ if (!word)
+@@ -3493,19 +3503,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
+ return 0;
+ }
-- if (ah->caldata)
-- ah->caldata->CalValid = 0;
-+ if (caldata)
-+ caldata->CalValid = 0;
+-static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
++static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
++ bool is2ghz)
+ {
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
- return true;
+ if (is2ghz)
+- return eep->modalHeader2G.xpaBiasLvl;
++ return &eep->modalHeader2G;
+ else
+- return eep->modalHeader5G.xpaBiasLvl;
++ return &eep->modalHeader5G;
}
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -2995,8 +2995,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- return get_unaligned_be16(eep->macAddr + 4);
- case EEP_REG_0:
- return le16_to_cpu(pBase->regDmn[0]);
-- case EEP_REG_1:
-- return le16_to_cpu(pBase->regDmn[1]);
- case EEP_OP_CAP:
- return pBase->deviceCap;
- case EEP_OP_MODE:
-@@ -3021,6 +3019,10 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- return (pBase->miscConfiguration >> 0x3) & 0x1;
- case EEP_ANT_DIV_CTL1:
- return eep->base_ext1.ant_div_control;
-+ case EEP_ANTENNA_GAIN_5G:
-+ return eep->modalHeader5G.antennaGain;
-+ case EEP_ANTENNA_GAIN_2G:
-+ return eep->modalHeader2G.antennaGain;
- default:
- return 0;
- }
-@@ -3554,7 +3556,7 @@ static void ar9003_hw_xpa_bias_level_app
+
+ static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
+ {
+- int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
++ int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
-- else if (AR_SREV_9480(ah))
-+ else if (AR_SREV_9462(ah))
- REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
- else {
- REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
-@@ -3633,20 +3635,20 @@ static void ar9003_hw_ant_ctrl_apply(str
-
- u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
-
-- if (AR_SREV_9480(ah)) {
-- if (AR_SREV_9480_10(ah)) {
-+ if (AR_SREV_9462(ah)) {
-+ if (AR_SREV_9462_10(ah)) {
- value &= ~AR_SWITCH_TABLE_COM_SPDT;
- value |= 0x00100000;
- }
- REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
-- AR_SWITCH_TABLE_COM_AR9480_ALL, value);
-+ AR_SWITCH_TABLE_COM_AR9462_ALL, value);
- } else
- REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
- AR_SWITCH_TABLE_COM_ALL, value);
+@@ -3521,57 +3532,26 @@ static void ar9003_hw_xpa_bias_level_app
+ }
+ }
+
+-static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
++static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le16 val;
+-
+- if (is_2ghz)
+- val = eep->modalHeader2G.switchcomspdt;
+- else
+- val = eep->modalHeader5G.switchcomspdt;
+- return le16_to_cpu(val);
++ return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
+ }
- /*
-- * AR9480 defines new switch table for BT/WLAN,
-+ * AR9462 defines new switch table for BT/WLAN,
- * here's new field name in XXX.ref for both 2G and 5G.
- * Register: [GLB_CONTROL] GLB_CONTROL (@0x20044)
- * 15:12 R/W SWITCH_TABLE_COM_SPDT_WLAN_RX
-@@ -3658,7 +3660,7 @@ static void ar9003_hw_ant_ctrl_apply(str
- * 7:4 R/W SWITCH_TABLE_COM_SPDT_WLAN_IDLE
- * SWITCH_TABLE_COM_SPDT_WLAN_IDLE
- */
-- if (AR_SREV_9480_20_OR_LATER(ah)) {
-+ if (AR_SREV_9462_20_OR_LATER(ah)) {
- value = ar9003_switch_com_spdt_get(ah, is2ghz);
- REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL,
- AR_SWITCH_TABLE_COM_SPDT_ALL, value);
-@@ -3907,7 +3909,7 @@ static void ar9003_hw_internal_regulator
- REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set);
- if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
- return;
-- } else if (AR_SREV_9480(ah)) {
-+ } else if (AR_SREV_9462(ah)) {
- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
- REG_WRITE(ah, AR_PHY_PMU1, reg_val);
- } else {
-@@ -3938,7 +3940,7 @@ static void ar9003_hw_internal_regulator
- while (!REG_READ_FIELD(ah, AR_PHY_PMU2,
- AR_PHY_PMU2_PGM))
- udelay(10);
-- } else if (AR_SREV_9480(ah))
-+ } else if (AR_SREV_9462(ah))
- REG_RMW_FIELD(ah, AR_PHY_PMU1, AR_PHY_PMU1_PWD, 0x1);
- else {
- reg_val = REG_READ(ah, AR_RTC_SLEEP_CLK) |
-@@ -4525,7 +4527,7 @@ static int ar9003_hw_power_control_overr
-
- REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
-
-- if (AR_SREV_9480_20(ah))
-+ if (AR_SREV_9462_20(ah))
- REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
- AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
-
-@@ -4764,20 +4766,14 @@ static u16 ar9003_hw_get_max_edge_power(
- static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
- struct ath9k_channel *chan,
- u8 *pPwrArray, u16 cfgCtl,
-- u8 twiceAntennaReduction,
-- u8 twiceMaxRegulatoryPower,
-+ u8 antenna_reduction,
- u16 powerLimit)
+ static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
{
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- struct ath_common *common = ath9k_hw_common(ah);
- struct ar9300_eeprom *pEepData = &ah->eeprom.ar9300_eep;
- u16 twiceMaxEdgePower = MAX_RATE_POWER;
-- static const u16 tpScaleReductionTable[5] = {
-- 0, 3, 6, 9, MAX_RATE_POWER
-- };
- int i;
-- int16_t twiceLargestAntenna;
-- u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+ u16 scaledPower = 0, minCtlPower;
- static const u16 ctlModesFor11a[] = {
- CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
- };
-@@ -4795,28 +4791,7 @@ static void ar9003_hw_set_power_per_rate
- bool is2ghz = IS_CHAN_2GHZ(chan);
-
- ath9k_hw_get_channel_centers(ah, chan, ¢ers);
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le32 val;
-
-- /* Compute TxPower reduction due to Antenna Gain */
- if (is2ghz)
-- twiceLargestAntenna = pEepData->modalHeader2G.antennaGain;
+- val = eep->modalHeader2G.antCtrlCommon;
- else
-- twiceLargestAntenna = pEepData->modalHeader5G.antennaGain;
--
-- twiceLargestAntenna = (int16_t)min((twiceAntennaReduction) -
-- twiceLargestAntenna, 0);
+- val = eep->modalHeader5G.antCtrlCommon;
+- return le32_to_cpu(val);
++ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
+ }
+
+ static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le32 val;
-
-- /*
-- * scaledPower is the minimum of the user input power level
-- * and the regulatory allowed power level
-- */
-- maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
+- if (is2ghz)
+- val = eep->modalHeader2G.antCtrlCommon2;
+- else
+- val = eep->modalHeader5G.antCtrlCommon2;
+- return le32_to_cpu(val);
++ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
+ }
+
+-static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
+- int chain,
++static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
+ bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- __le16 val = 0;
-
-- if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
-- maxRegAllowedPower -=
-- (tpScaleReductionTable[(regulatory->tp_scale)] * 2);
+- if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
+- if (is2ghz)
+- val = eep->modalHeader2G.antCtrlChain[chain];
+- else
+- val = eep->modalHeader5G.antCtrlChain[chain];
- }
-
-- scaledPower = min(powerLimit, maxRegAllowedPower);
-+ scaledPower = powerLimit - antenna_reduction;
++ __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
+ return le16_to_cpu(val);
+ }
- /*
- * Reduce scaled Power by number of chains active to get
-@@ -5003,7 +4978,6 @@ static inline u8 mcsidx_to_tgtpwridx(uns
- static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
- struct ath9k_channel *chan, u16 cfgCtl,
- u8 twiceAntennaReduction,
-- u8 twiceMaxRegulatoryPower,
- u8 powerLimit, bool test)
+@@ -3681,11 +3661,12 @@ static void ar9003_hw_ant_ctrl_apply(str
+
+ static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
+ {
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
+ int drive_strength;
+ unsigned long reg;
+
+- drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
+-
++ drive_strength = pBase->miscConfiguration & BIT(0);
+ if (!drive_strength)
+ return;
+
+@@ -3815,11 +3796,11 @@ static bool is_pmu_set(struct ath_hw *ah
+
+ void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
+ {
+- int internal_regulator =
+- ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
+ u32 reg_val;
+
+- if (internal_regulator) {
++ if (pBase->featureEnable & BIT(4)) {
+ if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
+ int reg_pmu_set;
+
+@@ -3863,11 +3844,11 @@ void ar9003_hw_internal_regulator_apply(
+ if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
+ return;
+ } else if (AR_SREV_9462(ah)) {
+- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
++ reg_val = le32_to_cpu(pBase->swreg);
+ REG_WRITE(ah, AR_PHY_PMU1, reg_val);
+ } else {
+ /* Internal regulator is ON. Write swreg register. */
+- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
++ reg_val = le32_to_cpu(pBase->swreg);
+ REG_WRITE(ah, AR_RTC_REG_CONTROL1,
+ REG_READ(ah, AR_RTC_REG_CONTROL1) &
+ (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
+@@ -3909,6 +3890,9 @@ static void ar9003_hw_apply_tuning_caps(
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
+
++ if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
++ return;
++
+ if (eep->baseEepHeader.featureEnable & 0x40) {
+ tuning_caps_param &= 0x7f;
+ REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
+@@ -3921,10 +3905,11 @@ static void ar9003_hw_apply_tuning_caps(
+ static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
+ {
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
++ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
++ int quick_drop;
+ s32 t[3], f[3] = {5180, 5500, 5785};
+
+- if (!quick_drop)
++ if (!(pBase->miscConfiguration & BIT(1)))
+ return;
+
+ if (freq < 4000)
+@@ -3938,13 +3923,11 @@ static void ar9003_hw_quick_drop_apply(s
+ REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
+ }
+
+-static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
++static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
+ {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+ u32 value;
+
+- value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
+- eep->modalHeader5G.txEndToXpaOff;
++ value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
+
+ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
+ AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
+@@ -3952,19 +3935,63 @@ static void ar9003_hw_txend_to_xpa_off_a
+ AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
+ }
+
++static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
++{
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ u8 xpa_ctl;
++
++ if (!(eep->baseEepHeader.featureEnable & 0x80))
++ return;
++
++ if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
++ return;
++
++ xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
++ if (is2ghz)
++ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
++ AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
++ else
++ REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
++ AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
++}
++
++static void ar9003_hw_xlna_bias_strength_apply(struct ath_hw *ah, bool is2ghz)
++{
++ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
++ u8 bias;
++
++ if (!(eep->baseEepHeader.featureEnable & 0x40))
++ return;
++
++ if (!AR_SREV_9300(ah))
++ return;
++
++ bias = ar9003_modal_header(ah, is2ghz)->xlna_bias_strength;
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
++ bias & 0x3);
++ bias >>= 2;
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
++ bias & 0x3);
++ bias >>= 2;
++ REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX4, AR_PHY_65NM_RXTX4_XLNA_BIAS,
++ bias & 0x3);
++}
++
+ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
+ struct ath9k_channel *chan)
+ {
+- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
+- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
++ bool is2ghz = IS_CHAN_2GHZ(chan);
++ ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
++ ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
++ ar9003_hw_ant_ctrl_apply(ah, is2ghz);
+ ar9003_hw_drive_strength_apply(ah);
++ ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
+ ar9003_hw_atten_apply(ah, chan);
+ ar9003_hw_quick_drop_apply(ah, chan->channel);
+ if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
+ ar9003_hw_internal_regulator_apply(ah);
+- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
+- ar9003_hw_apply_tuning_caps(ah);
+- ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
++ ar9003_hw_apply_tuning_caps(ah);
++ ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
+ }
+
+ static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
+@@ -5100,14 +5127,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
+ return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
+ }
+
+-u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
++u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
{
- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-@@ -5056,7 +5030,6 @@ static void ath9k_hw_ar9300_set_txpower(
- ar9003_hw_set_power_per_rate_table(ah, chan,
- targetPowerValT2, cfgCtl,
- twiceAntennaReduction,
-- twiceMaxRegulatoryPower,
- powerLimit);
-
- if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD)) {
+- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+-
+- if (is_2ghz)
+- return eep->modalHeader2G.spurChans;
+- else
+- return eep->modalHeader5G.spurChans;
++ return ar9003_modal_header(ah, is2ghz)->spurChans;
+ }
+
+ unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+@@ -231,7 +231,8 @@ struct ar9300_modal_eep_header {
+ __le32 papdRateMaskHt20;
+ __le32 papdRateMaskHt40;
+ __le16 switchcomspdt;
+- u8 futureModal[8];
++ u8 xlna_bias_strength;
++ u8 futureModal[7];
+ } __packed;
+
+ struct ar9300_cal_data_per_freq_op_loop {
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
-@@ -22,8 +22,8 @@
- #include "ar9330_1p1_initvals.h"
- #include "ar9330_1p2_initvals.h"
- #include "ar9580_1p0_initvals.h"
--#include "ar9480_1p0_initvals.h"
--#include "ar9480_2p0_initvals.h"
-+#include "ar9462_1p0_initvals.h"
-+#include "ar9462_2p0_initvals.h"
-
- /* General hardware code for the AR9003 hadware family */
-
-@@ -35,13 +35,13 @@
- static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
- {
- #define PCIE_PLL_ON_CREQ_DIS_L1_2P0 \
-- ar9480_pciephy_pll_on_clkreq_disable_L1_2p0
-+ ar9462_pciephy_pll_on_clkreq_disable_L1_2p0
-
--#define AR9480_BB_CTX_COEFJ(x) \
-- ar9480_##x##_baseband_core_txfir_coeff_japan_2484
-+#define AR9462_BB_CTX_COEFJ(x) \
-+ ar9462_##x##_baseband_core_txfir_coeff_japan_2484
-
--#define AR9480_BBC_TXIFR_COEFFJ \
-- ar9480_2p0_baseband_core_txfir_coeff_japan_2484
-+#define AR9462_BBC_TXIFR_COEFFJ \
-+ ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+@@ -44,462 +44,310 @@ static void ar9003_hw_init_mode_regs(str
+ ar9462_2p0_baseband_core_txfir_coeff_japan_2484
if (AR_SREV_9330_11(ah)) {
/* mac */
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
-@@ -264,107 +264,107 @@ static void ar9003_hw_init_mode_regs(str
- ar9485_1_1_pcie_phy_clkreq_disable_L1,
- ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
- 2);
-- } else if (AR_SREV_9480_10(ah)) {
-+ } else if (AR_SREV_9462_10(ah)) {
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_1p0_mac_core,
-- ARRAY_SIZE(ar9480_1p0_mac_core), 2);
-+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_1p0_mac_core,
-+ ARRAY_SIZE(ar9462_1p0_mac_core), 2);
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9331_1p1_mac_core,
+- ARRAY_SIZE(ar9331_1p1_mac_core), 2);
++ ar9331_1p1_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9331_1p1_mac_postamble,
+- ARRAY_SIZE(ar9331_1p1_mac_postamble), 5);
++ ar9331_1p1_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9331_1p1_baseband_core,
+- ARRAY_SIZE(ar9331_1p1_baseband_core), 2);
++ ar9331_1p1_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9331_1p1_baseband_postamble,
+- ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5);
++ ar9331_1p1_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9331_1p1_radio_core,
+- ARRAY_SIZE(ar9331_1p1_radio_core), 2);
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
++ ar9331_1p1_radio_core);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9331_1p1_soc_preamble,
+- ARRAY_SIZE(ar9331_1p1_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9331_1p1_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9331_1p1_soc_postamble,
+- ARRAY_SIZE(ar9331_1p1_soc_postamble), 2);
++ ar9331_1p1_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_rx_gain_1p1,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2);
++ ar9331_common_rx_gain_1p1);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p1);
+
+ /* additional clock settings */
+ if (ah->is_clk_25mhz)
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p1_xtal_25M,
+- ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
++ ar9331_1p1_xtal_25M);
+ else
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p1_xtal_40M,
+- ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
++ ar9331_1p1_xtal_40M);
+ } else if (AR_SREV_9330_12(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9331_1p2_mac_core,
+- ARRAY_SIZE(ar9331_1p2_mac_core), 2);
++ ar9331_1p2_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9331_1p2_mac_postamble,
+- ARRAY_SIZE(ar9331_1p2_mac_postamble), 5);
++ ar9331_1p2_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9331_1p2_baseband_core,
+- ARRAY_SIZE(ar9331_1p2_baseband_core), 2);
++ ar9331_1p2_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9331_1p2_baseband_postamble,
+- ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5);
++ ar9331_1p2_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9331_1p2_radio_core,
+- ARRAY_SIZE(ar9331_1p2_radio_core), 2);
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0);
++ ar9331_1p2_radio_core);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9331_1p2_soc_preamble,
+- ARRAY_SIZE(ar9331_1p2_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9331_1p2_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9331_1p2_soc_postamble,
+- ARRAY_SIZE(ar9331_1p2_soc_postamble), 2);
++ ar9331_1p2_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_rx_gain_1p2,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2);
++ ar9331_common_rx_gain_1p2);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p2);
+
+ /* additional clock settings */
+ if (ah->is_clk_25mhz)
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p2_xtal_25M,
+- ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
++ ar9331_1p2_xtal_25M);
+ else
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9331_1p2_xtal_40M,
+- ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
++ ar9331_1p2_xtal_40M);
+ } else if (AR_SREV_9340(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9340_1p0_mac_core,
+- ARRAY_SIZE(ar9340_1p0_mac_core), 2);
++ ar9340_1p0_mac_core);
INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9480_1p0_mac_postamble,
-- ARRAY_SIZE(ar9480_1p0_mac_postamble),
-+ ar9462_1p0_mac_postamble,
-+ ARRAY_SIZE(ar9462_1p0_mac_postamble),
- 5);
+- ar9340_1p0_mac_postamble,
+- ARRAY_SIZE(ar9340_1p0_mac_postamble), 5);
++ ar9340_1p0_mac_postamble);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9480_1p0_baseband_core,
-- ARRAY_SIZE(ar9480_1p0_baseband_core),
-+ ar9462_1p0_baseband_core,
-+ ARRAY_SIZE(ar9462_1p0_baseband_core),
- 2);
+- ar9340_1p0_baseband_core,
+- ARRAY_SIZE(ar9340_1p0_baseband_core), 2);
++ ar9340_1p0_baseband_core);
INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9480_1p0_baseband_postamble,
-- ARRAY_SIZE(ar9480_1p0_baseband_postamble), 5);
-+ ar9462_1p0_baseband_postamble,
-+ ARRAY_SIZE(ar9462_1p0_baseband_postamble), 5);
+- ar9340_1p0_baseband_postamble,
+- ARRAY_SIZE(ar9340_1p0_baseband_postamble), 5);
++ ar9340_1p0_baseband_postamble);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9480_1p0_radio_core,
-- ARRAY_SIZE(ar9480_1p0_radio_core), 2);
-+ ar9462_1p0_radio_core,
-+ ARRAY_SIZE(ar9462_1p0_radio_core), 2);
+- ar9340_1p0_radio_core,
+- ARRAY_SIZE(ar9340_1p0_radio_core), 2);
++ ar9340_1p0_radio_core);
INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar9480_1p0_radio_postamble,
-- ARRAY_SIZE(ar9480_1p0_radio_postamble), 5);
-+ ar9462_1p0_radio_postamble,
-+ ARRAY_SIZE(ar9462_1p0_radio_postamble), 5);
+- ar9340_1p0_radio_postamble,
+- ARRAY_SIZE(ar9340_1p0_radio_postamble), 5);
++ ar9340_1p0_radio_postamble);
+ /* soc */
INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9480_1p0_soc_preamble,
-- ARRAY_SIZE(ar9480_1p0_soc_preamble), 2);
-+ ar9462_1p0_soc_preamble,
-+ ARRAY_SIZE(ar9462_1p0_soc_preamble), 2);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
+- ar9340_1p0_soc_preamble,
+- ARRAY_SIZE(ar9340_1p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9340_1p0_soc_preamble);
INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9480_1p0_soc_postamble,
-- ARRAY_SIZE(ar9480_1p0_soc_postamble), 5);
-+ ar9462_1p0_soc_postamble,
-+ ARRAY_SIZE(ar9462_1p0_soc_postamble), 5);
+- ar9340_1p0_soc_postamble,
+- ARRAY_SIZE(ar9340_1p0_soc_postamble), 5);
++ ar9340_1p0_soc_postamble);
+ /* rx/tx gain */
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_rx_gain_table_1p0,
-- ARRAY_SIZE(ar9480_common_rx_gain_table_1p0), 2);
-+ ar9462_common_rx_gain_table_1p0,
-+ ARRAY_SIZE(ar9462_common_rx_gain_table_1p0), 2);
+- ar9340Common_wo_xlna_rx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
+- 5);
+- INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_high_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Common_wo_xlna_rx_gain_table_1p0);
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9340Modes_high_ob_db_tx_gain_table_1p0);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9340Modes_fast_clock_1p0,
+- ARRAY_SIZE(ar9340Modes_fast_clock_1p0),
+- 3);
++ ar9340Modes_fast_clock_1p0);
+
+ if (!ah->is_clk_25mhz)
+ INIT_INI_ARRAY(&ah->iniAdditional,
+- ar9340_1p0_radio_core_40M,
+- ARRAY_SIZE(ar9340_1p0_radio_core_40M),
+- 2);
++ ar9340_1p0_radio_core_40M);
+ } else if (AR_SREV_9485_11(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9485_1_1_mac_core,
+- ARRAY_SIZE(ar9485_1_1_mac_core), 2);
++ ar9485_1_1_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9485_1_1_mac_postamble,
+- ARRAY_SIZE(ar9485_1_1_mac_postamble), 5);
++ ar9485_1_1_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1,
+- ARRAY_SIZE(ar9485_1_1), 2);
++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], ar9485_1_1);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9485_1_1_baseband_core,
+- ARRAY_SIZE(ar9485_1_1_baseband_core), 2);
++ ar9485_1_1_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9485_1_1_baseband_postamble,
+- ARRAY_SIZE(ar9485_1_1_baseband_postamble), 5);
++ ar9485_1_1_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9485_1_1_radio_core,
+- ARRAY_SIZE(ar9485_1_1_radio_core), 2);
++ ar9485_1_1_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9485_1_1_radio_postamble,
+- ARRAY_SIZE(ar9485_1_1_radio_postamble), 2);
++ ar9485_1_1_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9485_1_1_soc_preamble,
+- ARRAY_SIZE(ar9485_1_1_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], NULL, 0, 0);
++ ar9485_1_1_soc_preamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9485Common_wo_xlna_rx_gain_1_1,
+- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 2);
++ ar9485Common_wo_xlna_rx_gain_1_1);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485_modes_lowest_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
+- 5);
++ ar9485_modes_lowest_ob_db_tx_gain_1_1);
+
+ /* Load PCIE SERDES settings from INI */
+
+ /* Awake Setting */
- /* Awake -> Sleep Setting */
INIT_INI_ARRAY(&ah->iniPcieSerdes,
-- ar9480_pcie_phy_clkreq_disable_L1_1p0,
-- ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0),
-+ ar9462_pcie_phy_clkreq_disable_L1_1p0,
-+ ARRAY_SIZE(ar9462_pcie_phy_clkreq_disable_L1_1p0),
- 2);
+- ar9485_1_1_pcie_phy_clkreq_disable_L1,
+- ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
+- 2);
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
+
+ /* Sleep Setting */
- /* Sleep -> Awake Setting */
INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
-- ar9480_pcie_phy_clkreq_disable_L1_1p0,
-- ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0),
-+ ar9462_pcie_phy_clkreq_disable_L1_1p0,
-+ ARRAY_SIZE(ar9462_pcie_phy_clkreq_disable_L1_1p0),
- 2);
-
- INIT_INI_ARRAY(&ah->iniModesAdditional,
-- ar9480_modes_fast_clock_1p0,
-- ARRAY_SIZE(ar9480_modes_fast_clock_1p0), 3);
-+ ar9462_modes_fast_clock_1p0,
-+ ARRAY_SIZE(ar9462_modes_fast_clock_1p0), 3);
- INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
-- AR9480_BB_CTX_COEFJ(1p0),
-- ARRAY_SIZE(AR9480_BB_CTX_COEFJ(1p0)), 2);
-+ AR9462_BB_CTX_COEFJ(1p0),
-+ ARRAY_SIZE(AR9462_BB_CTX_COEFJ(1p0)), 2);
-
-- } else if (AR_SREV_9480_20(ah)) {
-+ } else if (AR_SREV_9462_20(ah)) {
-
- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
-- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_2p0_mac_core,
-- ARRAY_SIZE(ar9480_2p0_mac_core), 2);
-+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core,
-+ ARRAY_SIZE(ar9462_2p0_mac_core), 2);
+- ar9485_1_1_pcie_phy_clkreq_disable_L1,
+- ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
+- 2);
++ ar9485_1_1_pcie_phy_clkreq_disable_L1);
+ } else if (AR_SREV_9462_20(ah)) {
+
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core,
+- ARRAY_SIZE(ar9462_2p0_mac_core), 2);
++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
-- ar9480_2p0_mac_postamble,
-- ARRAY_SIZE(ar9480_2p0_mac_postamble), 5);
-+ ar9462_2p0_mac_postamble,
-+ ARRAY_SIZE(ar9462_2p0_mac_postamble), 5);
+- ar9462_2p0_mac_postamble,
+- ARRAY_SIZE(ar9462_2p0_mac_postamble), 5);
++ ar9462_2p0_mac_postamble);
- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
-- ar9480_2p0_baseband_core,
-- ARRAY_SIZE(ar9480_2p0_baseband_core), 2);
-+ ar9462_2p0_baseband_core,
-+ ARRAY_SIZE(ar9462_2p0_baseband_core), 2);
+- ar9462_2p0_baseband_core,
+- ARRAY_SIZE(ar9462_2p0_baseband_core), 2);
++ ar9462_2p0_baseband_core);
INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
-- ar9480_2p0_baseband_postamble,
-- ARRAY_SIZE(ar9480_2p0_baseband_postamble), 5);
-+ ar9462_2p0_baseband_postamble,
-+ ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5);
+- ar9462_2p0_baseband_postamble,
+- ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5);
++ ar9462_2p0_baseband_postamble);
- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
-- ar9480_2p0_radio_core,
-- ARRAY_SIZE(ar9480_2p0_radio_core), 2);
-+ ar9462_2p0_radio_core,
-+ ARRAY_SIZE(ar9462_2p0_radio_core), 2);
+- ar9462_2p0_radio_core,
+- ARRAY_SIZE(ar9462_2p0_radio_core), 2);
++ ar9462_2p0_radio_core);
INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
-- ar9480_2p0_radio_postamble,
-- ARRAY_SIZE(ar9480_2p0_radio_postamble), 5);
-+ ar9462_2p0_radio_postamble,
-+ ARRAY_SIZE(ar9462_2p0_radio_postamble), 5);
+- ar9462_2p0_radio_postamble,
+- ARRAY_SIZE(ar9462_2p0_radio_postamble), 5);
++ ar9462_2p0_radio_postamble);
INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant,
-- ar9480_2p0_radio_postamble_sys2ant,
-- ARRAY_SIZE(ar9480_2p0_radio_postamble_sys2ant),
-+ ar9462_2p0_radio_postamble_sys2ant,
-+ ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant),
- 5);
+- ar9462_2p0_radio_postamble_sys2ant,
+- ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant),
+- 5);
++ ar9462_2p0_radio_postamble_sys2ant);
INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
-- ar9480_2p0_soc_preamble,
-- ARRAY_SIZE(ar9480_2p0_soc_preamble), 2);
-+ ar9462_2p0_soc_preamble,
-+ ARRAY_SIZE(ar9462_2p0_soc_preamble), 2);
- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
+- ar9462_2p0_soc_preamble,
+- ARRAY_SIZE(ar9462_2p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9462_2p0_soc_preamble);
INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
-- ar9480_2p0_soc_postamble,
-- ARRAY_SIZE(ar9480_2p0_soc_postamble), 5);
-+ ar9462_2p0_soc_postamble,
-+ ARRAY_SIZE(ar9462_2p0_soc_postamble), 5);
+- ar9462_2p0_soc_postamble,
+- ARRAY_SIZE(ar9462_2p0_soc_postamble), 5);
++ ar9462_2p0_soc_postamble);
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9480_common_rx_gain_table_2p0), 2);
-+ ar9462_common_rx_gain_table_2p0,
-+ ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
-
- INIT_INI_ARRAY(&ah->ini_BTCOEX_MAX_TXPWR,
-- ar9480_2p0_BTCOEX_MAX_TXPWR_table,
-- ARRAY_SIZE(ar9480_2p0_BTCOEX_MAX_TXPWR_table),
-+ ar9462_2p0_BTCOEX_MAX_TXPWR_table,
-+ ARRAY_SIZE(ar9462_2p0_BTCOEX_MAX_TXPWR_table),
- 2);
+- ar9462_common_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2);
++ ar9462_common_rx_gain_table_2p0);
/* Awake -> Sleep Setting */
-@@ -380,15 +380,15 @@ static void ar9003_hw_init_mode_regs(str
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
+- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
+- 2);
++ PCIE_PLL_ON_CREQ_DIS_L1_2P0);
+ /* Sleep -> Awake Setting */
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- PCIE_PLL_ON_CREQ_DIS_L1_2P0,
+- ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
+- 2);
++ PCIE_PLL_ON_CREQ_DIS_L1_2P0);
/* Fast clock modal settings */
- INIT_INI_ARRAY(&ah->iniModesAdditional,
-- ar9480_modes_fast_clock_2p0,
-- ARRAY_SIZE(ar9480_modes_fast_clock_2p0), 3);
-+ ar9462_modes_fast_clock_2p0,
-+ ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9462_modes_fast_clock_2p0,
+- ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);
++ ar9462_modes_fast_clock_2p0);
INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
-- AR9480_BB_CTX_COEFJ(2p0),
-- ARRAY_SIZE(AR9480_BB_CTX_COEFJ(2p0)), 2);
-+ AR9462_BB_CTX_COEFJ(2p0),
-+ ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2);
+- AR9462_BB_CTX_COEFJ(2p0),
+- ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2);
++ AR9462_BB_CTX_COEFJ(2p0));
+
+- INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
+- ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
++ INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ);
+ } else if (AR_SREV_9550(ah)) {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar955x_1p0_mac_core,
+- ARRAY_SIZE(ar955x_1p0_mac_core), 2);
++ ar955x_1p0_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar955x_1p0_mac_postamble,
+- ARRAY_SIZE(ar955x_1p0_mac_postamble), 5);
++ ar955x_1p0_mac_postamble);
-- INIT_INI_ARRAY(&ah->ini_japan2484, AR9480_BBC_TXIFR_COEFFJ,
-- ARRAY_SIZE(AR9480_BBC_TXIFR_COEFFJ), 2);
-+ INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
-+ ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar955x_1p0_baseband_core,
+- ARRAY_SIZE(ar955x_1p0_baseband_core), 2);
++ ar955x_1p0_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar955x_1p0_baseband_postamble,
+- ARRAY_SIZE(ar955x_1p0_baseband_postamble), 5);
++ ar955x_1p0_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar955x_1p0_radio_core,
+- ARRAY_SIZE(ar955x_1p0_radio_core), 2);
++ ar955x_1p0_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar955x_1p0_radio_postamble,
+- ARRAY_SIZE(ar955x_1p0_radio_postamble), 5);
++ ar955x_1p0_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar955x_1p0_soc_preamble,
+- ARRAY_SIZE(ar955x_1p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar955x_1p0_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar955x_1p0_soc_postamble,
+- ARRAY_SIZE(ar955x_1p0_soc_postamble), 5);
++ ar955x_1p0_soc_postamble);
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar955x_1p0_common_wo_xlna_rx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
+- 2);
++ ar955x_1p0_common_wo_xlna_rx_gain_table);
+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
+- ar955x_1p0_common_wo_xlna_rx_gain_bounds,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
+- 5);
+- INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar955x_1p0_modes_xpa_tx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
+- 9);
++ ar955x_1p0_common_wo_xlna_rx_gain_bounds);
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar955x_1p0_modes_xpa_tx_gain_table);
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar955x_1p0_modes_fast_clock,
+- ARRAY_SIZE(ar955x_1p0_modes_fast_clock), 3);
++ ar955x_1p0_modes_fast_clock);
} else if (AR_SREV_9580(ah)) {
/* mac */
-@@ -537,15 +537,15 @@ static void ar9003_tx_gain_table_mode0(s
- ar9580_1p0_lowest_ob_db_tx_gain_table,
- ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
- 5);
-- else if (AR_SREV_9480_10(ah))
-+ else if (AR_SREV_9462_10(ah))
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9580_1p0_mac_core,
+- ARRAY_SIZE(ar9580_1p0_mac_core), 2);
++ ar9580_1p0_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9580_1p0_mac_postamble,
+- ARRAY_SIZE(ar9580_1p0_mac_postamble), 5);
++ ar9580_1p0_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9580_1p0_baseband_core,
+- ARRAY_SIZE(ar9580_1p0_baseband_core), 2);
++ ar9580_1p0_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9580_1p0_baseband_postamble,
+- ARRAY_SIZE(ar9580_1p0_baseband_postamble), 5);
++ ar9580_1p0_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9580_1p0_radio_core,
+- ARRAY_SIZE(ar9580_1p0_radio_core), 2);
++ ar9580_1p0_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9580_1p0_radio_postamble,
+- ARRAY_SIZE(ar9580_1p0_radio_postamble), 5);
++ ar9580_1p0_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9580_1p0_soc_preamble,
+- ARRAY_SIZE(ar9580_1p0_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9580_1p0_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9580_1p0_soc_postamble,
+- ARRAY_SIZE(ar9580_1p0_soc_postamble), 5);
++ ar9580_1p0_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9580_1p0_rx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2);
++ ar9580_1p0_rx_gain_table);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_low_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_low_ob_db_tx_gain_table);
+
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9580_1p0_modes_fast_clock,
+- ARRAY_SIZE(ar9580_1p0_modes_fast_clock),
+- 3);
++ ar9580_1p0_modes_fast_clock);
+ } else {
+ /* mac */
+- INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
+- ar9300_2p2_mac_core,
+- ARRAY_SIZE(ar9300_2p2_mac_core), 2);
++ ar9300_2p2_mac_core);
+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
+- ar9300_2p2_mac_postamble,
+- ARRAY_SIZE(ar9300_2p2_mac_postamble), 5);
++ ar9300_2p2_mac_postamble);
+
+ /* bb */
+- INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
+- ar9300_2p2_baseband_core,
+- ARRAY_SIZE(ar9300_2p2_baseband_core), 2);
++ ar9300_2p2_baseband_core);
+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
+- ar9300_2p2_baseband_postamble,
+- ARRAY_SIZE(ar9300_2p2_baseband_postamble), 5);
++ ar9300_2p2_baseband_postamble);
+
+ /* radio */
+- INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
+- ar9300_2p2_radio_core,
+- ARRAY_SIZE(ar9300_2p2_radio_core), 2);
++ ar9300_2p2_radio_core);
+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
+- ar9300_2p2_radio_postamble,
+- ARRAY_SIZE(ar9300_2p2_radio_postamble), 5);
++ ar9300_2p2_radio_postamble);
+
+ /* soc */
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
+- ar9300_2p2_soc_preamble,
+- ARRAY_SIZE(ar9300_2p2_soc_preamble), 2);
+- INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
++ ar9300_2p2_soc_preamble);
+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
+- ar9300_2p2_soc_postamble,
+- ARRAY_SIZE(ar9300_2p2_soc_postamble), 5);
++ ar9300_2p2_soc_postamble);
+
+ /* rx/tx gain */
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9300Common_rx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Common_rx_gain_table_2p2), 2);
++ ar9300Common_rx_gain_table_2p2);
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
+
+ /* Load PCIE SERDES settings from INI */
+
+ /* Awake Setting */
+
+ INIT_INI_ARRAY(&ah->iniPcieSerdes,
+- ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
+- ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
+- 2);
++ ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
+
+ /* Sleep Setting */
+
+ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
+- ar9300PciePhy_pll_on_clkreq_disable_L1_2p2,
+- ARRAY_SIZE(ar9300PciePhy_pll_on_clkreq_disable_L1_2p2),
+- 2);
++ ar9300PciePhy_pll_on_clkreq_disable_L1_2p2);
+
+ /* Fast clock modal settings */
+ INIT_INI_ARRAY(&ah->iniModesFastClock,
+- ar9300Modes_fast_clock_2p2,
+- ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
+- 3);
++ ar9300Modes_fast_clock_2p2);
+ }
+ }
+
+@@ -507,156 +355,110 @@ static void ar9003_tx_gain_table_mode0(s
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_lowest_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_lowest_ob_db_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_lowest_ob_db_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485_modes_lowest_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
+- 5);
++ ar9485_modes_lowest_ob_db_tx_gain_1_1);
+ else if (AR_SREV_9550(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar955x_1p0_modes_xpa_tx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
+- 9);
++ ar955x_1p0_modes_xpa_tx_gain_table);
+ else if (AR_SREV_9580(ah))
INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9480_modes_low_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_1p0),
-+ ar9462_modes_low_ob_db_tx_gain_table_1p0,
-+ ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_1p0),
- 5);
-- else if (AR_SREV_9480_20(ah))
-+ else if (AR_SREV_9462_20(ah))
+- ar9580_1p0_lowest_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_lowest_ob_db_tx_gain_table);
+ else if (AR_SREV_9462_20(ah))
INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9480_modes_low_ob_db_tx_gain_table_2p0,
-- ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_2p0),
-+ ar9462_modes_low_ob_db_tx_gain_table_2p0,
-+ ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0),
- 5);
+- ar9462_modes_low_ob_db_tx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0),
+- 5);
++ ar9462_modes_low_ob_db_tx_gain_table_2p0);
else
INIT_INI_ARRAY(&ah->iniModesTxGain,
-@@ -581,15 +581,15 @@ static void ar9003_tx_gain_table_mode1(s
- ar9580_1p0_high_ob_db_tx_gain_table,
- ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
- 5);
-- else if (AR_SREV_9480_10(ah))
-+ else if (AR_SREV_9462_10(ah))
+- ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_lowest_ob_db_tx_gain_table_2p2);
+ }
+
+ static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_high_ob_db_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_high_ob_db_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_high_ob_db_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485Modes_high_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
+- 5);
++ ar9485Modes_high_ob_db_tx_gain_1_1);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_high_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_high_ob_db_tx_gain_table);
+ else if (AR_SREV_9550(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar955x_1p0_modes_no_xpa_tx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_modes_no_xpa_tx_gain_table),
+- 9);
++ ar955x_1p0_modes_no_xpa_tx_gain_table);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9462_modes_high_ob_db_tx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0),
+- 5);
++ ar9462_modes_high_ob_db_tx_gain_table_2p0);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_high_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_high_ob_db_tx_gain_table_2p2);
+ }
+
+ static void ar9003_tx_gain_table_mode2(struct ath_hw *ah)
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_low_ob_db_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p2),
+- 5);
++ ar9331_modes_low_ob_db_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_low_ob_db_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p1),
+- 5);
++ ar9331_modes_low_ob_db_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_low_ob_db_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9485Modes_low_ob_db_tx_gain_1_1,
+- ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
+- 5);
++ ar9485Modes_low_ob_db_tx_gain_1_1);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_low_ob_db_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
+- 5);
++ ar9580_1p0_low_ob_db_tx_gain_table);
+ else
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9300Modes_low_ob_db_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_low_ob_db_tx_gain_table_2p2);
+ }
+
+ static void ar9003_tx_gain_table_mode3(struct ath_hw *ah)
+ {
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_power_tx_gain_1p2,
+- ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p2),
+- 5);
++ ar9331_modes_high_power_tx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9331_modes_high_power_tx_gain_1p1,
+- ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p1),
+- 5);
++ ar9331_modes_high_power_tx_gain_1p1);
+ else if (AR_SREV_9340(ah))
INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9480_modes_high_ob_db_tx_gain_table_1p0,
-- ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_1p0),
-+ ar9462_modes_high_ob_db_tx_gain_table_1p0,
-+ ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_1p0),
- 5);
-- else if (AR_SREV_9480_20(ah))
-+ else if (AR_SREV_9462_20(ah))
+- ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
+- 5);
++ ar9340Modes_high_power_tx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
INIT_INI_ARRAY(&ah->iniModesTxGain,
-- ar9480_modes_high_ob_db_tx_gain_table_2p0,
-- ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_2p0),
-+ ar9462_modes_high_ob_db_tx_gain_table_2p0,
-+ ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0),
- 5);
+- ar9485Modes_high_power_tx_gain_1_1,
+- ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
+- 5);
++ ar9485Modes_high_power_tx_gain_1_1);
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+- ar9580_1p0_high_power_tx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table),
+- 5);
++ ar9580_1p0_high_power_tx_gain_table);
else
INIT_INI_ARRAY(&ah->iniModesTxGain,
-@@ -712,15 +712,15 @@ static void ar9003_rx_gain_table_mode0(s
- ar9580_1p0_rx_gain_table,
- ARRAY_SIZE(ar9580_1p0_rx_gain_table),
- 2);
-- else if (AR_SREV_9480_10(ah))
-+ else if (AR_SREV_9462_10(ah))
+- ar9300Modes_high_power_tx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Modes_high_power_tx_gain_table_2p2),
+- 5);
++ ar9300Modes_high_power_tx_gain_table_2p2);
++}
++
++static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
++{
++ if (AR_SREV_9340(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9340Modes_mixed_ob_db_tx_gain_table_1p0);
++ else if (AR_SREV_9580(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9580_1p0_mixed_ob_db_tx_gain_table);
+ }
+
+ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
+@@ -675,6 +477,9 @@ static void ar9003_tx_gain_table_apply(s
+ case 3:
+ ar9003_tx_gain_table_mode3(ah);
+ break;
++ case 4:
++ ar9003_tx_gain_table_mode4(ah);
++ break;
+ }
+ }
+
+@@ -682,104 +487,67 @@ static void ar9003_rx_gain_table_mode0(s
+ {
+ if (AR_SREV_9330_12(ah))
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_rx_gain_table_1p0,
-- ARRAY_SIZE(ar9480_common_rx_gain_table_1p0),
-+ ar9462_common_rx_gain_table_1p0,
-+ ARRAY_SIZE(ar9462_common_rx_gain_table_1p0),
- 2);
-- else if (AR_SREV_9480_20(ah))
-+ else if (AR_SREV_9462_20(ah))
+- ar9331_common_rx_gain_1p2,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p2),
+- 2);
++ ar9331_common_rx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9480_common_rx_gain_table_2p0),
-+ ar9462_common_rx_gain_table_2p0,
-+ ARRAY_SIZE(ar9462_common_rx_gain_table_2p0),
- 2);
- else
+- ar9331_common_rx_gain_1p1,
+- ARRAY_SIZE(ar9331_common_rx_gain_1p1),
+- 2);
++ ar9331_common_rx_gain_1p1);
+ else if (AR_SREV_9340(ah))
INIT_INI_ARRAY(&ah->iniModesRxGain,
-@@ -751,15 +751,15 @@ static void ar9003_rx_gain_table_mode1(s
- ar9485Common_wo_xlna_rx_gain_1_1,
- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
- 2);
-- else if (AR_SREV_9480_10(ah))
-+ else if (AR_SREV_9462_10(ah))
+- ar9340Common_rx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Common_rx_gain_table_1p0),
+- 2);
++ ar9340Common_rx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_wo_xlna_rx_gain_table_1p0,
-- ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_1p0),
-+ ar9462_common_wo_xlna_rx_gain_table_1p0,
-+ ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_1p0),
- 2);
-- else if (AR_SREV_9480_20(ah))
-+ else if (AR_SREV_9462_20(ah))
+- ar9485Common_wo_xlna_rx_gain_1_1,
+- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
+- 2);
++ ar9485Common_wo_xlna_rx_gain_1_1);
+ else if (AR_SREV_9550(ah)) {
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_wo_xlna_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_2p0),
-+ ar9462_common_wo_xlna_rx_gain_table_2p0,
-+ ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
- 2);
- else if (AR_SREV_9580(ah))
+- ar955x_1p0_common_rx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_common_rx_gain_table),
+- 2);
++ ar955x_1p0_common_rx_gain_table);
+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
+- ar955x_1p0_common_rx_gain_bounds,
+- ARRAY_SIZE(ar955x_1p0_common_rx_gain_bounds),
+- 5);
++ ar955x_1p0_common_rx_gain_bounds);
+ } else if (AR_SREV_9580(ah))
INIT_INI_ARRAY(&ah->iniModesRxGain,
-@@ -775,14 +775,14 @@ static void ar9003_rx_gain_table_mode1(s
+- ar9580_1p0_rx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_rx_gain_table),
+- 2);
++ ar9580_1p0_rx_gain_table);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_rx_gain_table_2p0),
+- 2);
++ ar9462_common_rx_gain_table_2p0);
+ else
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9300Common_rx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
+- 2);
++ ar9300Common_rx_gain_table_2p2);
+ }
- static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
+ static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
{
-- if (AR_SREV_9480_10(ah))
-+ if (AR_SREV_9462_10(ah))
+ if (AR_SREV_9330_12(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_wo_xlna_rx_gain_1p2,
+- ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p2),
+- 2);
++ ar9331_common_wo_xlna_rx_gain_1p2);
+ else if (AR_SREV_9330_11(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9331_common_wo_xlna_rx_gain_1p1,
+- ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p1),
+- 2);
++ ar9331_common_wo_xlna_rx_gain_1p1);
+ else if (AR_SREV_9340(ah))
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_mixed_rx_gain_table_1p0,
-- ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_1p0), 2);
-- else if (AR_SREV_9480_20(ah))
-+ ar9462_common_mixed_rx_gain_table_1p0,
-+ ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_1p0), 2);
-+ else if (AR_SREV_9462_20(ah))
+- ar9340Common_wo_xlna_rx_gain_table_1p0,
+- ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
+- 2);
++ ar9340Common_wo_xlna_rx_gain_table_1p0);
+ else if (AR_SREV_9485_11(ah))
INIT_INI_ARRAY(&ah->iniModesRxGain,
-- ar9480_common_mixed_rx_gain_table_2p0,
-- ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_2p0), 2);
-+ ar9462_common_mixed_rx_gain_table_2p0,
-+ ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2);
+- ar9485Common_wo_xlna_rx_gain_1_1,
+- ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
+- 2);
++ ar9485Common_wo_xlna_rx_gain_1_1);
+ else if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_wo_xlna_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
+- 2);
++ ar9462_common_wo_xlna_rx_gain_table_2p0);
+ else if (AR_SREV_9550(ah)) {
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar955x_1p0_common_wo_xlna_rx_gain_table,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
+- 2);
++ ar955x_1p0_common_wo_xlna_rx_gain_table);
+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
+- ar955x_1p0_common_wo_xlna_rx_gain_bounds,
+- ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
+- 5);
++ ar955x_1p0_common_wo_xlna_rx_gain_bounds);
+ } else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9580_1p0_wo_xlna_rx_gain_table,
+- ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
+- 2);
++ ar9580_1p0_wo_xlna_rx_gain_table);
+ else
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9300Common_wo_xlna_rx_gain_table_2p2,
+- ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
+- 2);
++ ar9300Common_wo_xlna_rx_gain_table_2p2);
}
- static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
---- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-@@ -525,8 +525,8 @@ int ath9k_hw_process_rxdesc_edma(struct
- rxs->rs_status |= ATH9K_RXERR_DECRYPT;
- else if (rxsp->status11 & AR_MichaelErr)
- rxs->rs_status |= ATH9K_RXERR_MIC;
-- else if (rxsp->status11 & AR_KeyMiss)
-- rxs->rs_status |= ATH9K_RXERR_DECRYPT;
-+ if (rxsp->status11 & AR_KeyMiss)
-+ rxs->rs_status |= ATH9K_RXERR_KEYMISS;
- }
-
- return 0;
---- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
-@@ -19,7 +19,6 @@
-
- void ar9003_paprd_enable(struct ath_hw *ah, bool val)
+ static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
{
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- struct ath9k_channel *chan = ah->curchan;
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-
-@@ -54,13 +53,7 @@ void ar9003_paprd_enable(struct ath_hw *
-
- if (val) {
- ah->paprd_table_write_done = true;
--
-- ah->eep_ops->set_txpower(ah, chan,
-- ath9k_regd_get_ctl(regulatory, chan),
-- chan->chan->max_antenna_gain * 2,
-- chan->chan->max_power * 2,
-- min((u32) MAX_RATE_POWER,
-- (u32) regulatory->power_limit), false);
-+ ath9k_hw_apply_txpower(ah, chan);
- }
+ if (AR_SREV_9462_20(ah))
+ INIT_INI_ARRAY(&ah->iniModesRxGain,
+- ar9462_common_mixed_rx_gain_table_2p0,
+- ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2);
++ ar9462_common_mixed_rx_gain_table_2p0);
+ }
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0,
-@@ -207,7 +200,7 @@ static int ar9003_paprd_setup_single_tab
- AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28);
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1,
- AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1);
-- val = AR_SREV_9480(ah) ? 0x91 : 147;
-+ val = AR_SREV_9462(ah) ? 0x91 : 147;
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2,
- AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, val);
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
-@@ -218,7 +211,7 @@ static int ar9003_paprd_setup_single_tab
- AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7);
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
- AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1);
-- if (AR_SREV_9485(ah) || AR_SREV_9480(ah))
-+ if (AR_SREV_9485(ah) || AR_SREV_9462(ah))
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
- AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
- -3);
-@@ -226,7 +219,7 @@ static int ar9003_paprd_setup_single_tab
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
- AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
- -6);
-- val = AR_SREV_9480(ah) ? -10 : -15;
-+ val = AR_SREV_9462(ah) ? -10 : -15;
- REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
- AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE,
- val);
+ static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -559,7 +559,7 @@ static void ar9003_hw_set_chain_masks(st
-
- if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
- REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
-- else if (AR_SREV_9480(ah))
-+ else if (AR_SREV_9462(ah))
- /* xxx only when MCI support is enabled */
- REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
- else
-@@ -631,9 +631,7 @@ static void ar9003_hw_prog_ini(struct at
- static int ar9003_hw_process_ini(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- unsigned int regWrites = 0, i;
-- struct ieee80211_channel *channel = chan->chan;
- u32 modesIndex;
-
- switch (chan->chanmode) {
-@@ -664,7 +662,7 @@ static int ar9003_hw_process_ini(struct
- ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex);
- ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex);
- ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex);
-- if (i == ATH_INI_POST && AR_SREV_9480_20(ah))
-+ if (i == ATH_INI_POST && AR_SREV_9462_20(ah))
- ar9003_hw_prog_ini(ah,
- &ah->ini_radio_post_sys2ant,
- modesIndex);
-@@ -687,20 +685,27 @@ static int ar9003_hw_process_ini(struct
- if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
- REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
-
-- if (AR_SREV_9480(ah))
-+ if (AR_SREV_9462(ah))
- ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1);
-
-+ ah->modes_index = modesIndex;
- ar9003_hw_override_ini(ah);
- ar9003_hw_set_channel_regs(ah, chan);
- ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
-+ ath9k_hw_apply_txpower(ah, chan);
-
-- /* Set TX power */
-- ah->eep_ops->set_txpower(ah, chan,
-- ath9k_regd_get_ctl(regulatory, chan),
-- channel->max_antenna_gain * 2,
-- channel->max_power * 2,
-- min((u32) MAX_RATE_POWER,
-- (u32) regulatory->power_limit), false);
-+ if (AR_SREV_9462(ah)) {
-+ if (REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_0,
-+ AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL))
-+ ah->enabled_cals |= TX_IQ_CAL;
-+ else
-+ ah->enabled_cals &= ~TX_IQ_CAL;
-+
-+ if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
-+ ah->enabled_cals |= TX_CL_CAL;
-+ else
-+ ah->enabled_cals &= ~TX_CL_CAL;
-+ }
-
- return 0;
- }
-@@ -1256,6 +1261,73 @@ static void ar9003_hw_antdiv_comb_conf_s
- REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
- }
-
-+static int ar9003_hw_fast_chan_change(struct ath_hw *ah,
-+ struct ath9k_channel *chan,
-+ u8 *ini_reloaded)
-+{
-+ unsigned int regWrites = 0;
-+ u32 modesIndex;
-+
-+ switch (chan->chanmode) {
-+ case CHANNEL_A:
-+ case CHANNEL_A_HT20:
-+ modesIndex = 1;
-+ break;
-+ case CHANNEL_A_HT40PLUS:
-+ case CHANNEL_A_HT40MINUS:
-+ modesIndex = 2;
-+ break;
-+ case CHANNEL_G:
-+ case CHANNEL_G_HT20:
-+ case CHANNEL_B:
-+ modesIndex = 4;
-+ break;
-+ case CHANNEL_G_HT40PLUS:
-+ case CHANNEL_G_HT40MINUS:
-+ modesIndex = 3;
-+ break;
-+
-+ default:
-+ return -EINVAL;
-+ }
-+
-+ if (modesIndex == ah->modes_index) {
-+ *ini_reloaded = false;
-+ goto set_rfmode;
-+ }
-+
-+ ar9003_hw_prog_ini(ah, &ah->iniSOC[ATH_INI_POST], modesIndex);
-+ ar9003_hw_prog_ini(ah, &ah->iniMac[ATH_INI_POST], modesIndex);
-+ ar9003_hw_prog_ini(ah, &ah->iniBB[ATH_INI_POST], modesIndex);
-+ ar9003_hw_prog_ini(ah, &ah->iniRadio[ATH_INI_POST], modesIndex);
-+ if (AR_SREV_9462_20(ah))
-+ ar9003_hw_prog_ini(ah,
-+ &ah->ini_radio_post_sys2ant,
-+ modesIndex);
-+
-+ REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
-+
-+ /*
-+ * For 5GHz channels requiring Fast Clock, apply
-+ * different modal values.
-+ */
-+ if (IS_CHAN_A_FAST_CLOCK(ah, chan))
-+ REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites);
-+
-+ if (AR_SREV_9330(ah))
-+ REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
-+
-+ if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
-+ REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
-+
-+ ah->modes_index = modesIndex;
-+ *ini_reloaded = true;
-+
-+set_rfmode:
-+ ar9003_hw_set_rfmode(ah, chan);
-+ return 0;
-+}
-+
- void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
- {
- struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
-@@ -1284,6 +1356,7 @@ void ar9003_hw_attach_phy_ops(struct ath
- priv_ops->do_getnf = ar9003_hw_do_getnf;
- priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
- priv_ops->set_radar_params = ar9003_hw_set_radar_params;
-+ priv_ops->fast_chan_change = ar9003_hw_fast_chan_change;
-
- ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
- ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
+@@ -117,8 +117,8 @@ static int ar9003_hw_set_channel(struct
+ ah->is_clk_25mhz) {
+ u32 chan_frac;
+
+- channelSel = (freq * 2) / 75;
+- chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
++ channelSel = freq / 75;
++ chan_frac = ((freq % 75) * 0x20000) / 75;
+ channelSel = (channelSel << 17) | chan_frac;
+ } else {
+ channelSel = CHANSEL_5G(freq);
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
-@@ -325,10 +325,10 @@
-
- #define AR_PHY_RX_OCGAIN (AR_AGC_BASE + 0x200)
-
--#define AR_PHY_CCA_NOM_VAL_9300_2GHZ -110
--#define AR_PHY_CCA_NOM_VAL_9300_5GHZ -115
--#define AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ -125
--#define AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ -125
-+#define AR_PHY_CCA_NOM_VAL_9300_2GHZ (AR_SREV_9462(ah) ? -127 : -110)
-+#define AR_PHY_CCA_NOM_VAL_9300_5GHZ (AR_SREV_9462(ah) ? -127 : -115)
-+#define AR_PHY_CCA_MIN_GOOD_VAL_9300_2GHZ (AR_SREV_9462(ah) ? -127 : -125)
-+#define AR_PHY_CCA_MIN_GOOD_VAL_9300_5GHZ (AR_SREV_9462(ah) ? -127 : -125)
- #define AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ -95
- #define AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ -100
-
-@@ -572,6 +572,8 @@
-
- #define AR_PHY_TXGAIN_TABLE (AR_SM_BASE + 0x300)
-
-+#define AR_PHY_TX_IQCAL_CONTROL_0 (AR_SM_BASE + AR_SREV_9485(ah) ? \
-+ 0x3c4 : 0x444)
- #define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + AR_SREV_9485(ah) ? \
- 0x3c8 : 0x448)
- #define AR_PHY_TX_IQCAL_START (AR_SM_BASE + AR_SREV_9485(ah) ? \
-@@ -582,8 +584,6 @@
- (AR_SREV_9485(ah) ? \
- 0x3d0 : 0x450) + ((_i) << 2))
- #define AR_PHY_RTT_CTRL (AR_SM_BASE + 0x380)
--#define AR_PHY_RTT_TABLE_SW_INTF_B (AR_SM_BASE + 0x384)
--#define AR_PHY_RTT_TABLE_SW_INTF_1_B0 (AR_SM_BASE + 0x388)
-
- #define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0)
- #define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4)
-@@ -608,9 +608,9 @@
- #define AR_PHY_AIC_CTRL_1_B0 (AR_SM_BASE + 0x4b4)
- #define AR_PHY_AIC_CTRL_2_B0 (AR_SM_BASE + 0x4b8)
- #define AR_PHY_AIC_CTRL_3_B0 (AR_SM_BASE + 0x4bc)
--#define AR_PHY_AIC_STAT_0_B0 (AR_SM_BASE + (AR_SREV_9480_10(ah) ? \
-+#define AR_PHY_AIC_STAT_0_B0 (AR_SM_BASE + (AR_SREV_9462_10(ah) ? \
- 0x4c0 : 0x4c4))
--#define AR_PHY_AIC_STAT_1_B0 (AR_SM_BASE + (AR_SREV_9480_10(ah) ? \
-+#define AR_PHY_AIC_STAT_1_B0 (AR_SM_BASE + (AR_SREV_9462_10(ah) ? \
- 0x4c4 : 0x4c8))
- #define AR_PHY_AIC_CTRL_4_B0 (AR_SM_BASE + 0x4c0)
- #define AR_PHY_AIC_STAT_2_B0 (AR_SM_BASE + 0x4cc)
-@@ -625,7 +625,7 @@
+@@ -633,6 +633,8 @@
+ #define AR_PHY_65NM_CH0_BIAS2 0x160c4
+ #define AR_PHY_65NM_CH0_BIAS4 0x160cc
#define AR_PHY_65NM_CH0_RXTX4 0x1610c
++#define AR_PHY_65NM_CH1_RXTX4 0x1650c
++#define AR_PHY_65NM_CH2_RXTX4 0x1690c
#define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
-- ((AR_SREV_9480(ah) ? 0x1628c : 0x16280)))
-+ ((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
- #define AR_CH0_TOP_XPABIASLVL (0x300)
- #define AR_CH0_TOP_XPABIASLVL_S (8)
-
-@@ -638,8 +638,8 @@
-
- #define AR_SWITCH_TABLE_COM_ALL (0xffff)
- #define AR_SWITCH_TABLE_COM_ALL_S (0)
--#define AR_SWITCH_TABLE_COM_AR9480_ALL (0xffffff)
--#define AR_SWITCH_TABLE_COM_AR9480_ALL_S (0)
-+#define AR_SWITCH_TABLE_COM_AR9462_ALL (0xffffff)
-+#define AR_SWITCH_TABLE_COM_AR9462_ALL_S (0)
- #define AR_SWITCH_TABLE_COM_SPDT (0x00f00000)
- #define AR_SWITCH_TABLE_COM_SPDT_ALL (0x0000fff0)
- #define AR_SWITCH_TABLE_COM_SPDT_ALL_S (4)
-@@ -679,11 +679,11 @@
- #define AR_CH0_XTAL_CAPOUTDAC 0x00fe0000
- #define AR_CH0_XTAL_CAPOUTDAC_S 17
-
--#define AR_PHY_PMU1 (AR_SREV_9480(ah) ? 0x16340 : 0x16c40)
-+#define AR_PHY_PMU1 (AR_SREV_9462(ah) ? 0x16340 : 0x16c40)
- #define AR_PHY_PMU1_PWD 0x1
- #define AR_PHY_PMU1_PWD_S 0
-
--#define AR_PHY_PMU2 (AR_SREV_9480(ah) ? 0x16344 : 0x16c44)
-+#define AR_PHY_PMU2 (AR_SREV_9462(ah) ? 0x16344 : 0x16c44)
- #define AR_PHY_PMU2_PGM 0x00200000
- #define AR_PHY_PMU2_PGM_S 21
-
-@@ -823,6 +823,22 @@
- #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000
- #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24
- #define AR_PHY_CHANNEL_STATUS_RX_CLEAR 0x00000004
-+#define AR_PHY_RTT_CTRL_ENA_RADIO_RETENTION 0x00000001
-+#define AR_PHY_RTT_CTRL_ENA_RADIO_RETENTION_S 0
-+#define AR_PHY_RTT_CTRL_RESTORE_MASK 0x0000007E
-+#define AR_PHY_RTT_CTRL_RESTORE_MASK_S 1
-+#define AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE 0x00000080
-+#define AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE_S 7
-+#define AR_PHY_RTT_SW_RTT_TABLE_ACCESS 0x00000001
-+#define AR_PHY_RTT_SW_RTT_TABLE_ACCESS_S 0
-+#define AR_PHY_RTT_SW_RTT_TABLE_WRITE 0x00000002
-+#define AR_PHY_RTT_SW_RTT_TABLE_WRITE_S 1
-+#define AR_PHY_RTT_SW_RTT_TABLE_ADDR 0x0000001C
-+#define AR_PHY_RTT_SW_RTT_TABLE_ADDR_S 2
-+#define AR_PHY_RTT_SW_RTT_TABLE_DATA 0xFFFFFFF0
-+#define AR_PHY_RTT_SW_RTT_TABLE_DATA_S 4
-+#define AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL 0x80000000
-+#define AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL_S 31
- #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT 0x01fc0000
- #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S 18
- #define AR_PHY_TX_IQCAL_START_DO_CAL 0x00000001
-@@ -905,9 +921,9 @@
- #define AR_PHY_AIC_CTRL_0_B1 (AR_SM1_BASE + 0x4b0)
- #define AR_PHY_AIC_CTRL_1_B1 (AR_SM1_BASE + 0x4b4)
- #define AR_PHY_AIC_CTRL_2_B1 (AR_SM1_BASE + 0x4b8)
--#define AR_PHY_AIC_STAT_0_B1 (AR_SM1_BASE + (AR_SREV_9480_10(ah) ? \
-+#define AR_PHY_AIC_STAT_0_B1 (AR_SM1_BASE + (AR_SREV_9462_10(ah) ? \
- 0x4c0 : 0x4c4))
--#define AR_PHY_AIC_STAT_1_B1 (AR_SM1_BASE + (AR_SREV_9480_10(ah) ? \
-+#define AR_PHY_AIC_STAT_1_B1 (AR_SM1_BASE + (AR_SREV_9462_10(ah) ? \
- 0x4c4 : 0x4c8))
- #define AR_PHY_AIC_CTRL_4_B1 (AR_SM1_BASE + 0x4c0)
- #define AR_PHY_AIC_STAT_2_B1 (AR_SM1_BASE + 0x4cc)
-@@ -915,6 +931,10 @@
- #define AR_PHY_AIC_SRAM_ADDR_B1 (AR_SM1_BASE + 0x5f0)
- #define AR_PHY_AIC_SRAM_DATA_B1 (AR_SM1_BASE + 0x5f4)
-
-+#define AR_PHY_RTT_TABLE_SW_INTF_B(i) (0x384 + (i) ? \
-+ AR_SM1_BASE : AR_SM_BASE)
-+#define AR_PHY_RTT_TABLE_SW_INTF_1_B(i) (0x388 + (i) ? \
-+ AR_SM1_BASE : AR_SM_BASE)
+ ((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
+@@ -876,6 +878,9 @@
+ #define AR_PHY_65NM_CH0_RXTX4_THERM_ON 0x10000000
+ #define AR_PHY_65NM_CH0_RXTX4_THERM_ON_S 28
+
++#define AR_PHY_65NM_RXTX4_XLNA_BIAS 0xC0000000
++#define AR_PHY_65NM_RXTX4_XLNA_BIAS_S 30
++
/*
- * Channel 2 Register Map
+ * Channel 1 Register Map
*/
-@@ -981,7 +1001,7 @@
- #define AR_GLB_BASE 0x20000
- #define AR_PHY_GLB_CONTROL (AR_GLB_BASE + 0x44)
- #define AR_GLB_SCRATCH(_ah) (AR_GLB_BASE + \
-- (AR_SREV_9480_20(_ah) ? 0x4c : 0x50))
-+ (AR_SREV_9462_20(_ah) ? 0x4c : 0x50))
- #define AR_GLB_STATUS (AR_GLB_BASE + 0x48)
+--- a/drivers/net/wireless/ath/ath9k/ath9k.h
++++ b/drivers/net/wireless/ath/ath9k/ath9k.h
+@@ -297,6 +297,8 @@ struct ath_tx {
+ struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
+ struct ath_descdma txdma;
+ struct ath_txq *txq_map[WME_NUM_AC];
++ u32 txq_max_pending[WME_NUM_AC];
++ u16 max_aggr_framelen[WME_NUM_AC][4][32];
+ };
- /*
---- /dev/null
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_rtt.c
-@@ -0,0 +1,153 @@
-+/*
-+ * Copyright (c) 2010-2011 Atheros Communications Inc.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ */
-+
-+#include "hw.h"
-+#include "ar9003_phy.h"
-+
-+#define RTT_RESTORE_TIMEOUT 1000
-+#define RTT_ACCESS_TIMEOUT 100
-+#define RTT_BAD_VALUE 0x0bad0bad
-+
-+/*
-+ * RTT (Radio Retention Table) hardware implementation information
-+ *
-+ * There is an internal table (i.e. the rtt) for each chain (or bank).
-+ * Each table contains 6 entries and each entry is corresponding to
-+ * a specific calibration parameter as depicted below.
-+ * 0~2 - DC offset DAC calibration: loop, low, high (offsetI/Q_...)
-+ * 3 - Filter cal (filterfc)
-+ * 4 - RX gain settings
-+ * 5 - Peak detector offset calibration (agc_caldac)
-+ */
-+
-+void ar9003_hw_rtt_enable(struct ath_hw *ah)
-+{
-+ REG_WRITE(ah, AR_PHY_RTT_CTRL, 1);
-+}
-+
-+void ar9003_hw_rtt_disable(struct ath_hw *ah)
-+{
-+ REG_WRITE(ah, AR_PHY_RTT_CTRL, 0);
-+}
-+
-+void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask)
-+{
-+ REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
-+ AR_PHY_RTT_CTRL_RESTORE_MASK, rtt_mask);
-+}
-+
-+bool ar9003_hw_rtt_force_restore(struct ath_hw *ah)
-+{
-+ if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
-+ AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE,
-+ 0, RTT_RESTORE_TIMEOUT))
-+ return false;
-+
-+ REG_RMW_FIELD(ah, AR_PHY_RTT_CTRL,
-+ AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE, 1);
-+
-+ if (!ath9k_hw_wait(ah, AR_PHY_RTT_CTRL,
-+ AR_PHY_RTT_CTRL_FORCE_RADIO_RESTORE,
-+ 0, RTT_RESTORE_TIMEOUT))
-+ return false;
-+
-+ return true;
-+}
-+
-+static void ar9003_hw_rtt_load_hist_entry(struct ath_hw *ah, u8 chain,
-+ u32 index, u32 data28)
-+{
-+ u32 val;
-+
-+ val = SM(data28, AR_PHY_RTT_SW_RTT_TABLE_DATA);
-+ REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain), val);
-+
-+ val = SM(0, AR_PHY_RTT_SW_RTT_TABLE_ACCESS) |
-+ SM(1, AR_PHY_RTT_SW_RTT_TABLE_WRITE) |
-+ SM(index, AR_PHY_RTT_SW_RTT_TABLE_ADDR);
-+ REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
-+ udelay(1);
-+
-+ val |= SM(1, AR_PHY_RTT_SW_RTT_TABLE_ACCESS);
-+ REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
-+ udelay(1);
-+
-+ if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
-+ AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0,
-+ RTT_ACCESS_TIMEOUT))
-+ return;
-+
-+ val &= ~SM(1, AR_PHY_RTT_SW_RTT_TABLE_WRITE);
-+ REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
-+ udelay(1);
-+
-+ ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
-+ AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0,
-+ RTT_ACCESS_TIMEOUT);
-+}
-+
-+void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table)
-+{
-+ int i;
-+
-+ for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++)
-+ ar9003_hw_rtt_load_hist_entry(ah, chain, i, table[i]);
-+}
-+
-+static int ar9003_hw_rtt_fill_hist_entry(struct ath_hw *ah, u8 chain, u32 index)
-+{
-+ u32 val;
-+
-+ val = SM(0, AR_PHY_RTT_SW_RTT_TABLE_ACCESS) |
-+ SM(0, AR_PHY_RTT_SW_RTT_TABLE_WRITE) |
-+ SM(index, AR_PHY_RTT_SW_RTT_TABLE_ADDR);
-+
-+ REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
-+ udelay(1);
-+
-+ val |= SM(1, AR_PHY_RTT_SW_RTT_TABLE_ACCESS);
-+ REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val);
-+ udelay(1);
-+
-+ if (!ath9k_hw_wait(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain),
-+ AR_PHY_RTT_SW_RTT_TABLE_ACCESS, 0,
-+ RTT_ACCESS_TIMEOUT))
-+ return RTT_BAD_VALUE;
-+
-+ val = REG_READ(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain));
-+
-+ return val;
-+}
-+
-+void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table)
-+{
-+ int i;
-+
-+ for (i = 0; i < MAX_RTT_TABLE_ENTRY; i++)
-+ table[i] = ar9003_hw_rtt_fill_hist_entry(ah, chain, i);
-+}
-+
-+void ar9003_hw_rtt_clear_hist(struct ath_hw *ah)
-+{
-+ int i, j;
-+
-+ for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-+ if (!(ah->rxchainmask & (1 << i)))
-+ continue;
-+ for (j = 0; j < MAX_RTT_TABLE_ENTRY; j++)
-+ ar9003_hw_rtt_load_hist_entry(ah, i, j, 0);
-+ }
-+}
---- /dev/null
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_rtt.h
-@@ -0,0 +1,28 @@
-+/*
-+ * Copyright (c) 2010-2011 Atheros Communications Inc.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ */
-+
-+#ifndef AR9003_RTT_H
-+#define AR9003_RTT_H
-+
-+void ar9003_hw_rtt_enable(struct ath_hw *ah);
-+void ar9003_hw_rtt_disable(struct ath_hw *ah);
-+void ar9003_hw_rtt_set_mask(struct ath_hw *ah, u32 rtt_mask);
-+bool ar9003_hw_rtt_force_restore(struct ath_hw *ah);
-+void ar9003_hw_rtt_load_hist(struct ath_hw *ah, u8 chain, u32 *table);
-+void ar9003_hw_rtt_fill_hist(struct ath_hw *ah, u8 chain, u32 *table);
-+void ar9003_hw_rtt_clear_hist(struct ath_hw *ah);
-+
-+#endif
---- /dev/null
-+++ b/drivers/net/wireless/ath/ath9k/ar9462_1p0_initvals.h
-@@ -0,0 +1,1833 @@
-+/*
-+ * Copyright (c) 2010 Atheros Communications Inc.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ */
-+
-+#ifndef INITVALS_9462_1P0_H
-+#define INITVALS_9462_1P0_H
-+
-+/* AR9462 1.0 */
-+
-+static const u32 ar9462_1p0_mac_core[][2] = {
-+ /* Addr allmodes */
-+ {0x00000008, 0x00000000},
-+ {0x00000030, 0x00060085},
-+ {0x00000034, 0x00000005},
-+ {0x00000040, 0x00000000},
-+ {0x00000044, 0x00000000},
-+ {0x00000048, 0x00000008},
-+ {0x0000004c, 0x00000010},
-+ {0x00000050, 0x00000000},
-+ {0x00001040, 0x002ffc0f},
-+ {0x00001044, 0x002ffc0f},
-+ {0x00001048, 0x002ffc0f},
-+ {0x0000104c, 0x002ffc0f},
-+ {0x00001050, 0x002ffc0f},
-+ {0x00001054, 0x002ffc0f},
-+ {0x00001058, 0x002ffc0f},
-+ {0x0000105c, 0x002ffc0f},
-+ {0x00001060, 0x002ffc0f},
-+ {0x00001064, 0x002ffc0f},
-+ {0x000010f0, 0x00000100},
-+ {0x00001270, 0x00000000},
-+ {0x000012b0, 0x00000000},
-+ {0x000012f0, 0x00000000},
-+ {0x0000143c, 0x00000000},
-+ {0x0000147c, 0x00000000},
-+ {0x00001810, 0x0f000003},
-+ {0x00008000, 0x00000000},
-+ {0x00008004, 0x00000000},
-+ {0x00008008, 0x00000000},
-+ {0x0000800c, 0x00000000},
-+ {0x00008018, 0x00000000},
-+ {0x00008020, 0x00000000},
-+ {0x00008038, 0x00000000},
-+ {0x0000803c, 0x00080000},
-+ {0x00008040, 0x00000000},
-+ {0x00008044, 0x00000000},
-+ {0x00008048, 0x00000000},
-+ {0x0000804c, 0xffffffff},
-+ {0x00008050, 0xffffffff},
-+ {0x00008054, 0x00000000},
-+ {0x00008058, 0x00000000},
-+ {0x0000805c, 0x000fc78f},
-+ {0x00008060, 0x0000000f},
-+ {0x00008064, 0x00000000},
-+ {0x00008070, 0x00000310},
-+ {0x00008074, 0x00000020},
-+ {0x00008078, 0x00000000},
-+ {0x0000809c, 0x0000000f},
-+ {0x000080a0, 0x00000000},
-+ {0x000080a4, 0x02ff0000},
-+ {0x000080a8, 0x0e070605},
-+ {0x000080ac, 0x0000000d},
-+ {0x000080b0, 0x00000000},
-+ {0x000080b4, 0x00000000},
-+ {0x000080b8, 0x00000000},
-+ {0x000080bc, 0x00000000},
-+ {0x000080c0, 0x2a800000},
-+ {0x000080c4, 0x06900168},
-+ {0x000080c8, 0x13881c20},
-+ {0x000080cc, 0x01f40000},
-+ {0x000080d0, 0x00252500},
-+ {0x000080d4, 0x00a00005},
-+ {0x000080d8, 0x00400002},
-+ {0x000080dc, 0x00000000},
-+ {0x000080e0, 0xffffffff},
-+ {0x000080e4, 0x0000ffff},
-+ {0x000080e8, 0x3f3f3f3f},
-+ {0x000080ec, 0x00000000},
-+ {0x000080f0, 0x00000000},
-+ {0x000080f4, 0x00000000},
-+ {0x000080fc, 0x00020000},
-+ {0x00008100, 0x00000000},
-+ {0x00008108, 0x00000052},
-+ {0x0000810c, 0x00000000},
-+ {0x00008110, 0x00000000},
-+ {0x00008114, 0x000007ff},
-+ {0x00008118, 0x000000aa},
-+ {0x0000811c, 0x00003210},
-+ {0x00008124, 0x00000000},
-+ {0x00008128, 0x00000000},
-+ {0x0000812c, 0x00000000},
-+ {0x00008130, 0x00000000},
-+ {0x00008134, 0x00000000},
-+ {0x00008138, 0x00000000},
-+ {0x0000813c, 0x0000ffff},
-+ {0x00008144, 0xffffffff},
-+ {0x00008168, 0x00000000},
-+ {0x0000816c, 0x00000000},
-+ {0x00008170, 0x18486e00},
-+ {0x00008174, 0x33332210},
-+ {0x00008178, 0x00000000},
-+ {0x0000817c, 0x00020000},
-+ {0x000081c4, 0x33332210},
-+ {0x000081c8, 0x00000000},
-+ {0x000081cc, 0x00000000},
-+ {0x000081d4, 0x00000000},
-+ {0x000081ec, 0x00000000},
-+ {0x000081f0, 0x00000000},
-+ {0x000081f4, 0x00000000},
-+ {0x000081f8, 0x00000000},
-+ {0x000081fc, 0x00000000},
-+ {0x00008240, 0x00100000},
-+ {0x00008244, 0x0010f400},
-+ {0x00008248, 0x00000800},
-+ {0x0000824c, 0x0001e800},
-+ {0x00008250, 0x00000000},
-+ {0x00008254, 0x00000000},
-+ {0x00008258, 0x00000000},
-+ {0x0000825c, 0x40000000},
-+ {0x00008260, 0x00080922},
-+ {0x00008264, 0x99c00010},
-+ {0x00008268, 0xffffffff},
-+ {0x0000826c, 0x0000ffff},
-+ {0x00008270, 0x00000000},
-+ {0x00008274, 0x40000000},
-+ {0x00008278, 0x003e4180},
-+ {0x0000827c, 0x00000004},
-+ {0x00008284, 0x0000002c},
-+ {0x00008288, 0x0000002c},
-+ {0x0000828c, 0x000000ff},
-+ {0x00008294, 0x00000000},
-+ {0x00008298, 0x00000000},
-+ {0x0000829c, 0x00000000},
-+ {0x00008300, 0x00000140},
-+ {0x00008314, 0x00000000},
-+ {0x0000831c, 0x0000010d},
-+ {0x00008328, 0x00000000},
-+ {0x0000832c, 0x0000001f},
-+ {0x00008330, 0x00000302},
-+ {0x00008334, 0x00000700},
-+ {0x00008338, 0xffff0000},
-+ {0x0000833c, 0x02400000},
-+ {0x00008340, 0x000107ff},
-+ {0x00008344, 0xaa48105b},
-+ {0x00008348, 0x008f0000},
-+ {0x0000835c, 0x00000000},
-+ {0x00008360, 0xffffffff},
-+ {0x00008364, 0xffffffff},
-+ {0x00008368, 0x00000000},
-+ {0x00008370, 0x00000000},
-+ {0x00008374, 0x000000ff},
-+ {0x00008378, 0x00000000},
-+ {0x0000837c, 0x00000000},
-+ {0x00008380, 0xffffffff},
-+ {0x00008384, 0xffffffff},
-+ {0x00008390, 0xffffffff},
-+ {0x00008394, 0xffffffff},
-+ {0x00008398, 0x00000000},
-+ {0x0000839c, 0x00000000},
-+ {0x000083a4, 0x0000fa14},
-+ {0x000083a8, 0x000f0c00},
-+ {0x000083ac, 0x33332210},
-+ {0x000083b0, 0x33332210},
-+ {0x000083b4, 0x33332210},
-+ {0x000083b8, 0x33332210},
-+ {0x000083bc, 0x00000000},
-+ {0x000083c0, 0x00000000},
-+ {0x000083c4, 0x00000000},
-+ {0x000083c8, 0x00000000},
-+ {0x000083cc, 0x00000200},
-+ {0x000083d0, 0x000301ff},
-+};
-+
-+static const u32 ar9462_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a398, 0x00000000},
-+ {0x0000a39c, 0x6f7f0301},
-+ {0x0000a3a0, 0xca9228ee},
-+};
-+
-+static const u32 ar9462_1p0_sys3ant[][2] = {
-+ /* Addr allmodes */
-+ {0x00063280, 0x00040807},
-+ {0x00063284, 0x104ccccc},
-+};
-+
-+static const u32 ar9462_pcie_phy_clkreq_enable_L1_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x00018c00, 0x10053e5e},
-+ {0x00018c04, 0x000801d8},
-+ {0x00018c08, 0x0000580c},
-+};
-+
-+static const u32 ar9462_1p0_mac_core_emulation[][2] = {
-+ /* Addr allmodes */
-+ {0x00000030, 0x00060085},
-+ {0x00000044, 0x00000008},
-+ {0x0000805c, 0xffffc7ff},
-+ {0x00008344, 0xaa4a105b},
-+};
-+
-+static const u32 ar9462_common_rx_gain_table_ar9280_2p0_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x02000101},
-+ {0x0000a004, 0x02000102},
-+ {0x0000a008, 0x02000103},
-+ {0x0000a00c, 0x02000104},
-+ {0x0000a010, 0x02000200},
-+ {0x0000a014, 0x02000201},
-+ {0x0000a018, 0x02000202},
-+ {0x0000a01c, 0x02000203},
-+ {0x0000a020, 0x02000204},
-+ {0x0000a024, 0x02000205},
-+ {0x0000a028, 0x02000208},
-+ {0x0000a02c, 0x02000302},
-+ {0x0000a030, 0x02000303},
-+ {0x0000a034, 0x02000304},
-+ {0x0000a038, 0x02000400},
-+ {0x0000a03c, 0x02010300},
-+ {0x0000a040, 0x02010301},
-+ {0x0000a044, 0x02010302},
-+ {0x0000a048, 0x02000500},
-+ {0x0000a04c, 0x02010400},
-+ {0x0000a050, 0x02020300},
-+ {0x0000a054, 0x02020301},
-+ {0x0000a058, 0x02020302},
-+ {0x0000a05c, 0x02020303},
-+ {0x0000a060, 0x02020400},
-+ {0x0000a064, 0x02030300},
-+ {0x0000a068, 0x02030301},
-+ {0x0000a06c, 0x02030302},
-+ {0x0000a070, 0x02030303},
-+ {0x0000a074, 0x02030400},
-+ {0x0000a078, 0x02040300},
-+ {0x0000a07c, 0x02040301},
-+ {0x0000a080, 0x02040302},
-+ {0x0000a084, 0x02040303},
-+ {0x0000a088, 0x02030500},
-+ {0x0000a08c, 0x02040400},
-+ {0x0000a090, 0x02050203},
-+ {0x0000a094, 0x02050204},
-+ {0x0000a098, 0x02050205},
-+ {0x0000a09c, 0x02040500},
-+ {0x0000a0a0, 0x02050301},
-+ {0x0000a0a4, 0x02050302},
-+ {0x0000a0a8, 0x02050303},
-+ {0x0000a0ac, 0x02050400},
-+ {0x0000a0b0, 0x02050401},
-+ {0x0000a0b4, 0x02050402},
-+ {0x0000a0b8, 0x02050403},
-+ {0x0000a0bc, 0x02050500},
-+ {0x0000a0c0, 0x02050501},
-+ {0x0000a0c4, 0x02050502},
-+ {0x0000a0c8, 0x02050503},
-+ {0x0000a0cc, 0x02050504},
-+ {0x0000a0d0, 0x02050600},
-+ {0x0000a0d4, 0x02050601},
-+ {0x0000a0d8, 0x02050602},
-+ {0x0000a0dc, 0x02050603},
-+ {0x0000a0e0, 0x02050604},
-+ {0x0000a0e4, 0x02050700},
-+ {0x0000a0e8, 0x02050701},
-+ {0x0000a0ec, 0x02050702},
-+ {0x0000a0f0, 0x02050703},
-+ {0x0000a0f4, 0x02050704},
-+ {0x0000a0f8, 0x02050705},
-+ {0x0000a0fc, 0x02050708},
-+ {0x0000a100, 0x02050709},
-+ {0x0000a104, 0x0205070a},
-+ {0x0000a108, 0x0205070b},
-+ {0x0000a10c, 0x0205070c},
-+ {0x0000a110, 0x0205070d},
-+ {0x0000a114, 0x02050710},
-+ {0x0000a118, 0x02050711},
-+ {0x0000a11c, 0x02050712},
-+ {0x0000a120, 0x02050713},
-+ {0x0000a124, 0x02050714},
-+ {0x0000a128, 0x02050715},
-+ {0x0000a12c, 0x02050730},
-+ {0x0000a130, 0x02050731},
-+ {0x0000a134, 0x02050732},
-+ {0x0000a138, 0x02050733},
-+ {0x0000a13c, 0x02050734},
-+ {0x0000a140, 0x02050735},
-+ {0x0000a144, 0x02050750},
-+ {0x0000a148, 0x02050751},
-+ {0x0000a14c, 0x02050752},
-+ {0x0000a150, 0x02050753},
-+ {0x0000a154, 0x02050754},
-+ {0x0000a158, 0x02050755},
-+ {0x0000a15c, 0x02050770},
-+ {0x0000a160, 0x02050771},
-+ {0x0000a164, 0x02050772},
-+ {0x0000a168, 0x02050773},
-+ {0x0000a16c, 0x02050774},
-+ {0x0000a170, 0x02050775},
-+ {0x0000a174, 0x00000776},
-+ {0x0000a178, 0x00000776},
-+ {0x0000a17c, 0x00000776},
-+ {0x0000a180, 0x00000776},
-+ {0x0000a184, 0x00000776},
-+ {0x0000a188, 0x00000776},
-+ {0x0000a18c, 0x00000776},
-+ {0x0000a190, 0x00000776},
-+ {0x0000a194, 0x00000776},
-+ {0x0000a198, 0x00000776},
-+ {0x0000a19c, 0x00000776},
-+ {0x0000a1a0, 0x00000776},
-+ {0x0000a1a4, 0x00000776},
-+ {0x0000a1a8, 0x00000776},
-+ {0x0000a1ac, 0x00000776},
-+ {0x0000a1b0, 0x00000776},
-+ {0x0000a1b4, 0x00000776},
-+ {0x0000a1b8, 0x00000776},
-+ {0x0000a1bc, 0x00000776},
-+ {0x0000a1c0, 0x00000776},
-+ {0x0000a1c4, 0x00000776},
-+ {0x0000a1c8, 0x00000776},
-+ {0x0000a1cc, 0x00000776},
-+ {0x0000a1d0, 0x00000776},
-+ {0x0000a1d4, 0x00000776},
-+ {0x0000a1d8, 0x00000776},
-+ {0x0000a1dc, 0x00000776},
-+ {0x0000a1e0, 0x00000776},
-+ {0x0000a1e4, 0x00000776},
-+ {0x0000a1e8, 0x00000776},
-+ {0x0000a1ec, 0x00000776},
-+ {0x0000a1f0, 0x00000776},
-+ {0x0000a1f4, 0x00000776},
-+ {0x0000a1f8, 0x00000776},
-+ {0x0000a1fc, 0x00000776},
-+ {0x0000b000, 0x02000101},
-+ {0x0000b004, 0x02000102},
-+ {0x0000b008, 0x02000103},
-+ {0x0000b00c, 0x02000104},
-+ {0x0000b010, 0x02000200},
-+ {0x0000b014, 0x02000201},
-+ {0x0000b018, 0x02000202},
-+ {0x0000b01c, 0x02000203},
-+ {0x0000b020, 0x02000204},
-+ {0x0000b024, 0x02000205},
-+ {0x0000b028, 0x02000208},
-+ {0x0000b02c, 0x02000302},
-+ {0x0000b030, 0x02000303},
-+ {0x0000b034, 0x02000304},
-+ {0x0000b038, 0x02000400},
-+ {0x0000b03c, 0x02010300},
-+ {0x0000b040, 0x02010301},
-+ {0x0000b044, 0x02010302},
-+ {0x0000b048, 0x02000500},
-+ {0x0000b04c, 0x02010400},
-+ {0x0000b050, 0x02020300},
-+ {0x0000b054, 0x02020301},
-+ {0x0000b058, 0x02020302},
-+ {0x0000b05c, 0x02020303},
-+ {0x0000b060, 0x02020400},
-+ {0x0000b064, 0x02030300},
-+ {0x0000b068, 0x02030301},
-+ {0x0000b06c, 0x02030302},
-+ {0x0000b070, 0x02030303},
-+ {0x0000b074, 0x02030400},
-+ {0x0000b078, 0x02040300},
-+ {0x0000b07c, 0x02040301},
-+ {0x0000b080, 0x02040302},
-+ {0x0000b084, 0x02040303},
-+ {0x0000b088, 0x02030500},
-+ {0x0000b08c, 0x02040400},
-+ {0x0000b090, 0x02050203},
-+ {0x0000b094, 0x02050204},
-+ {0x0000b098, 0x02050205},
-+ {0x0000b09c, 0x02040500},
-+ {0x0000b0a0, 0x02050301},
-+ {0x0000b0a4, 0x02050302},
-+ {0x0000b0a8, 0x02050303},
-+ {0x0000b0ac, 0x02050400},
-+ {0x0000b0b0, 0x02050401},
-+ {0x0000b0b4, 0x02050402},
-+ {0x0000b0b8, 0x02050403},
-+ {0x0000b0bc, 0x02050500},
-+ {0x0000b0c0, 0x02050501},
-+ {0x0000b0c4, 0x02050502},
-+ {0x0000b0c8, 0x02050503},
-+ {0x0000b0cc, 0x02050504},
-+ {0x0000b0d0, 0x02050600},
-+ {0x0000b0d4, 0x02050601},
-+ {0x0000b0d8, 0x02050602},
-+ {0x0000b0dc, 0x02050603},
-+ {0x0000b0e0, 0x02050604},
-+ {0x0000b0e4, 0x02050700},
-+ {0x0000b0e8, 0x02050701},
-+ {0x0000b0ec, 0x02050702},
-+ {0x0000b0f0, 0x02050703},
-+ {0x0000b0f4, 0x02050704},
-+ {0x0000b0f8, 0x02050705},
-+ {0x0000b0fc, 0x02050708},
-+ {0x0000b100, 0x02050709},
-+ {0x0000b104, 0x0205070a},
-+ {0x0000b108, 0x0205070b},
-+ {0x0000b10c, 0x0205070c},
-+ {0x0000b110, 0x0205070d},
-+ {0x0000b114, 0x02050710},
-+ {0x0000b118, 0x02050711},
-+ {0x0000b11c, 0x02050712},
-+ {0x0000b120, 0x02050713},
-+ {0x0000b124, 0x02050714},
-+ {0x0000b128, 0x02050715},
-+ {0x0000b12c, 0x02050730},
-+ {0x0000b130, 0x02050731},
-+ {0x0000b134, 0x02050732},
-+ {0x0000b138, 0x02050733},
-+ {0x0000b13c, 0x02050734},
-+ {0x0000b140, 0x02050735},
-+ {0x0000b144, 0x02050750},
-+ {0x0000b148, 0x02050751},
-+ {0x0000b14c, 0x02050752},
-+ {0x0000b150, 0x02050753},
-+ {0x0000b154, 0x02050754},
-+ {0x0000b158, 0x02050755},
-+ {0x0000b15c, 0x02050770},
-+ {0x0000b160, 0x02050771},
-+ {0x0000b164, 0x02050772},
-+ {0x0000b168, 0x02050773},
-+ {0x0000b16c, 0x02050774},
-+ {0x0000b170, 0x02050775},
-+ {0x0000b174, 0x00000776},
-+ {0x0000b178, 0x00000776},
-+ {0x0000b17c, 0x00000776},
-+ {0x0000b180, 0x00000776},
-+ {0x0000b184, 0x00000776},
-+ {0x0000b188, 0x00000776},
-+ {0x0000b18c, 0x00000776},
-+ {0x0000b190, 0x00000776},
-+ {0x0000b194, 0x00000776},
-+ {0x0000b198, 0x00000776},
-+ {0x0000b19c, 0x00000776},
-+ {0x0000b1a0, 0x00000776},
-+ {0x0000b1a4, 0x00000776},
-+ {0x0000b1a8, 0x00000776},
-+ {0x0000b1ac, 0x00000776},
-+ {0x0000b1b0, 0x00000776},
-+ {0x0000b1b4, 0x00000776},
-+ {0x0000b1b8, 0x00000776},
-+ {0x0000b1bc, 0x00000776},
-+ {0x0000b1c0, 0x00000776},
-+ {0x0000b1c4, 0x00000776},
-+ {0x0000b1c8, 0x00000776},
-+ {0x0000b1cc, 0x00000776},
-+ {0x0000b1d0, 0x00000776},
-+ {0x0000b1d4, 0x00000776},
-+ {0x0000b1d8, 0x00000776},
-+ {0x0000b1dc, 0x00000776},
-+ {0x0000b1e0, 0x00000776},
-+ {0x0000b1e4, 0x00000776},
-+ {0x0000b1e8, 0x00000776},
-+ {0x0000b1ec, 0x00000776},
-+ {0x0000b1f0, 0x00000776},
-+ {0x0000b1f4, 0x00000776},
-+ {0x0000b1f8, 0x00000776},
-+ {0x0000b1fc, 0x00000776},
-+};
-+
-+static const u32 ar9200_ar9280_2p0_radio_core_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x00007800, 0x00040000},
-+ {0x00007804, 0xdb005012},
-+ {0x00007808, 0x04924914},
-+ {0x0000780c, 0x21084210},
-+ {0x00007810, 0x6d801300},
-+ {0x00007814, 0x0019beff},
-+ {0x00007818, 0x07e41000},
-+ {0x0000781c, 0x00392000},
-+ {0x00007820, 0x92592480},
-+ {0x00007824, 0x00040000},
-+ {0x00007828, 0xdb005012},
-+ {0x0000782c, 0x04924914},
-+ {0x00007830, 0x21084210},
-+ {0x00007834, 0x6d801300},
-+ {0x00007838, 0x0019beff},
-+ {0x0000783c, 0x07e40000},
-+ {0x00007840, 0x00392000},
-+ {0x00007844, 0x92592480},
-+ {0x00007848, 0x00100000},
-+ {0x0000784c, 0x773f0567},
-+ {0x00007850, 0x54214514},
-+ {0x00007854, 0x12035828},
-+ {0x00007858, 0x92592692},
-+ {0x0000785c, 0x00000000},
-+ {0x00007860, 0x56400000},
-+ {0x00007864, 0x0a8e370e},
-+ {0x00007868, 0xc0102850},
-+ {0x0000786c, 0x812d4000},
-+ {0x00007870, 0x807ec400},
-+ {0x00007874, 0x001b6db0},
-+ {0x00007878, 0x00376b63},
-+ {0x0000787c, 0x06db6db6},
-+ {0x00007880, 0x006d8000},
-+ {0x00007884, 0xffeffffe},
-+ {0x00007888, 0xffeffffe},
-+ {0x0000788c, 0x00010000},
-+ {0x00007890, 0x02060aeb},
-+ {0x00007894, 0x5a108000},
-+};
-+
-+static const u32 ar9462_1p0_baseband_postamble_emulation[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
-+ {0x00009e44, 0x005c0000, 0x005c0000, 0x005c0000, 0x005c0000},
-+ {0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
-+ {0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-+ {0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
-+ {0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
-+ {0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
-+ {0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
-+ {0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
-+ {0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
-+ {0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
-+ {0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
-+ {0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
-+ {0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
-+ {0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
-+ {0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
-+ {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+};
-+
-+static const u32 ar9462_pcie_phy_pll_on_clkreq_disable_L1_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x00018c00, 0x10012e5e},
-+ {0x00018c04, 0x000801d8},
-+ {0x00018c08, 0x0000580c},
-+};
-+
-+static const u32 ar9462_common_rx_gain_table_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x00010000},
-+ {0x0000a004, 0x00030002},
-+ {0x0000a008, 0x00050004},
-+ {0x0000a00c, 0x00810080},
-+ {0x0000a010, 0x00830082},
-+ {0x0000a014, 0x01810180},
-+ {0x0000a018, 0x01830182},
-+ {0x0000a01c, 0x01850184},
-+ {0x0000a020, 0x01890188},
-+ {0x0000a024, 0x018b018a},
-+ {0x0000a028, 0x018d018c},
-+ {0x0000a02c, 0x01910190},
-+ {0x0000a030, 0x01930192},
-+ {0x0000a034, 0x01950194},
-+ {0x0000a038, 0x038a0196},
-+ {0x0000a03c, 0x038c038b},
-+ {0x0000a040, 0x0390038d},
-+ {0x0000a044, 0x03920391},
-+ {0x0000a048, 0x03940393},
-+ {0x0000a04c, 0x03960395},
-+ {0x0000a050, 0x00000000},
-+ {0x0000a054, 0x00000000},
-+ {0x0000a058, 0x00000000},
-+ {0x0000a05c, 0x00000000},
-+ {0x0000a060, 0x00000000},
-+ {0x0000a064, 0x00000000},
-+ {0x0000a068, 0x00000000},
-+ {0x0000a06c, 0x00000000},
-+ {0x0000a070, 0x00000000},
-+ {0x0000a074, 0x00000000},
-+ {0x0000a078, 0x00000000},
-+ {0x0000a07c, 0x00000000},
-+ {0x0000a080, 0x22222229},
-+ {0x0000a084, 0x1d1d1d1d},
-+ {0x0000a088, 0x1d1d1d1d},
-+ {0x0000a08c, 0x1d1d1d1d},
-+ {0x0000a090, 0x171d1d1d},
-+ {0x0000a094, 0x11111717},
-+ {0x0000a098, 0x00030311},
-+ {0x0000a09c, 0x00000000},
-+ {0x0000a0a0, 0x00000000},
-+ {0x0000a0a4, 0x00000000},
-+ {0x0000a0a8, 0x00000000},
-+ {0x0000a0ac, 0x00000000},
-+ {0x0000a0b0, 0x00000000},
-+ {0x0000a0b4, 0x00000000},
-+ {0x0000a0b8, 0x00000000},
-+ {0x0000a0bc, 0x00000000},
-+ {0x0000a0c0, 0x001f0000},
-+ {0x0000a0c4, 0x01000101},
-+ {0x0000a0c8, 0x011e011f},
-+ {0x0000a0cc, 0x011c011d},
-+ {0x0000a0d0, 0x02030204},
-+ {0x0000a0d4, 0x02010202},
-+ {0x0000a0d8, 0x021f0200},
-+ {0x0000a0dc, 0x0302021e},
-+ {0x0000a0e0, 0x03000301},
-+ {0x0000a0e4, 0x031e031f},
-+ {0x0000a0e8, 0x0402031d},
-+ {0x0000a0ec, 0x04000401},
-+ {0x0000a0f0, 0x041e041f},
-+ {0x0000a0f4, 0x0502041d},
-+ {0x0000a0f8, 0x05000501},
-+ {0x0000a0fc, 0x051e051f},
-+ {0x0000a100, 0x06010602},
-+ {0x0000a104, 0x061f0600},
-+ {0x0000a108, 0x061d061e},
-+ {0x0000a10c, 0x07020703},
-+ {0x0000a110, 0x07000701},
-+ {0x0000a114, 0x00000000},
-+ {0x0000a118, 0x00000000},
-+ {0x0000a11c, 0x00000000},
-+ {0x0000a120, 0x00000000},
-+ {0x0000a124, 0x00000000},
-+ {0x0000a128, 0x00000000},
-+ {0x0000a12c, 0x00000000},
-+ {0x0000a130, 0x00000000},
-+ {0x0000a134, 0x00000000},
-+ {0x0000a138, 0x00000000},
-+ {0x0000a13c, 0x00000000},
-+ {0x0000a140, 0x001f0000},
-+ {0x0000a144, 0x01000101},
-+ {0x0000a148, 0x011e011f},
-+ {0x0000a14c, 0x011c011d},
-+ {0x0000a150, 0x02030204},
-+ {0x0000a154, 0x02010202},
-+ {0x0000a158, 0x021f0200},
-+ {0x0000a15c, 0x0302021e},
-+ {0x0000a160, 0x03000301},
-+ {0x0000a164, 0x031e031f},
-+ {0x0000a168, 0x0402031d},
-+ {0x0000a16c, 0x04000401},
-+ {0x0000a170, 0x041e041f},
-+ {0x0000a174, 0x0502041d},
-+ {0x0000a178, 0x05000501},
-+ {0x0000a17c, 0x051e051f},
-+ {0x0000a180, 0x06010602},
-+ {0x0000a184, 0x061f0600},
-+ {0x0000a188, 0x061d061e},
-+ {0x0000a18c, 0x07020703},
-+ {0x0000a190, 0x07000701},
-+ {0x0000a194, 0x00000000},
-+ {0x0000a198, 0x00000000},
-+ {0x0000a19c, 0x00000000},
-+ {0x0000a1a0, 0x00000000},
-+ {0x0000a1a4, 0x00000000},
-+ {0x0000a1a8, 0x00000000},
-+ {0x0000a1ac, 0x00000000},
-+ {0x0000a1b0, 0x00000000},
-+ {0x0000a1b4, 0x00000000},
-+ {0x0000a1b8, 0x00000000},
-+ {0x0000a1bc, 0x00000000},
-+ {0x0000a1c0, 0x00000000},
-+ {0x0000a1c4, 0x00000000},
-+ {0x0000a1c8, 0x00000000},
-+ {0x0000a1cc, 0x00000000},
-+ {0x0000a1d0, 0x00000000},
-+ {0x0000a1d4, 0x00000000},
-+ {0x0000a1d8, 0x00000000},
-+ {0x0000a1dc, 0x00000000},
-+ {0x0000a1e0, 0x00000000},
-+ {0x0000a1e4, 0x00000000},
-+ {0x0000a1e8, 0x00000000},
-+ {0x0000a1ec, 0x00000000},
-+ {0x0000a1f0, 0x00000396},
-+ {0x0000a1f4, 0x00000396},
-+ {0x0000a1f8, 0x00000396},
-+ {0x0000a1fc, 0x00000196},
-+ {0x0000b000, 0x00010000},
-+ {0x0000b004, 0x00030002},
-+ {0x0000b008, 0x00050004},
-+ {0x0000b00c, 0x00810080},
-+ {0x0000b010, 0x00830082},
-+ {0x0000b014, 0x01810180},
-+ {0x0000b018, 0x01830182},
-+ {0x0000b01c, 0x01850184},
-+ {0x0000b020, 0x02810280},
-+ {0x0000b024, 0x02830282},
-+ {0x0000b028, 0x02850284},
-+ {0x0000b02c, 0x02890288},
-+ {0x0000b030, 0x028b028a},
-+ {0x0000b034, 0x0388028c},
-+ {0x0000b038, 0x038a0389},
-+ {0x0000b03c, 0x038c038b},
-+ {0x0000b040, 0x0390038d},
-+ {0x0000b044, 0x03920391},
-+ {0x0000b048, 0x03940393},
-+ {0x0000b04c, 0x03960395},
-+ {0x0000b050, 0x00000000},
-+ {0x0000b054, 0x00000000},
-+ {0x0000b058, 0x00000000},
-+ {0x0000b05c, 0x00000000},
-+ {0x0000b060, 0x00000000},
-+ {0x0000b064, 0x00000000},
-+ {0x0000b068, 0x00000000},
-+ {0x0000b06c, 0x00000000},
-+ {0x0000b070, 0x00000000},
-+ {0x0000b074, 0x00000000},
-+ {0x0000b078, 0x00000000},
-+ {0x0000b07c, 0x00000000},
-+ {0x0000b080, 0x2a2d2f32},
-+ {0x0000b084, 0x21232328},
-+ {0x0000b088, 0x19191c1e},
-+ {0x0000b08c, 0x12141417},
-+ {0x0000b090, 0x07070e0e},
-+ {0x0000b094, 0x03030305},
-+ {0x0000b098, 0x00000003},
-+ {0x0000b09c, 0x00000000},
-+ {0x0000b0a0, 0x00000000},
-+ {0x0000b0a4, 0x00000000},
-+ {0x0000b0a8, 0x00000000},
-+ {0x0000b0ac, 0x00000000},
-+ {0x0000b0b0, 0x00000000},
-+ {0x0000b0b4, 0x00000000},
-+ {0x0000b0b8, 0x00000000},
-+ {0x0000b0bc, 0x00000000},
-+ {0x0000b0c0, 0x003f0020},
-+ {0x0000b0c4, 0x00400041},
-+ {0x0000b0c8, 0x0140005f},
-+ {0x0000b0cc, 0x0160015f},
-+ {0x0000b0d0, 0x017e017f},
-+ {0x0000b0d4, 0x02410242},
-+ {0x0000b0d8, 0x025f0240},
-+ {0x0000b0dc, 0x027f0260},
-+ {0x0000b0e0, 0x0341027e},
-+ {0x0000b0e4, 0x035f0340},
-+ {0x0000b0e8, 0x037f0360},
-+ {0x0000b0ec, 0x04400441},
-+ {0x0000b0f0, 0x0460045f},
-+ {0x0000b0f4, 0x0541047f},
-+ {0x0000b0f8, 0x055f0540},
-+ {0x0000b0fc, 0x057f0560},
-+ {0x0000b100, 0x06400641},
-+ {0x0000b104, 0x0660065f},
-+ {0x0000b108, 0x067e067f},
-+ {0x0000b10c, 0x07410742},
-+ {0x0000b110, 0x075f0740},
-+ {0x0000b114, 0x077f0760},
-+ {0x0000b118, 0x07800781},
-+ {0x0000b11c, 0x07a0079f},
-+ {0x0000b120, 0x07c107bf},
-+ {0x0000b124, 0x000007c0},
-+ {0x0000b128, 0x00000000},
-+ {0x0000b12c, 0x00000000},
-+ {0x0000b130, 0x00000000},
-+ {0x0000b134, 0x00000000},
-+ {0x0000b138, 0x00000000},
-+ {0x0000b13c, 0x00000000},
-+ {0x0000b140, 0x003f0020},
-+ {0x0000b144, 0x00400041},
-+ {0x0000b148, 0x0140005f},
-+ {0x0000b14c, 0x0160015f},
-+ {0x0000b150, 0x017e017f},
-+ {0x0000b154, 0x02410242},
-+ {0x0000b158, 0x025f0240},
-+ {0x0000b15c, 0x027f0260},
-+ {0x0000b160, 0x0341027e},
-+ {0x0000b164, 0x035f0340},
-+ {0x0000b168, 0x037f0360},
-+ {0x0000b16c, 0x04400441},
-+ {0x0000b170, 0x0460045f},
-+ {0x0000b174, 0x0541047f},
-+ {0x0000b178, 0x055f0540},
-+ {0x0000b17c, 0x057f0560},
-+ {0x0000b180, 0x06400641},
-+ {0x0000b184, 0x0660065f},
-+ {0x0000b188, 0x067e067f},
-+ {0x0000b18c, 0x07410742},
-+ {0x0000b190, 0x075f0740},
-+ {0x0000b194, 0x077f0760},
-+ {0x0000b198, 0x07800781},
-+ {0x0000b19c, 0x07a0079f},
-+ {0x0000b1a0, 0x07c107bf},
-+ {0x0000b1a4, 0x000007c0},
-+ {0x0000b1a8, 0x00000000},
-+ {0x0000b1ac, 0x00000000},
-+ {0x0000b1b0, 0x00000000},
-+ {0x0000b1b4, 0x00000000},
-+ {0x0000b1b8, 0x00000000},
-+ {0x0000b1bc, 0x00000000},
-+ {0x0000b1c0, 0x00000000},
-+ {0x0000b1c4, 0x00000000},
-+ {0x0000b1c8, 0x00000000},
-+ {0x0000b1cc, 0x00000000},
-+ {0x0000b1d0, 0x00000000},
-+ {0x0000b1d4, 0x00000000},
-+ {0x0000b1d8, 0x00000000},
-+ {0x0000b1dc, 0x00000000},
-+ {0x0000b1e0, 0x00000000},
-+ {0x0000b1e4, 0x00000000},
-+ {0x0000b1e8, 0x00000000},
-+ {0x0000b1ec, 0x00000000},
-+ {0x0000b1f0, 0x00000396},
-+ {0x0000b1f4, 0x00000396},
-+ {0x0000b1f8, 0x00000396},
-+ {0x0000b1fc, 0x00000196},
-+};
-+
-+static const u32 ar9462_modes_high_ob_db_tx_gain_table_1p0[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-+ {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-+ {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-+ {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
-+ {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
-+ {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
-+ {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
-+ {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
-+ {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
-+ {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
-+ {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
-+ {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
-+ {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
-+ {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
-+ {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
-+ {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
-+ {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
-+ {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
-+ {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
-+ {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
-+ {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
-+ {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
-+ {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
-+ {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
-+ {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
-+ {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
-+ {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
-+ {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
-+ {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
-+ {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
-+ {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
-+ {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
-+ {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
-+ {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
-+ {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
-+ {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-+ {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-+ {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-+ {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
-+ {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-+ {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
-+};
-+
-+static const u32 ar9462_common_wo_xlna_rx_gain_table_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x00010000},
-+ {0x0000a004, 0x00030002},
-+ {0x0000a008, 0x00050004},
-+ {0x0000a00c, 0x00810080},
-+ {0x0000a010, 0x00830082},
-+ {0x0000a014, 0x01810180},
-+ {0x0000a018, 0x01830182},
-+ {0x0000a01c, 0x01850184},
-+ {0x0000a020, 0x01890188},
-+ {0x0000a024, 0x018b018a},
-+ {0x0000a028, 0x018d018c},
-+ {0x0000a02c, 0x03820190},
-+ {0x0000a030, 0x03840383},
-+ {0x0000a034, 0x03880385},
-+ {0x0000a038, 0x038a0389},
-+ {0x0000a03c, 0x038c038b},
-+ {0x0000a040, 0x0390038d},
-+ {0x0000a044, 0x03920391},
-+ {0x0000a048, 0x03940393},
-+ {0x0000a04c, 0x03960395},
-+ {0x0000a050, 0x00000000},
-+ {0x0000a054, 0x00000000},
-+ {0x0000a058, 0x00000000},
-+ {0x0000a05c, 0x00000000},
-+ {0x0000a060, 0x00000000},
-+ {0x0000a064, 0x00000000},
-+ {0x0000a068, 0x00000000},
-+ {0x0000a06c, 0x00000000},
-+ {0x0000a070, 0x00000000},
-+ {0x0000a074, 0x00000000},
-+ {0x0000a078, 0x00000000},
-+ {0x0000a07c, 0x00000000},
-+ {0x0000a080, 0x29292929},
-+ {0x0000a084, 0x29292929},
-+ {0x0000a088, 0x29292929},
-+ {0x0000a08c, 0x29292929},
-+ {0x0000a090, 0x22292929},
-+ {0x0000a094, 0x1d1d2222},
-+ {0x0000a098, 0x0c111117},
-+ {0x0000a09c, 0x00030303},
-+ {0x0000a0a0, 0x00000000},
-+ {0x0000a0a4, 0x00000000},
-+ {0x0000a0a8, 0x00000000},
-+ {0x0000a0ac, 0x00000000},
-+ {0x0000a0b0, 0x00000000},
-+ {0x0000a0b4, 0x00000000},
-+ {0x0000a0b8, 0x00000000},
-+ {0x0000a0bc, 0x00000000},
-+ {0x0000a0c0, 0x001f0000},
-+ {0x0000a0c4, 0x01000101},
-+ {0x0000a0c8, 0x011e011f},
-+ {0x0000a0cc, 0x011c011d},
-+ {0x0000a0d0, 0x02030204},
-+ {0x0000a0d4, 0x02010202},
-+ {0x0000a0d8, 0x021f0200},
-+ {0x0000a0dc, 0x0302021e},
-+ {0x0000a0e0, 0x03000301},
-+ {0x0000a0e4, 0x031e031f},
-+ {0x0000a0e8, 0x0402031d},
-+ {0x0000a0ec, 0x04000401},
-+ {0x0000a0f0, 0x041e041f},
-+ {0x0000a0f4, 0x0502041d},
-+ {0x0000a0f8, 0x05000501},
-+ {0x0000a0fc, 0x051e051f},
-+ {0x0000a100, 0x06010602},
-+ {0x0000a104, 0x061f0600},
-+ {0x0000a108, 0x061d061e},
-+ {0x0000a10c, 0x07020703},
-+ {0x0000a110, 0x07000701},
-+ {0x0000a114, 0x00000000},
-+ {0x0000a118, 0x00000000},
-+ {0x0000a11c, 0x00000000},
-+ {0x0000a120, 0x00000000},
-+ {0x0000a124, 0x00000000},
-+ {0x0000a128, 0x00000000},
-+ {0x0000a12c, 0x00000000},
-+ {0x0000a130, 0x00000000},
-+ {0x0000a134, 0x00000000},
-+ {0x0000a138, 0x00000000},
-+ {0x0000a13c, 0x00000000},
-+ {0x0000a140, 0x001f0000},
-+ {0x0000a144, 0x01000101},
-+ {0x0000a148, 0x011e011f},
-+ {0x0000a14c, 0x011c011d},
-+ {0x0000a150, 0x02030204},
-+ {0x0000a154, 0x02010202},
-+ {0x0000a158, 0x021f0200},
-+ {0x0000a15c, 0x0302021e},
-+ {0x0000a160, 0x03000301},
-+ {0x0000a164, 0x031e031f},
-+ {0x0000a168, 0x0402031d},
-+ {0x0000a16c, 0x04000401},
-+ {0x0000a170, 0x041e041f},
-+ {0x0000a174, 0x0502041d},
-+ {0x0000a178, 0x05000501},
-+ {0x0000a17c, 0x051e051f},
-+ {0x0000a180, 0x06010602},
-+ {0x0000a184, 0x061f0600},
-+ {0x0000a188, 0x061d061e},
-+ {0x0000a18c, 0x07020703},
-+ {0x0000a190, 0x07000701},
-+ {0x0000a194, 0x00000000},
-+ {0x0000a198, 0x00000000},
-+ {0x0000a19c, 0x00000000},
-+ {0x0000a1a0, 0x00000000},
-+ {0x0000a1a4, 0x00000000},
-+ {0x0000a1a8, 0x00000000},
-+ {0x0000a1ac, 0x00000000},
-+ {0x0000a1b0, 0x00000000},
-+ {0x0000a1b4, 0x00000000},
-+ {0x0000a1b8, 0x00000000},
-+ {0x0000a1bc, 0x00000000},
-+ {0x0000a1c0, 0x00000000},
-+ {0x0000a1c4, 0x00000000},
-+ {0x0000a1c8, 0x00000000},
-+ {0x0000a1cc, 0x00000000},
-+ {0x0000a1d0, 0x00000000},
-+ {0x0000a1d4, 0x00000000},
-+ {0x0000a1d8, 0x00000000},
-+ {0x0000a1dc, 0x00000000},
-+ {0x0000a1e0, 0x00000000},
-+ {0x0000a1e4, 0x00000000},
-+ {0x0000a1e8, 0x00000000},
-+ {0x0000a1ec, 0x00000000},
-+ {0x0000a1f0, 0x00000396},
-+ {0x0000a1f4, 0x00000396},
-+ {0x0000a1f8, 0x00000396},
-+ {0x0000a1fc, 0x00000196},
-+ {0x0000b000, 0x00010000},
-+ {0x0000b004, 0x00030002},
-+ {0x0000b008, 0x00050004},
-+ {0x0000b00c, 0x00810080},
-+ {0x0000b010, 0x00830082},
-+ {0x0000b014, 0x01810180},
-+ {0x0000b018, 0x01830182},
-+ {0x0000b01c, 0x01850184},
-+ {0x0000b020, 0x02810280},
-+ {0x0000b024, 0x02830282},
-+ {0x0000b028, 0x02850284},
-+ {0x0000b02c, 0x02890288},
-+ {0x0000b030, 0x028b028a},
-+ {0x0000b034, 0x0388028c},
-+ {0x0000b038, 0x038a0389},
-+ {0x0000b03c, 0x038c038b},
-+ {0x0000b040, 0x0390038d},
-+ {0x0000b044, 0x03920391},
-+ {0x0000b048, 0x03940393},
-+ {0x0000b04c, 0x03960395},
-+ {0x0000b050, 0x00000000},
-+ {0x0000b054, 0x00000000},
-+ {0x0000b058, 0x00000000},
-+ {0x0000b05c, 0x00000000},
-+ {0x0000b060, 0x00000000},
-+ {0x0000b064, 0x00000000},
-+ {0x0000b068, 0x00000000},
-+ {0x0000b06c, 0x00000000},
-+ {0x0000b070, 0x00000000},
-+ {0x0000b074, 0x00000000},
-+ {0x0000b078, 0x00000000},
-+ {0x0000b07c, 0x00000000},
-+ {0x0000b080, 0x32323232},
-+ {0x0000b084, 0x2f2f3232},
-+ {0x0000b088, 0x23282a2d},
-+ {0x0000b08c, 0x1c1e2123},
-+ {0x0000b090, 0x14171919},
-+ {0x0000b094, 0x0e0e1214},
-+ {0x0000b098, 0x03050707},
-+ {0x0000b09c, 0x00030303},
-+ {0x0000b0a0, 0x00000000},
-+ {0x0000b0a4, 0x00000000},
-+ {0x0000b0a8, 0x00000000},
-+ {0x0000b0ac, 0x00000000},
-+ {0x0000b0b0, 0x00000000},
-+ {0x0000b0b4, 0x00000000},
-+ {0x0000b0b8, 0x00000000},
-+ {0x0000b0bc, 0x00000000},
-+ {0x0000b0c0, 0x003f0020},
-+ {0x0000b0c4, 0x00400041},
-+ {0x0000b0c8, 0x0140005f},
-+ {0x0000b0cc, 0x0160015f},
-+ {0x0000b0d0, 0x017e017f},
-+ {0x0000b0d4, 0x02410242},
-+ {0x0000b0d8, 0x025f0240},
-+ {0x0000b0dc, 0x027f0260},
-+ {0x0000b0e0, 0x0341027e},
-+ {0x0000b0e4, 0x035f0340},
-+ {0x0000b0e8, 0x037f0360},
-+ {0x0000b0ec, 0x04400441},
-+ {0x0000b0f0, 0x0460045f},
-+ {0x0000b0f4, 0x0541047f},
-+ {0x0000b0f8, 0x055f0540},
-+ {0x0000b0fc, 0x057f0560},
-+ {0x0000b100, 0x06400641},
-+ {0x0000b104, 0x0660065f},
-+ {0x0000b108, 0x067e067f},
-+ {0x0000b10c, 0x07410742},
-+ {0x0000b110, 0x075f0740},
-+ {0x0000b114, 0x077f0760},
-+ {0x0000b118, 0x07800781},
-+ {0x0000b11c, 0x07a0079f},
-+ {0x0000b120, 0x07c107bf},
-+ {0x0000b124, 0x000007c0},
-+ {0x0000b128, 0x00000000},
-+ {0x0000b12c, 0x00000000},
-+ {0x0000b130, 0x00000000},
-+ {0x0000b134, 0x00000000},
-+ {0x0000b138, 0x00000000},
-+ {0x0000b13c, 0x00000000},
-+ {0x0000b140, 0x003f0020},
-+ {0x0000b144, 0x00400041},
-+ {0x0000b148, 0x0140005f},
-+ {0x0000b14c, 0x0160015f},
-+ {0x0000b150, 0x017e017f},
-+ {0x0000b154, 0x02410242},
-+ {0x0000b158, 0x025f0240},
-+ {0x0000b15c, 0x027f0260},
-+ {0x0000b160, 0x0341027e},
-+ {0x0000b164, 0x035f0340},
-+ {0x0000b168, 0x037f0360},
-+ {0x0000b16c, 0x04400441},
-+ {0x0000b170, 0x0460045f},
-+ {0x0000b174, 0x0541047f},
-+ {0x0000b178, 0x055f0540},
-+ {0x0000b17c, 0x057f0560},
-+ {0x0000b180, 0x06400641},
-+ {0x0000b184, 0x0660065f},
-+ {0x0000b188, 0x067e067f},
-+ {0x0000b18c, 0x07410742},
-+ {0x0000b190, 0x075f0740},
-+ {0x0000b194, 0x077f0760},
-+ {0x0000b198, 0x07800781},
-+ {0x0000b19c, 0x07a0079f},
-+ {0x0000b1a0, 0x07c107bf},
-+ {0x0000b1a4, 0x000007c0},
-+ {0x0000b1a8, 0x00000000},
-+ {0x0000b1ac, 0x00000000},
-+ {0x0000b1b0, 0x00000000},
-+ {0x0000b1b4, 0x00000000},
-+ {0x0000b1b8, 0x00000000},
-+ {0x0000b1bc, 0x00000000},
-+ {0x0000b1c0, 0x00000000},
-+ {0x0000b1c4, 0x00000000},
-+ {0x0000b1c8, 0x00000000},
-+ {0x0000b1cc, 0x00000000},
-+ {0x0000b1d0, 0x00000000},
-+ {0x0000b1d4, 0x00000000},
-+ {0x0000b1d8, 0x00000000},
-+ {0x0000b1dc, 0x00000000},
-+ {0x0000b1e0, 0x00000000},
-+ {0x0000b1e4, 0x00000000},
-+ {0x0000b1e8, 0x00000000},
-+ {0x0000b1ec, 0x00000000},
-+ {0x0000b1f0, 0x00000396},
-+ {0x0000b1f4, 0x00000396},
-+ {0x0000b1f8, 0x00000396},
-+ {0x0000b1fc, 0x00000196},
-+};
-+
-+static const u32 ar9462_1p0_mac_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
-+ {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
-+ {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
-+ {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
-+ {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
-+ {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
-+ {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
-+ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
-+};
-+
-+static const u32 ar9462_1p0_mac_postamble_emulation[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
-+ {0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
-+};
-+
-+static const u32 ar9462_1p0_tx_gain_table_baseband_postamble_emulation[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
-+ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
-+ {0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
-+ {0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
-+ {0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
-+ {0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
-+ {0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
-+ {0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
-+ {0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
-+ {0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
-+ {0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
-+ {0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
-+ {0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
-+};
-+
-+static const u32 ar9462_1p0_radio_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
-+ {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24646c08, 0x24646c08},
-+ {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
-+ {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
-+ {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
-+ {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
-+ {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
-+};
-+
-+static const u32 ar9462_1p0_soc_postamble_emulation[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00007010, 0x00001133, 0x00001133, 0x00001133, 0x00001133},
-+};
-+
-+static const u32 ar9462_1p0_baseband_core[][2] = {
-+ /* Addr allmodes */
-+ {0x00009800, 0xafe68e30},
-+ {0x00009804, 0xfd14e000},
-+ {0x00009808, 0x9c0a9f6b},
-+ {0x0000980c, 0x04900000},
-+ {0x00009814, 0x9280c00a},
-+ {0x00009818, 0x00000000},
-+ {0x0000981c, 0x00020028},
-+ {0x00009834, 0x6400a290},
-+ {0x00009838, 0x0108ecff},
-+ {0x0000983c, 0x0d000600},
-+ {0x00009880, 0x201fff00},
-+ {0x00009884, 0x00001042},
-+ {0x000098a4, 0x00200400},
-+ {0x000098b0, 0x32840bbe},
-+ {0x000098d0, 0x004b6a8e},
-+ {0x000098d4, 0x00000820},
-+ {0x000098dc, 0x00000000},
-+ {0x000098e4, 0x01ffffff},
-+ {0x000098e8, 0x01ffffff},
-+ {0x000098ec, 0x01ffffff},
-+ {0x000098f0, 0x00000000},
-+ {0x000098f4, 0x00000000},
-+ {0x00009c04, 0xff55ff55},
-+ {0x00009c08, 0x0320ff55},
-+ {0x00009c0c, 0x00000000},
-+ {0x00009c10, 0x00000000},
-+ {0x00009c14, 0x00046384},
-+ {0x00009c18, 0x05b6b440},
-+ {0x00009c1c, 0x00b6b440},
-+ {0x00009d00, 0xc080a333},
-+ {0x00009d04, 0x40206c10},
-+ {0x00009d08, 0x009c4060},
-+ {0x00009d0c, 0x9883800a},
-+ {0x00009d10, 0x01834061},
-+ {0x00009d14, 0x00c0040b},
-+ {0x00009d18, 0x00000000},
-+ {0x00009e08, 0x0038230c},
-+ {0x00009e24, 0x990bb514},
-+ {0x00009e28, 0x0c6f0000},
-+ {0x00009e30, 0x06336f77},
-+ {0x00009e34, 0x6af6532f},
-+ {0x00009e38, 0x0cc80c00},
-+ {0x00009e40, 0x0d261820},
-+ {0x00009e4c, 0x00001004},
-+ {0x00009e50, 0x00ff03f1},
-+ {0x00009e54, 0x64c355c7},
-+ {0x00009e58, 0xfd897735},
-+ {0x00009e5c, 0xe9198724},
-+ {0x00009fc0, 0x803e4788},
-+ {0x00009fc4, 0x0001efb5},
-+ {0x00009fcc, 0x40000014},
-+ {0x00009fd0, 0x01193b93},
-+ {0x0000a20c, 0x00000000},
-+ {0x0000a220, 0x00000000},
-+ {0x0000a224, 0x00000000},
-+ {0x0000a228, 0x10002310},
-+ {0x0000a23c, 0x00000000},
-+ {0x0000a244, 0x0c000000},
-+ {0x0000a2a0, 0x00000001},
-+ {0x0000a2c0, 0x00000001},
-+ {0x0000a2c8, 0x00000000},
-+ {0x0000a2cc, 0x18c43433},
-+ {0x0000a2d4, 0x00000000},
-+ {0x0000a2ec, 0x00000000},
-+ {0x0000a2f0, 0x00000000},
-+ {0x0000a2f4, 0x00000000},
-+ {0x0000a2f8, 0x00000000},
-+ {0x0000a344, 0x00000000},
-+ {0x0000a34c, 0x00000000},
-+ {0x0000a350, 0x0000a000},
-+ {0x0000a364, 0x00000000},
-+ {0x0000a370, 0x00000000},
-+ {0x0000a390, 0x00000001},
-+ {0x0000a394, 0x00000444},
-+ {0x0000a398, 0x001f0e0f},
-+ {0x0000a39c, 0x0075393f},
-+ {0x0000a3a0, 0xb79f6427},
-+ {0x0000a3a4, 0x00000000},
-+ {0x0000a3a8, 0xaaaaaaaa},
-+ {0x0000a3ac, 0x3c466478},
-+ {0x0000a3c0, 0x20202020},
-+ {0x0000a3c4, 0x22222220},
-+ {0x0000a3c8, 0x20200020},
-+ {0x0000a3cc, 0x20202020},
-+ {0x0000a3d0, 0x20202020},
-+ {0x0000a3d4, 0x20202020},
-+ {0x0000a3d8, 0x20202020},
-+ {0x0000a3dc, 0x20202020},
-+ {0x0000a3e0, 0x20202020},
-+ {0x0000a3e4, 0x20202020},
-+ {0x0000a3e8, 0x20202020},
-+ {0x0000a3ec, 0x20202020},
-+ {0x0000a3f0, 0x00000000},
-+ {0x0000a3f4, 0x00000006},
-+ {0x0000a3f8, 0x0c9bd380},
-+ {0x0000a3fc, 0x000f0f01},
-+ {0x0000a400, 0x8fa91f01},
-+ {0x0000a404, 0x00000000},
-+ {0x0000a408, 0x0e79e5c6},
-+ {0x0000a40c, 0x00820820},
-+ {0x0000a414, 0x1ce739ce},
-+ {0x0000a418, 0x2d001dce},
-+ {0x0000a41c, 0x1ce739ce},
-+ {0x0000a420, 0x000001ce},
-+ {0x0000a424, 0x1ce739ce},
-+ {0x0000a428, 0x000001ce},
-+ {0x0000a42c, 0x1ce739ce},
-+ {0x0000a430, 0x1ce739ce},
-+ {0x0000a434, 0x00000000},
-+ {0x0000a438, 0x00001801},
-+ {0x0000a43c, 0x00100000},
-+ {0x0000a440, 0x00000000},
-+ {0x0000a444, 0x00000000},
-+ {0x0000a448, 0x05000080},
-+ {0x0000a44c, 0x00000001},
-+ {0x0000a450, 0x00010000},
-+ {0x0000a458, 0x00000000},
-+ {0x0000a644, 0xbfad9d74},
-+ {0x0000a648, 0x0048060a},
-+ {0x0000a64c, 0x00003c37},
-+ {0x0000a670, 0x03020100},
-+ {0x0000a674, 0x09080504},
-+ {0x0000a678, 0x0d0c0b0a},
-+ {0x0000a67c, 0x13121110},
-+ {0x0000a680, 0x31301514},
-+ {0x0000a684, 0x35343332},
-+ {0x0000a688, 0x00000036},
-+ {0x0000a690, 0x00000838},
-+ {0x0000a6b0, 0x0000000a},
-+ {0x0000a6b4, 0x28f12c01},
-+ {0x0000a7c0, 0x00000000},
-+ {0x0000a7c4, 0xfffffffc},
-+ {0x0000a7c8, 0x00000000},
-+ {0x0000a7cc, 0x00000000},
-+ {0x0000a7d0, 0x00000000},
-+ {0x0000a7d4, 0x00000004},
-+ {0x0000a7dc, 0x00000001},
-+ {0x0000a8d0, 0x004b6a8e},
-+ {0x0000a8d4, 0x00000820},
-+ {0x0000a8dc, 0x00000000},
-+ {0x0000a8f0, 0x00000000},
-+ {0x0000a8f4, 0x00000000},
-+ {0x0000b2d0, 0x00000080},
-+ {0x0000b2d4, 0x00000000},
-+ {0x0000b2ec, 0x00000000},
-+ {0x0000b2f0, 0x00000000},
-+ {0x0000b2f4, 0x00000000},
-+ {0x0000b2f8, 0x00000000},
-+ {0x0000b408, 0x0e79e5c0},
-+ {0x0000b40c, 0x00820820},
-+ {0x0000b420, 0x00000000},
-+ {0x0000b6b0, 0x0000000a},
-+ {0x0000b6b4, 0x00c00001},
-+};
-+
-+static const u32 ar9462_1p0_baseband_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
-+ {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
-+ {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
-+ {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
-+ {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
-+ {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
-+ {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
-+ {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
-+ {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
-+ {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
-+ {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
-+ {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e},
-+ {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
-+ {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
-+ {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
-+ {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
-+ {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},
-+ {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
-+ {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
-+ {0x0000a204, 0x0131b7c0, 0x0131b7c4, 0x0131b7c4, 0x0131b7c0},
-+ {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
-+ {0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
-+ {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
-+ {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
-+ {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
-+ {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
-+ {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
-+ {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
-+ {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
-+ {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
-+ {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-+ {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
-+ {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
-+ {0x0000a288, 0x00000110, 0x00000110, 0x00100110, 0x00100110},
-+ {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
-+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
-+ {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
-+ {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
-+ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-+ {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
-+ {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-+ {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
-+ {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
-+};
-+
-+static const u32 ar9462_modes_fast_clock_1p0[][3] = {
-+ /* Addr 5G_HT20 5G_HT40 */
-+ {0x00001030, 0x00000268, 0x000004d0},
-+ {0x00001070, 0x0000018c, 0x00000318},
-+ {0x000010b0, 0x00000fd0, 0x00001fa0},
-+ {0x00008014, 0x044c044c, 0x08980898},
-+ {0x0000801c, 0x148ec02b, 0x148ec057},
-+ {0x00008318, 0x000044c0, 0x00008980},
-+ {0x00009e00, 0x0372131c, 0x0372131c},
-+ {0x0000a230, 0x0000400b, 0x00004016},
-+ {0x0000a254, 0x00000898, 0x00001130},
-+};
-+
-+static const u32 ar9462_modes_low_ob_db_tx_gain_table_1p0[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-+ {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-+ {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-+ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
-+ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
-+ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
-+ {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
-+ {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
-+ {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
-+ {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
-+ {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
-+ {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
-+ {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
-+ {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
-+ {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
-+ {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
-+ {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
-+ {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
-+ {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
-+ {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
-+ {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
-+ {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
-+ {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
-+ {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
-+ {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
-+ {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
-+ {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
-+ {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
-+ {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
-+ {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
-+ {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
-+ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
-+ {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
-+ {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
-+ {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-+ {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-+ {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-+ {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
-+ {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-+ {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
-+};
-+
-+static const u32 ar9462_1p0_soc_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
-+};
-+
-+static const u32 ar9462_common_mixed_rx_gain_table_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x00010000},
-+ {0x0000a004, 0x00030002},
-+ {0x0000a008, 0x00050004},
-+ {0x0000a00c, 0x00810080},
-+ {0x0000a010, 0x00830082},
-+ {0x0000a014, 0x01810180},
-+ {0x0000a018, 0x01830182},
-+ {0x0000a01c, 0x01850184},
-+ {0x0000a020, 0x01890188},
-+ {0x0000a024, 0x018b018a},
-+ {0x0000a028, 0x018d018c},
-+ {0x0000a02c, 0x03820190},
-+ {0x0000a030, 0x03840383},
-+ {0x0000a034, 0x03880385},
-+ {0x0000a038, 0x038a0389},
-+ {0x0000a03c, 0x038c038b},
-+ {0x0000a040, 0x0390038d},
-+ {0x0000a044, 0x03920391},
-+ {0x0000a048, 0x03940393},
-+ {0x0000a04c, 0x03960395},
-+ {0x0000a050, 0x00000000},
-+ {0x0000a054, 0x00000000},
-+ {0x0000a058, 0x00000000},
-+ {0x0000a05c, 0x00000000},
-+ {0x0000a060, 0x00000000},
-+ {0x0000a064, 0x00000000},
-+ {0x0000a068, 0x00000000},
-+ {0x0000a06c, 0x00000000},
-+ {0x0000a070, 0x00000000},
-+ {0x0000a074, 0x00000000},
-+ {0x0000a078, 0x00000000},
-+ {0x0000a07c, 0x00000000},
-+ {0x0000a080, 0x29292929},
-+ {0x0000a084, 0x29292929},
-+ {0x0000a088, 0x29292929},
-+ {0x0000a08c, 0x29292929},
-+ {0x0000a090, 0x22292929},
-+ {0x0000a094, 0x1d1d2222},
-+ {0x0000a098, 0x0c111117},
-+ {0x0000a09c, 0x00030303},
-+ {0x0000a0a0, 0x00000000},
-+ {0x0000a0a4, 0x00000000},
-+ {0x0000a0a8, 0x00000000},
-+ {0x0000a0ac, 0x00000000},
-+ {0x0000a0b0, 0x00000000},
-+ {0x0000a0b4, 0x00000000},
-+ {0x0000a0b8, 0x00000000},
-+ {0x0000a0bc, 0x00000000},
-+ {0x0000a0c0, 0x001f0000},
-+ {0x0000a0c4, 0x01000101},
-+ {0x0000a0c8, 0x011e011f},
-+ {0x0000a0cc, 0x011c011d},
-+ {0x0000a0d0, 0x02030204},
-+ {0x0000a0d4, 0x02010202},
-+ {0x0000a0d8, 0x021f0200},
-+ {0x0000a0dc, 0x0302021e},
-+ {0x0000a0e0, 0x03000301},
-+ {0x0000a0e4, 0x031e031f},
-+ {0x0000a0e8, 0x0402031d},
-+ {0x0000a0ec, 0x04000401},
-+ {0x0000a0f0, 0x041e041f},
-+ {0x0000a0f4, 0x0502041d},
-+ {0x0000a0f8, 0x05000501},
-+ {0x0000a0fc, 0x051e051f},
-+ {0x0000a100, 0x06010602},
-+ {0x0000a104, 0x061f0600},
-+ {0x0000a108, 0x061d061e},
-+ {0x0000a10c, 0x07020703},
-+ {0x0000a110, 0x07000701},
-+ {0x0000a114, 0x00000000},
-+ {0x0000a118, 0x00000000},
-+ {0x0000a11c, 0x00000000},
-+ {0x0000a120, 0x00000000},
-+ {0x0000a124, 0x00000000},
-+ {0x0000a128, 0x00000000},
-+ {0x0000a12c, 0x00000000},
-+ {0x0000a130, 0x00000000},
-+ {0x0000a134, 0x00000000},
-+ {0x0000a138, 0x00000000},
-+ {0x0000a13c, 0x00000000},
-+ {0x0000a140, 0x001f0000},
-+ {0x0000a144, 0x01000101},
-+ {0x0000a148, 0x011e011f},
-+ {0x0000a14c, 0x011c011d},
-+ {0x0000a150, 0x02030204},
-+ {0x0000a154, 0x02010202},
-+ {0x0000a158, 0x021f0200},
-+ {0x0000a15c, 0x0302021e},
-+ {0x0000a160, 0x03000301},
-+ {0x0000a164, 0x031e031f},
-+ {0x0000a168, 0x0402031d},
-+ {0x0000a16c, 0x04000401},
-+ {0x0000a170, 0x041e041f},
-+ {0x0000a174, 0x0502041d},
-+ {0x0000a178, 0x05000501},
-+ {0x0000a17c, 0x051e051f},
-+ {0x0000a180, 0x06010602},
-+ {0x0000a184, 0x061f0600},
-+ {0x0000a188, 0x061d061e},
-+ {0x0000a18c, 0x07020703},
-+ {0x0000a190, 0x07000701},
-+ {0x0000a194, 0x00000000},
-+ {0x0000a198, 0x00000000},
-+ {0x0000a19c, 0x00000000},
-+ {0x0000a1a0, 0x00000000},
-+ {0x0000a1a4, 0x00000000},
-+ {0x0000a1a8, 0x00000000},
-+ {0x0000a1ac, 0x00000000},
-+ {0x0000a1b0, 0x00000000},
-+ {0x0000a1b4, 0x00000000},
-+ {0x0000a1b8, 0x00000000},
-+ {0x0000a1bc, 0x00000000},
-+ {0x0000a1c0, 0x00000000},
-+ {0x0000a1c4, 0x00000000},
-+ {0x0000a1c8, 0x00000000},
-+ {0x0000a1cc, 0x00000000},
-+ {0x0000a1d0, 0x00000000},
-+ {0x0000a1d4, 0x00000000},
-+ {0x0000a1d8, 0x00000000},
-+ {0x0000a1dc, 0x00000000},
-+ {0x0000a1e0, 0x00000000},
-+ {0x0000a1e4, 0x00000000},
-+ {0x0000a1e8, 0x00000000},
-+ {0x0000a1ec, 0x00000000},
-+ {0x0000a1f0, 0x00000396},
-+ {0x0000a1f4, 0x00000396},
-+ {0x0000a1f8, 0x00000396},
-+ {0x0000a1fc, 0x00000196},
-+ {0x0000b000, 0x00010000},
-+ {0x0000b004, 0x00030002},
-+ {0x0000b008, 0x00050004},
-+ {0x0000b00c, 0x00810080},
-+ {0x0000b010, 0x00830082},
-+ {0x0000b014, 0x01810180},
-+ {0x0000b018, 0x01830182},
-+ {0x0000b01c, 0x01850184},
-+ {0x0000b020, 0x02810280},
-+ {0x0000b024, 0x02830282},
-+ {0x0000b028, 0x02850284},
-+ {0x0000b02c, 0x02890288},
-+ {0x0000b030, 0x028b028a},
-+ {0x0000b034, 0x0388028c},
-+ {0x0000b038, 0x038a0389},
-+ {0x0000b03c, 0x038c038b},
-+ {0x0000b040, 0x0390038d},
-+ {0x0000b044, 0x03920391},
-+ {0x0000b048, 0x03940393},
-+ {0x0000b04c, 0x03960395},
-+ {0x0000b050, 0x00000000},
-+ {0x0000b054, 0x00000000},
-+ {0x0000b058, 0x00000000},
-+ {0x0000b05c, 0x00000000},
-+ {0x0000b060, 0x00000000},
-+ {0x0000b064, 0x00000000},
-+ {0x0000b068, 0x00000000},
-+ {0x0000b06c, 0x00000000},
-+ {0x0000b070, 0x00000000},
-+ {0x0000b074, 0x00000000},
-+ {0x0000b078, 0x00000000},
-+ {0x0000b07c, 0x00000000},
-+ {0x0000b080, 0x2a2d2f32},
-+ {0x0000b084, 0x21232328},
-+ {0x0000b088, 0x19191c1e},
-+ {0x0000b08c, 0x12141417},
-+ {0x0000b090, 0x07070e0e},
-+ {0x0000b094, 0x03030305},
-+ {0x0000b098, 0x00000003},
-+ {0x0000b09c, 0x00000000},
-+ {0x0000b0a0, 0x00000000},
-+ {0x0000b0a4, 0x00000000},
-+ {0x0000b0a8, 0x00000000},
-+ {0x0000b0ac, 0x00000000},
-+ {0x0000b0b0, 0x00000000},
-+ {0x0000b0b4, 0x00000000},
-+ {0x0000b0b8, 0x00000000},
-+ {0x0000b0bc, 0x00000000},
-+ {0x0000b0c0, 0x003f0020},
-+ {0x0000b0c4, 0x00400041},
-+ {0x0000b0c8, 0x0140005f},
-+ {0x0000b0cc, 0x0160015f},
-+ {0x0000b0d0, 0x017e017f},
-+ {0x0000b0d4, 0x02410242},
-+ {0x0000b0d8, 0x025f0240},
-+ {0x0000b0dc, 0x027f0260},
-+ {0x0000b0e0, 0x0341027e},
-+ {0x0000b0e4, 0x035f0340},
-+ {0x0000b0e8, 0x037f0360},
-+ {0x0000b0ec, 0x04400441},
-+ {0x0000b0f0, 0x0460045f},
-+ {0x0000b0f4, 0x0541047f},
-+ {0x0000b0f8, 0x055f0540},
-+ {0x0000b0fc, 0x057f0560},
-+ {0x0000b100, 0x06400641},
-+ {0x0000b104, 0x0660065f},
-+ {0x0000b108, 0x067e067f},
-+ {0x0000b10c, 0x07410742},
-+ {0x0000b110, 0x075f0740},
-+ {0x0000b114, 0x077f0760},
-+ {0x0000b118, 0x07800781},
-+ {0x0000b11c, 0x07a0079f},
-+ {0x0000b120, 0x07c107bf},
-+ {0x0000b124, 0x000007c0},
-+ {0x0000b128, 0x00000000},
-+ {0x0000b12c, 0x00000000},
-+ {0x0000b130, 0x00000000},
-+ {0x0000b134, 0x00000000},
-+ {0x0000b138, 0x00000000},
-+ {0x0000b13c, 0x00000000},
-+ {0x0000b140, 0x003f0020},
-+ {0x0000b144, 0x00400041},
-+ {0x0000b148, 0x0140005f},
-+ {0x0000b14c, 0x0160015f},
-+ {0x0000b150, 0x017e017f},
-+ {0x0000b154, 0x02410242},
-+ {0x0000b158, 0x025f0240},
-+ {0x0000b15c, 0x027f0260},
-+ {0x0000b160, 0x0341027e},
-+ {0x0000b164, 0x035f0340},
-+ {0x0000b168, 0x037f0360},
-+ {0x0000b16c, 0x04400441},
-+ {0x0000b170, 0x0460045f},
-+ {0x0000b174, 0x0541047f},
-+ {0x0000b178, 0x055f0540},
-+ {0x0000b17c, 0x057f0560},
-+ {0x0000b180, 0x06400641},
-+ {0x0000b184, 0x0660065f},
-+ {0x0000b188, 0x067e067f},
-+ {0x0000b18c, 0x07410742},
-+ {0x0000b190, 0x075f0740},
-+ {0x0000b194, 0x077f0760},
-+ {0x0000b198, 0x07800781},
-+ {0x0000b19c, 0x07a0079f},
-+ {0x0000b1a0, 0x07c107bf},
-+ {0x0000b1a4, 0x000007c0},
-+ {0x0000b1a8, 0x00000000},
-+ {0x0000b1ac, 0x00000000},
-+ {0x0000b1b0, 0x00000000},
-+ {0x0000b1b4, 0x00000000},
-+ {0x0000b1b8, 0x00000000},
-+ {0x0000b1bc, 0x00000000},
-+ {0x0000b1c0, 0x00000000},
-+ {0x0000b1c4, 0x00000000},
-+ {0x0000b1c8, 0x00000000},
-+ {0x0000b1cc, 0x00000000},
-+ {0x0000b1d0, 0x00000000},
-+ {0x0000b1d4, 0x00000000},
-+ {0x0000b1d8, 0x00000000},
-+ {0x0000b1dc, 0x00000000},
-+ {0x0000b1e0, 0x00000000},
-+ {0x0000b1e4, 0x00000000},
-+ {0x0000b1e8, 0x00000000},
-+ {0x0000b1ec, 0x00000000},
-+ {0x0000b1f0, 0x00000396},
-+ {0x0000b1f4, 0x00000396},
-+ {0x0000b1f8, 0x00000396},
-+ {0x0000b1fc, 0x00000196},
-+};
-+
-+static const u32 ar9462_pcie_phy_clkreq_disable_L1_1p0[][2] = {
-+ /* Addr allmodes */
-+ {0x00018c00, 0x10013e5e},
-+ {0x00018c04, 0x000801d8},
-+ {0x00018c08, 0x0000580c},
-+};
-+
-+static const u32 ar9462_1p0_baseband_core_emulation[][2] = {
-+ /* Addr allmodes */
-+ {0x00009800, 0xafa68e30},
-+ {0x00009884, 0x00002842},
-+ {0x00009c04, 0xff55ff55},
-+ {0x00009c08, 0x0320ff55},
-+ {0x00009e50, 0x00000000},
-+ {0x00009fcc, 0x00000014},
-+ {0x0000a344, 0x00000010},
-+ {0x0000a398, 0x00000000},
-+ {0x0000a39c, 0x71733d01},
-+ {0x0000a3a0, 0xd0ad5c12},
-+ {0x0000a3c0, 0x22222220},
-+ {0x0000a3c4, 0x22222222},
-+ {0x0000a404, 0x00418a11},
-+ {0x0000a418, 0x050001ce},
-+ {0x0000a438, 0x00001800},
-+ {0x0000a458, 0x01444452},
-+ {0x0000a644, 0x3fad9d74},
-+ {0x0000a690, 0x00000038},
-+};
-+
-+static const u32 ar9462_1p0_radio_core[][2] = {
-+ /* Addr allmodes */
-+ {0x00016000, 0x36db6db6},
-+ {0x00016004, 0x6db6db40},
-+ {0x00016008, 0x73f00000},
-+ {0x0001600c, 0x00000000},
-+ {0x00016010, 0x6d820001},
-+ {0x00016040, 0x7f80fff8},
-+ {0x0001604c, 0x2699e04f},
-+ {0x00016050, 0x6db6db6c},
-+ {0x00016054, 0x6db60000},
-+ {0x00016058, 0x6c200000},
-+ {0x00016080, 0x00040000},
-+ {0x00016084, 0x9a68048c},
-+ {0x00016088, 0x54214514},
-+ {0x0001608c, 0x12030409},
-+ {0x00016090, 0x24926490},
-+ {0x00016098, 0xd2888888},
-+ {0x000160a0, 0x0a108ffe},
-+ {0x000160a4, 0x812fc490},
-+ {0x000160a8, 0x423c8000},
-+ {0x000160b4, 0x92000000},
-+ {0x000160b8, 0x0285dddc},
-+ {0x000160bc, 0x02908888},
-+ {0x000160c0, 0x00adb6d0},
-+ {0x000160c4, 0x6db6db60},
-+ {0x000160c8, 0x6db6db6c},
-+ {0x000160cc, 0x0de6c1b0},
-+ {0x00016100, 0x3fffbe04},
-+ {0x00016104, 0xfff80000},
-+ {0x00016108, 0x00200400},
-+ {0x00016110, 0x00000000},
-+ {0x00016144, 0x02084080},
-+ {0x00016148, 0x000080c0},
-+ {0x00016280, 0x050a0001},
-+ {0x00016284, 0x3d841400},
-+ {0x00016288, 0x00000000},
-+ {0x0001628c, 0xe3000000},
-+ {0x00016290, 0xa1005080},
-+ {0x00016294, 0x00000020},
-+ {0x00016298, 0x50a02900},
-+ {0x00016340, 0x121e4276},
-+ {0x00016344, 0x00300000},
-+ {0x00016400, 0x36db6db6},
-+ {0x00016404, 0x6db6db40},
-+ {0x00016408, 0x73f00000},
-+ {0x0001640c, 0x00000000},
-+ {0x00016410, 0x6c800001},
-+ {0x00016440, 0x7f80fff8},
-+ {0x0001644c, 0x4699e04f},
-+ {0x00016450, 0x6db6db6c},
-+ {0x00016454, 0x6db60000},
-+ {0x00016500, 0x3fffbe04},
-+ {0x00016504, 0xfff80000},
-+ {0x00016508, 0x00200400},
-+ {0x00016510, 0x00000000},
-+ {0x00016544, 0x02084080},
-+ {0x00016548, 0x000080c0},
-+};
-+
-+static const u32 ar9462_1p0_soc_preamble[][2] = {
-+ /* Addr allmodes */
-+ {0x00007020, 0x00000000},
-+ {0x00007034, 0x00000002},
-+ {0x00007038, 0x000004c2},
-+};
-+
-+static const u32 ar9462_1p0_sys2ant[][2] = {
-+ /* Addr allmodes */
-+ {0x00063120, 0x00801980},
-+};
-+
-+#endif /* INITVALS_9462_1P0_H */
---- /dev/null
-+++ b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
-@@ -0,0 +1,1928 @@
-+/*
-+ * Copyright (c) 2010 Atheros Communications Inc.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ */
-+
-+#ifndef INITVALS_9462_2P0_H
-+#define INITVALS_9462_2P0_H
-+
-+/* AR9462 2.0 */
-+
-+static const u32 ar9462_modes_fast_clock_2p0[][3] = {
-+ /* Addr 5G_HT20 5G_HT40 */
-+ {0x00001030, 0x00000268, 0x000004d0},
-+ {0x00001070, 0x0000018c, 0x00000318},
-+ {0x000010b0, 0x00000fd0, 0x00001fa0},
-+ {0x00008014, 0x044c044c, 0x08980898},
-+ {0x0000801c, 0x148ec02b, 0x148ec057},
-+ {0x00008318, 0x000044c0, 0x00008980},
-+ {0x00009e00, 0x0372131c, 0x0372131c},
-+ {0x0000a230, 0x0000400b, 0x00004016},
-+ {0x0000a254, 0x00000898, 0x00001130},
-+};
-+
-+static const u32 ar9462_pciephy_clkreq_enable_L1_2p0[][2] = {
-+ /* Addr allmodes */
-+ {0x00018c00, 0x18253ede},
-+ {0x00018c04, 0x000801d8},
-+ {0x00018c08, 0x0003580c},
-+};
-+
-+static const u32 ar9462_2p0_baseband_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
-+ {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
-+ {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
-+ {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
-+ {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
-+ {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
-+ {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
-+ {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
-+ {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
-+ {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
-+ {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
-+ {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3039605e, 0x33795d5e},
-+ {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
-+ {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
-+ {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
-+ {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
-+ {0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
-+ {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
-+ {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
-+ {0x0000a204, 0x013187c0, 0x013187c4, 0x013187c4, 0x013187c0},
-+ {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
-+ {0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
-+ {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
-+ {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
-+ {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
-+ {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
-+ {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
-+ {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
-+ {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
-+ {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
-+ {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-+ {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
-+ {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
-+ {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
-+ {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
-+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
-+ {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
-+ {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
-+ {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-+ {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
-+ {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-+ {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
-+ {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
-+};
-+
-+static const u32 ar9462_2p0_mac_core_emulation[][2] = {
-+ /* Addr allmodes */
-+ {0x00000030, 0x000e0085},
-+ {0x00000044, 0x00000008},
-+ {0x0000805c, 0xffffc7ff},
-+ {0x00008344, 0xaa4a105b},
-+};
-+
-+static const u32 ar9462_common_rx_gain_table_2p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x00010000},
-+ {0x0000a004, 0x00030002},
-+ {0x0000a008, 0x00050004},
-+ {0x0000a00c, 0x00810080},
-+ {0x0000a010, 0x00830082},
-+ {0x0000a014, 0x01810180},
-+ {0x0000a018, 0x01830182},
-+ {0x0000a01c, 0x01850184},
-+ {0x0000a020, 0x01890188},
-+ {0x0000a024, 0x018b018a},
-+ {0x0000a028, 0x018d018c},
-+ {0x0000a02c, 0x01910190},
-+ {0x0000a030, 0x01930192},
-+ {0x0000a034, 0x01950194},
-+ {0x0000a038, 0x038a0196},
-+ {0x0000a03c, 0x038c038b},
-+ {0x0000a040, 0x0390038d},
-+ {0x0000a044, 0x03920391},
-+ {0x0000a048, 0x03940393},
-+ {0x0000a04c, 0x03960395},
-+ {0x0000a050, 0x00000000},
-+ {0x0000a054, 0x00000000},
-+ {0x0000a058, 0x00000000},
-+ {0x0000a05c, 0x00000000},
-+ {0x0000a060, 0x00000000},
-+ {0x0000a064, 0x00000000},
-+ {0x0000a068, 0x00000000},
-+ {0x0000a06c, 0x00000000},
-+ {0x0000a070, 0x00000000},
-+ {0x0000a074, 0x00000000},
-+ {0x0000a078, 0x00000000},
-+ {0x0000a07c, 0x00000000},
-+ {0x0000a080, 0x22222229},
-+ {0x0000a084, 0x1d1d1d1d},
-+ {0x0000a088, 0x1d1d1d1d},
-+ {0x0000a08c, 0x1d1d1d1d},
-+ {0x0000a090, 0x171d1d1d},
-+ {0x0000a094, 0x11111717},
-+ {0x0000a098, 0x00030311},
-+ {0x0000a09c, 0x00000000},
-+ {0x0000a0a0, 0x00000000},
-+ {0x0000a0a4, 0x00000000},
-+ {0x0000a0a8, 0x00000000},
-+ {0x0000a0ac, 0x00000000},
-+ {0x0000a0b0, 0x00000000},
-+ {0x0000a0b4, 0x00000000},
-+ {0x0000a0b8, 0x00000000},
-+ {0x0000a0bc, 0x00000000},
-+ {0x0000a0c0, 0x001f0000},
-+ {0x0000a0c4, 0x01000101},
-+ {0x0000a0c8, 0x011e011f},
-+ {0x0000a0cc, 0x011c011d},
-+ {0x0000a0d0, 0x02030204},
-+ {0x0000a0d4, 0x02010202},
-+ {0x0000a0d8, 0x021f0200},
-+ {0x0000a0dc, 0x0302021e},
-+ {0x0000a0e0, 0x03000301},
-+ {0x0000a0e4, 0x031e031f},
-+ {0x0000a0e8, 0x0402031d},
-+ {0x0000a0ec, 0x04000401},
-+ {0x0000a0f0, 0x041e041f},
-+ {0x0000a0f4, 0x0502041d},
-+ {0x0000a0f8, 0x05000501},
-+ {0x0000a0fc, 0x051e051f},
-+ {0x0000a100, 0x06010602},
-+ {0x0000a104, 0x061f0600},
-+ {0x0000a108, 0x061d061e},
-+ {0x0000a10c, 0x07020703},
-+ {0x0000a110, 0x07000701},
-+ {0x0000a114, 0x00000000},
-+ {0x0000a118, 0x00000000},
-+ {0x0000a11c, 0x00000000},
-+ {0x0000a120, 0x00000000},
-+ {0x0000a124, 0x00000000},
-+ {0x0000a128, 0x00000000},
-+ {0x0000a12c, 0x00000000},
-+ {0x0000a130, 0x00000000},
-+ {0x0000a134, 0x00000000},
-+ {0x0000a138, 0x00000000},
-+ {0x0000a13c, 0x00000000},
-+ {0x0000a140, 0x001f0000},
-+ {0x0000a144, 0x01000101},
-+ {0x0000a148, 0x011e011f},
-+ {0x0000a14c, 0x011c011d},
-+ {0x0000a150, 0x02030204},
-+ {0x0000a154, 0x02010202},
-+ {0x0000a158, 0x021f0200},
-+ {0x0000a15c, 0x0302021e},
-+ {0x0000a160, 0x03000301},
-+ {0x0000a164, 0x031e031f},
-+ {0x0000a168, 0x0402031d},
-+ {0x0000a16c, 0x04000401},
-+ {0x0000a170, 0x041e041f},
-+ {0x0000a174, 0x0502041d},
-+ {0x0000a178, 0x05000501},
-+ {0x0000a17c, 0x051e051f},
-+ {0x0000a180, 0x06010602},
-+ {0x0000a184, 0x061f0600},
-+ {0x0000a188, 0x061d061e},
-+ {0x0000a18c, 0x07020703},
-+ {0x0000a190, 0x07000701},
-+ {0x0000a194, 0x00000000},
-+ {0x0000a198, 0x00000000},
-+ {0x0000a19c, 0x00000000},
-+ {0x0000a1a0, 0x00000000},
-+ {0x0000a1a4, 0x00000000},
-+ {0x0000a1a8, 0x00000000},
-+ {0x0000a1ac, 0x00000000},
-+ {0x0000a1b0, 0x00000000},
-+ {0x0000a1b4, 0x00000000},
-+ {0x0000a1b8, 0x00000000},
-+ {0x0000a1bc, 0x00000000},
-+ {0x0000a1c0, 0x00000000},
-+ {0x0000a1c4, 0x00000000},
-+ {0x0000a1c8, 0x00000000},
-+ {0x0000a1cc, 0x00000000},
-+ {0x0000a1d0, 0x00000000},
-+ {0x0000a1d4, 0x00000000},
-+ {0x0000a1d8, 0x00000000},
-+ {0x0000a1dc, 0x00000000},
-+ {0x0000a1e0, 0x00000000},
-+ {0x0000a1e4, 0x00000000},
-+ {0x0000a1e8, 0x00000000},
-+ {0x0000a1ec, 0x00000000},
-+ {0x0000a1f0, 0x00000396},
-+ {0x0000a1f4, 0x00000396},
-+ {0x0000a1f8, 0x00000396},
-+ {0x0000a1fc, 0x00000196},
-+ {0x0000b000, 0x00010000},
-+ {0x0000b004, 0x00030002},
-+ {0x0000b008, 0x00050004},
-+ {0x0000b00c, 0x00810080},
-+ {0x0000b010, 0x00830082},
-+ {0x0000b014, 0x01810180},
-+ {0x0000b018, 0x01830182},
-+ {0x0000b01c, 0x01850184},
-+ {0x0000b020, 0x02810280},
-+ {0x0000b024, 0x02830282},
-+ {0x0000b028, 0x02850284},
-+ {0x0000b02c, 0x02890288},
-+ {0x0000b030, 0x028b028a},
-+ {0x0000b034, 0x0388028c},
-+ {0x0000b038, 0x038a0389},
-+ {0x0000b03c, 0x038c038b},
-+ {0x0000b040, 0x0390038d},
-+ {0x0000b044, 0x03920391},
-+ {0x0000b048, 0x03940393},
-+ {0x0000b04c, 0x03960395},
-+ {0x0000b050, 0x00000000},
-+ {0x0000b054, 0x00000000},
-+ {0x0000b058, 0x00000000},
-+ {0x0000b05c, 0x00000000},
-+ {0x0000b060, 0x00000000},
-+ {0x0000b064, 0x00000000},
-+ {0x0000b068, 0x00000000},
-+ {0x0000b06c, 0x00000000},
-+ {0x0000b070, 0x00000000},
-+ {0x0000b074, 0x00000000},
-+ {0x0000b078, 0x00000000},
-+ {0x0000b07c, 0x00000000},
-+ {0x0000b080, 0x2a2d2f32},
-+ {0x0000b084, 0x21232328},
-+ {0x0000b088, 0x19191c1e},
-+ {0x0000b08c, 0x12141417},
-+ {0x0000b090, 0x07070e0e},
-+ {0x0000b094, 0x03030305},
-+ {0x0000b098, 0x00000003},
-+ {0x0000b09c, 0x00000000},
-+ {0x0000b0a0, 0x00000000},
-+ {0x0000b0a4, 0x00000000},
-+ {0x0000b0a8, 0x00000000},
-+ {0x0000b0ac, 0x00000000},
-+ {0x0000b0b0, 0x00000000},
-+ {0x0000b0b4, 0x00000000},
-+ {0x0000b0b8, 0x00000000},
-+ {0x0000b0bc, 0x00000000},
-+ {0x0000b0c0, 0x003f0020},
-+ {0x0000b0c4, 0x00400041},
-+ {0x0000b0c8, 0x0140005f},
-+ {0x0000b0cc, 0x0160015f},
-+ {0x0000b0d0, 0x017e017f},
-+ {0x0000b0d4, 0x02410242},
-+ {0x0000b0d8, 0x025f0240},
-+ {0x0000b0dc, 0x027f0260},
-+ {0x0000b0e0, 0x0341027e},
-+ {0x0000b0e4, 0x035f0340},
-+ {0x0000b0e8, 0x037f0360},
-+ {0x0000b0ec, 0x04400441},
-+ {0x0000b0f0, 0x0460045f},
-+ {0x0000b0f4, 0x0541047f},
-+ {0x0000b0f8, 0x055f0540},
-+ {0x0000b0fc, 0x057f0560},
-+ {0x0000b100, 0x06400641},
-+ {0x0000b104, 0x0660065f},
-+ {0x0000b108, 0x067e067f},
-+ {0x0000b10c, 0x07410742},
-+ {0x0000b110, 0x075f0740},
-+ {0x0000b114, 0x077f0760},
-+ {0x0000b118, 0x07800781},
-+ {0x0000b11c, 0x07a0079f},
-+ {0x0000b120, 0x07c107bf},
-+ {0x0000b124, 0x000007c0},
-+ {0x0000b128, 0x00000000},
-+ {0x0000b12c, 0x00000000},
-+ {0x0000b130, 0x00000000},
-+ {0x0000b134, 0x00000000},
-+ {0x0000b138, 0x00000000},
-+ {0x0000b13c, 0x00000000},
-+ {0x0000b140, 0x003f0020},
-+ {0x0000b144, 0x00400041},
-+ {0x0000b148, 0x0140005f},
-+ {0x0000b14c, 0x0160015f},
-+ {0x0000b150, 0x017e017f},
-+ {0x0000b154, 0x02410242},
-+ {0x0000b158, 0x025f0240},
-+ {0x0000b15c, 0x027f0260},
-+ {0x0000b160, 0x0341027e},
-+ {0x0000b164, 0x035f0340},
-+ {0x0000b168, 0x037f0360},
-+ {0x0000b16c, 0x04400441},
-+ {0x0000b170, 0x0460045f},
-+ {0x0000b174, 0x0541047f},
-+ {0x0000b178, 0x055f0540},
-+ {0x0000b17c, 0x057f0560},
-+ {0x0000b180, 0x06400641},
-+ {0x0000b184, 0x0660065f},
-+ {0x0000b188, 0x067e067f},
-+ {0x0000b18c, 0x07410742},
-+ {0x0000b190, 0x075f0740},
-+ {0x0000b194, 0x077f0760},
-+ {0x0000b198, 0x07800781},
-+ {0x0000b19c, 0x07a0079f},
-+ {0x0000b1a0, 0x07c107bf},
-+ {0x0000b1a4, 0x000007c0},
-+ {0x0000b1a8, 0x00000000},
-+ {0x0000b1ac, 0x00000000},
-+ {0x0000b1b0, 0x00000000},
-+ {0x0000b1b4, 0x00000000},
-+ {0x0000b1b8, 0x00000000},
-+ {0x0000b1bc, 0x00000000},
-+ {0x0000b1c0, 0x00000000},
-+ {0x0000b1c4, 0x00000000},
-+ {0x0000b1c8, 0x00000000},
-+ {0x0000b1cc, 0x00000000},
-+ {0x0000b1d0, 0x00000000},
-+ {0x0000b1d4, 0x00000000},
-+ {0x0000b1d8, 0x00000000},
-+ {0x0000b1dc, 0x00000000},
-+ {0x0000b1e0, 0x00000000},
-+ {0x0000b1e4, 0x00000000},
-+ {0x0000b1e8, 0x00000000},
-+ {0x0000b1ec, 0x00000000},
-+ {0x0000b1f0, 0x00000396},
-+ {0x0000b1f4, 0x00000396},
-+ {0x0000b1f8, 0x00000396},
-+ {0x0000b1fc, 0x00000196},
-+};
-+
-+static const u32 ar9462_pciephy_clkreq_disable_L1_2p0[][2] = {
-+ /* Addr allmodes */
-+ {0x00018c00, 0x18213ede},
-+ {0x00018c04, 0x000801d8},
-+ {0x00018c08, 0x0003580c},
-+};
-+
-+static const u32 ar9462_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
-+ /* Addr allmodes */
-+ {0x00018c00, 0x18212ede},
-+ {0x00018c04, 0x000801d8},
-+ {0x00018c08, 0x0003580c},
-+};
-+
-+static const u32 ar9462_2p0_sys3ant[][2] = {
-+ /* Addr allmodes */
-+ {0x00063280, 0x00040807},
-+ {0x00063284, 0x104ccccc},
-+};
-+
-+static const u32 ar9462_common_rx_gain_table_ar9280_2p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x02000101},
-+ {0x0000a004, 0x02000102},
-+ {0x0000a008, 0x02000103},
-+ {0x0000a00c, 0x02000104},
-+ {0x0000a010, 0x02000200},
-+ {0x0000a014, 0x02000201},
-+ {0x0000a018, 0x02000202},
-+ {0x0000a01c, 0x02000203},
-+ {0x0000a020, 0x02000204},
-+ {0x0000a024, 0x02000205},
-+ {0x0000a028, 0x02000208},
-+ {0x0000a02c, 0x02000302},
-+ {0x0000a030, 0x02000303},
-+ {0x0000a034, 0x02000304},
-+ {0x0000a038, 0x02000400},
-+ {0x0000a03c, 0x02010300},
-+ {0x0000a040, 0x02010301},
-+ {0x0000a044, 0x02010302},
-+ {0x0000a048, 0x02000500},
-+ {0x0000a04c, 0x02010400},
-+ {0x0000a050, 0x02020300},
-+ {0x0000a054, 0x02020301},
-+ {0x0000a058, 0x02020302},
-+ {0x0000a05c, 0x02020303},
-+ {0x0000a060, 0x02020400},
-+ {0x0000a064, 0x02030300},
-+ {0x0000a068, 0x02030301},
-+ {0x0000a06c, 0x02030302},
-+ {0x0000a070, 0x02030303},
-+ {0x0000a074, 0x02030400},
-+ {0x0000a078, 0x02040300},
-+ {0x0000a07c, 0x02040301},
-+ {0x0000a080, 0x02040302},
-+ {0x0000a084, 0x02040303},
-+ {0x0000a088, 0x02030500},
-+ {0x0000a08c, 0x02040400},
-+ {0x0000a090, 0x02050203},
-+ {0x0000a094, 0x02050204},
-+ {0x0000a098, 0x02050205},
-+ {0x0000a09c, 0x02040500},
-+ {0x0000a0a0, 0x02050301},
-+ {0x0000a0a4, 0x02050302},
-+ {0x0000a0a8, 0x02050303},
-+ {0x0000a0ac, 0x02050400},
-+ {0x0000a0b0, 0x02050401},
-+ {0x0000a0b4, 0x02050402},
-+ {0x0000a0b8, 0x02050403},
-+ {0x0000a0bc, 0x02050500},
-+ {0x0000a0c0, 0x02050501},
-+ {0x0000a0c4, 0x02050502},
-+ {0x0000a0c8, 0x02050503},
-+ {0x0000a0cc, 0x02050504},
-+ {0x0000a0d0, 0x02050600},
-+ {0x0000a0d4, 0x02050601},
-+ {0x0000a0d8, 0x02050602},
-+ {0x0000a0dc, 0x02050603},
-+ {0x0000a0e0, 0x02050604},
-+ {0x0000a0e4, 0x02050700},
-+ {0x0000a0e8, 0x02050701},
-+ {0x0000a0ec, 0x02050702},
-+ {0x0000a0f0, 0x02050703},
-+ {0x0000a0f4, 0x02050704},
-+ {0x0000a0f8, 0x02050705},
-+ {0x0000a0fc, 0x02050708},
-+ {0x0000a100, 0x02050709},
-+ {0x0000a104, 0x0205070a},
-+ {0x0000a108, 0x0205070b},
-+ {0x0000a10c, 0x0205070c},
-+ {0x0000a110, 0x0205070d},
-+ {0x0000a114, 0x02050710},
-+ {0x0000a118, 0x02050711},
-+ {0x0000a11c, 0x02050712},
-+ {0x0000a120, 0x02050713},
-+ {0x0000a124, 0x02050714},
-+ {0x0000a128, 0x02050715},
-+ {0x0000a12c, 0x02050730},
-+ {0x0000a130, 0x02050731},
-+ {0x0000a134, 0x02050732},
-+ {0x0000a138, 0x02050733},
-+ {0x0000a13c, 0x02050734},
-+ {0x0000a140, 0x02050735},
-+ {0x0000a144, 0x02050750},
-+ {0x0000a148, 0x02050751},
-+ {0x0000a14c, 0x02050752},
-+ {0x0000a150, 0x02050753},
-+ {0x0000a154, 0x02050754},
-+ {0x0000a158, 0x02050755},
-+ {0x0000a15c, 0x02050770},
-+ {0x0000a160, 0x02050771},
-+ {0x0000a164, 0x02050772},
-+ {0x0000a168, 0x02050773},
-+ {0x0000a16c, 0x02050774},
-+ {0x0000a170, 0x02050775},
-+ {0x0000a174, 0x00000776},
-+ {0x0000a178, 0x00000776},
-+ {0x0000a17c, 0x00000776},
-+ {0x0000a180, 0x00000776},
-+ {0x0000a184, 0x00000776},
-+ {0x0000a188, 0x00000776},
-+ {0x0000a18c, 0x00000776},
-+ {0x0000a190, 0x00000776},
-+ {0x0000a194, 0x00000776},
-+ {0x0000a198, 0x00000776},
-+ {0x0000a19c, 0x00000776},
-+ {0x0000a1a0, 0x00000776},
-+ {0x0000a1a4, 0x00000776},
-+ {0x0000a1a8, 0x00000776},
-+ {0x0000a1ac, 0x00000776},
-+ {0x0000a1b0, 0x00000776},
-+ {0x0000a1b4, 0x00000776},
-+ {0x0000a1b8, 0x00000776},
-+ {0x0000a1bc, 0x00000776},
-+ {0x0000a1c0, 0x00000776},
-+ {0x0000a1c4, 0x00000776},
-+ {0x0000a1c8, 0x00000776},
-+ {0x0000a1cc, 0x00000776},
-+ {0x0000a1d0, 0x00000776},
-+ {0x0000a1d4, 0x00000776},
-+ {0x0000a1d8, 0x00000776},
-+ {0x0000a1dc, 0x00000776},
-+ {0x0000a1e0, 0x00000776},
-+ {0x0000a1e4, 0x00000776},
-+ {0x0000a1e8, 0x00000776},
-+ {0x0000a1ec, 0x00000776},
-+ {0x0000a1f0, 0x00000776},
-+ {0x0000a1f4, 0x00000776},
-+ {0x0000a1f8, 0x00000776},
-+ {0x0000a1fc, 0x00000776},
-+ {0x0000b000, 0x02000101},
-+ {0x0000b004, 0x02000102},
-+ {0x0000b008, 0x02000103},
-+ {0x0000b00c, 0x02000104},
-+ {0x0000b010, 0x02000200},
-+ {0x0000b014, 0x02000201},
-+ {0x0000b018, 0x02000202},
-+ {0x0000b01c, 0x02000203},
-+ {0x0000b020, 0x02000204},
-+ {0x0000b024, 0x02000205},
-+ {0x0000b028, 0x02000208},
-+ {0x0000b02c, 0x02000302},
-+ {0x0000b030, 0x02000303},
-+ {0x0000b034, 0x02000304},
-+ {0x0000b038, 0x02000400},
-+ {0x0000b03c, 0x02010300},
-+ {0x0000b040, 0x02010301},
-+ {0x0000b044, 0x02010302},
-+ {0x0000b048, 0x02000500},
-+ {0x0000b04c, 0x02010400},
-+ {0x0000b050, 0x02020300},
-+ {0x0000b054, 0x02020301},
-+ {0x0000b058, 0x02020302},
-+ {0x0000b05c, 0x02020303},
-+ {0x0000b060, 0x02020400},
-+ {0x0000b064, 0x02030300},
-+ {0x0000b068, 0x02030301},
-+ {0x0000b06c, 0x02030302},
-+ {0x0000b070, 0x02030303},
-+ {0x0000b074, 0x02030400},
-+ {0x0000b078, 0x02040300},
-+ {0x0000b07c, 0x02040301},
-+ {0x0000b080, 0x02040302},
-+ {0x0000b084, 0x02040303},
-+ {0x0000b088, 0x02030500},
-+ {0x0000b08c, 0x02040400},
-+ {0x0000b090, 0x02050203},
-+ {0x0000b094, 0x02050204},
-+ {0x0000b098, 0x02050205},
-+ {0x0000b09c, 0x02040500},
-+ {0x0000b0a0, 0x02050301},
-+ {0x0000b0a4, 0x02050302},
-+ {0x0000b0a8, 0x02050303},
-+ {0x0000b0ac, 0x02050400},
-+ {0x0000b0b0, 0x02050401},
-+ {0x0000b0b4, 0x02050402},
-+ {0x0000b0b8, 0x02050403},
-+ {0x0000b0bc, 0x02050500},
-+ {0x0000b0c0, 0x02050501},
-+ {0x0000b0c4, 0x02050502},
-+ {0x0000b0c8, 0x02050503},
-+ {0x0000b0cc, 0x02050504},
-+ {0x0000b0d0, 0x02050600},
-+ {0x0000b0d4, 0x02050601},
-+ {0x0000b0d8, 0x02050602},
-+ {0x0000b0dc, 0x02050603},
-+ {0x0000b0e0, 0x02050604},
-+ {0x0000b0e4, 0x02050700},
-+ {0x0000b0e8, 0x02050701},
-+ {0x0000b0ec, 0x02050702},
-+ {0x0000b0f0, 0x02050703},
-+ {0x0000b0f4, 0x02050704},
-+ {0x0000b0f8, 0x02050705},
-+ {0x0000b0fc, 0x02050708},
-+ {0x0000b100, 0x02050709},
-+ {0x0000b104, 0x0205070a},
-+ {0x0000b108, 0x0205070b},
-+ {0x0000b10c, 0x0205070c},
-+ {0x0000b110, 0x0205070d},
-+ {0x0000b114, 0x02050710},
-+ {0x0000b118, 0x02050711},
-+ {0x0000b11c, 0x02050712},
-+ {0x0000b120, 0x02050713},
-+ {0x0000b124, 0x02050714},
-+ {0x0000b128, 0x02050715},
-+ {0x0000b12c, 0x02050730},
-+ {0x0000b130, 0x02050731},
-+ {0x0000b134, 0x02050732},
-+ {0x0000b138, 0x02050733},
-+ {0x0000b13c, 0x02050734},
-+ {0x0000b140, 0x02050735},
-+ {0x0000b144, 0x02050750},
-+ {0x0000b148, 0x02050751},
-+ {0x0000b14c, 0x02050752},
-+ {0x0000b150, 0x02050753},
-+ {0x0000b154, 0x02050754},
-+ {0x0000b158, 0x02050755},
-+ {0x0000b15c, 0x02050770},
-+ {0x0000b160, 0x02050771},
-+ {0x0000b164, 0x02050772},
-+ {0x0000b168, 0x02050773},
-+ {0x0000b16c, 0x02050774},
-+ {0x0000b170, 0x02050775},
-+ {0x0000b174, 0x00000776},
-+ {0x0000b178, 0x00000776},
-+ {0x0000b17c, 0x00000776},
-+ {0x0000b180, 0x00000776},
-+ {0x0000b184, 0x00000776},
-+ {0x0000b188, 0x00000776},
-+ {0x0000b18c, 0x00000776},
-+ {0x0000b190, 0x00000776},
-+ {0x0000b194, 0x00000776},
-+ {0x0000b198, 0x00000776},
-+ {0x0000b19c, 0x00000776},
-+ {0x0000b1a0, 0x00000776},
-+ {0x0000b1a4, 0x00000776},
-+ {0x0000b1a8, 0x00000776},
-+ {0x0000b1ac, 0x00000776},
-+ {0x0000b1b0, 0x00000776},
-+ {0x0000b1b4, 0x00000776},
-+ {0x0000b1b8, 0x00000776},
-+ {0x0000b1bc, 0x00000776},
-+ {0x0000b1c0, 0x00000776},
-+ {0x0000b1c4, 0x00000776},
-+ {0x0000b1c8, 0x00000776},
-+ {0x0000b1cc, 0x00000776},
-+ {0x0000b1d0, 0x00000776},
-+ {0x0000b1d4, 0x00000776},
-+ {0x0000b1d8, 0x00000776},
-+ {0x0000b1dc, 0x00000776},
-+ {0x0000b1e0, 0x00000776},
-+ {0x0000b1e4, 0x00000776},
-+ {0x0000b1e8, 0x00000776},
-+ {0x0000b1ec, 0x00000776},
-+ {0x0000b1f0, 0x00000776},
-+ {0x0000b1f4, 0x00000776},
-+ {0x0000b1f8, 0x00000776},
-+ {0x0000b1fc, 0x00000776},
-+};
-+
-+static const u32 ar9200_ar9280_2p0_radio_core[][2] = {
-+ /* Addr allmodes */
-+ {0x00007800, 0x00040000},
-+ {0x00007804, 0xdb005012},
-+ {0x00007808, 0x04924914},
-+ {0x0000780c, 0x21084210},
-+ {0x00007810, 0x6d801300},
-+ {0x00007814, 0x0019beff},
-+ {0x00007818, 0x07e41000},
-+ {0x0000781c, 0x00392000},
-+ {0x00007820, 0x92592480},
-+ {0x00007824, 0x00040000},
-+ {0x00007828, 0xdb005012},
-+ {0x0000782c, 0x04924914},
-+ {0x00007830, 0x21084210},
-+ {0x00007834, 0x6d801300},
-+ {0x00007838, 0x0019beff},
-+ {0x0000783c, 0x07e40000},
-+ {0x00007840, 0x00392000},
-+ {0x00007844, 0x92592480},
-+ {0x00007848, 0x00100000},
-+ {0x0000784c, 0x773f0567},
-+ {0x00007850, 0x54214514},
-+ {0x00007854, 0x12035828},
-+ {0x00007858, 0x92592692},
-+ {0x0000785c, 0x00000000},
-+ {0x00007860, 0x56400000},
-+ {0x00007864, 0x0a8e370e},
-+ {0x00007868, 0xc0102850},
-+ {0x0000786c, 0x812d4000},
-+ {0x00007870, 0x807ec400},
-+ {0x00007874, 0x001b6db0},
-+ {0x00007878, 0x00376b63},
-+ {0x0000787c, 0x06db6db6},
-+ {0x00007880, 0x006d8000},
-+ {0x00007884, 0xffeffffe},
-+ {0x00007888, 0xffeffffe},
-+ {0x0000788c, 0x00010000},
-+ {0x00007890, 0x02060aeb},
-+ {0x00007894, 0x5a108000},
-+};
-+
-+static const u32 ar9462_2p0_mac_postamble_emulation[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
-+ {0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
-+};
-+
-+static const u32 ar9462_2p0_radio_postamble_sys3ant[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
-+ {0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
-+ {0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
-+};
-+
-+static const u32 ar9462_2p0_baseband_postamble_emulation[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
-+ {0x00009e44, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000},
-+ {0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
-+ {0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-+ {0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
-+ {0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
-+ {0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
-+ {0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
-+ {0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
-+ {0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
-+ {0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
-+ {0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
-+ {0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
-+ {0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
-+ {0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
-+ {0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
-+ {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+};
-+
-+static const u32 ar9462_2p0_radio_postamble_sys2ant[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
-+ {0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
-+ {0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
-+};
-+
-+static const u32 ar9462_common_wo_xlna_rx_gain_table_2p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x00010000},
-+ {0x0000a004, 0x00030002},
-+ {0x0000a008, 0x00050004},
-+ {0x0000a00c, 0x00810080},
-+ {0x0000a010, 0x00830082},
-+ {0x0000a014, 0x01810180},
-+ {0x0000a018, 0x01830182},
-+ {0x0000a01c, 0x01850184},
-+ {0x0000a020, 0x01890188},
-+ {0x0000a024, 0x018b018a},
-+ {0x0000a028, 0x018d018c},
-+ {0x0000a02c, 0x03820190},
-+ {0x0000a030, 0x03840383},
-+ {0x0000a034, 0x03880385},
-+ {0x0000a038, 0x038a0389},
-+ {0x0000a03c, 0x038c038b},
-+ {0x0000a040, 0x0390038d},
-+ {0x0000a044, 0x03920391},
-+ {0x0000a048, 0x03940393},
-+ {0x0000a04c, 0x03960395},
-+ {0x0000a050, 0x00000000},
-+ {0x0000a054, 0x00000000},
-+ {0x0000a058, 0x00000000},
-+ {0x0000a05c, 0x00000000},
-+ {0x0000a060, 0x00000000},
-+ {0x0000a064, 0x00000000},
-+ {0x0000a068, 0x00000000},
-+ {0x0000a06c, 0x00000000},
-+ {0x0000a070, 0x00000000},
-+ {0x0000a074, 0x00000000},
-+ {0x0000a078, 0x00000000},
-+ {0x0000a07c, 0x00000000},
-+ {0x0000a080, 0x29292929},
-+ {0x0000a084, 0x29292929},
-+ {0x0000a088, 0x29292929},
-+ {0x0000a08c, 0x29292929},
-+ {0x0000a090, 0x22292929},
-+ {0x0000a094, 0x1d1d2222},
-+ {0x0000a098, 0x0c111117},
-+ {0x0000a09c, 0x00030303},
-+ {0x0000a0a0, 0x00000000},
-+ {0x0000a0a4, 0x00000000},
-+ {0x0000a0a8, 0x00000000},
-+ {0x0000a0ac, 0x00000000},
-+ {0x0000a0b0, 0x00000000},
-+ {0x0000a0b4, 0x00000000},
-+ {0x0000a0b8, 0x00000000},
-+ {0x0000a0bc, 0x00000000},
-+ {0x0000a0c0, 0x001f0000},
-+ {0x0000a0c4, 0x01000101},
-+ {0x0000a0c8, 0x011e011f},
-+ {0x0000a0cc, 0x011c011d},
-+ {0x0000a0d0, 0x02030204},
-+ {0x0000a0d4, 0x02010202},
-+ {0x0000a0d8, 0x021f0200},
-+ {0x0000a0dc, 0x0302021e},
-+ {0x0000a0e0, 0x03000301},
-+ {0x0000a0e4, 0x031e031f},
-+ {0x0000a0e8, 0x0402031d},
-+ {0x0000a0ec, 0x04000401},
-+ {0x0000a0f0, 0x041e041f},
-+ {0x0000a0f4, 0x0502041d},
-+ {0x0000a0f8, 0x05000501},
-+ {0x0000a0fc, 0x051e051f},
-+ {0x0000a100, 0x06010602},
-+ {0x0000a104, 0x061f0600},
-+ {0x0000a108, 0x061d061e},
-+ {0x0000a10c, 0x07020703},
-+ {0x0000a110, 0x07000701},
-+ {0x0000a114, 0x00000000},
-+ {0x0000a118, 0x00000000},
-+ {0x0000a11c, 0x00000000},
-+ {0x0000a120, 0x00000000},
-+ {0x0000a124, 0x00000000},
-+ {0x0000a128, 0x00000000},
-+ {0x0000a12c, 0x00000000},
-+ {0x0000a130, 0x00000000},
-+ {0x0000a134, 0x00000000},
-+ {0x0000a138, 0x00000000},
-+ {0x0000a13c, 0x00000000},
-+ {0x0000a140, 0x001f0000},
-+ {0x0000a144, 0x01000101},
-+ {0x0000a148, 0x011e011f},
-+ {0x0000a14c, 0x011c011d},
-+ {0x0000a150, 0x02030204},
-+ {0x0000a154, 0x02010202},
-+ {0x0000a158, 0x021f0200},
-+ {0x0000a15c, 0x0302021e},
-+ {0x0000a160, 0x03000301},
-+ {0x0000a164, 0x031e031f},
-+ {0x0000a168, 0x0402031d},
-+ {0x0000a16c, 0x04000401},
-+ {0x0000a170, 0x041e041f},
-+ {0x0000a174, 0x0502041d},
-+ {0x0000a178, 0x05000501},
-+ {0x0000a17c, 0x051e051f},
-+ {0x0000a180, 0x06010602},
-+ {0x0000a184, 0x061f0600},
-+ {0x0000a188, 0x061d061e},
-+ {0x0000a18c, 0x07020703},
-+ {0x0000a190, 0x07000701},
-+ {0x0000a194, 0x00000000},
-+ {0x0000a198, 0x00000000},
-+ {0x0000a19c, 0x00000000},
-+ {0x0000a1a0, 0x00000000},
-+ {0x0000a1a4, 0x00000000},
-+ {0x0000a1a8, 0x00000000},
-+ {0x0000a1ac, 0x00000000},
-+ {0x0000a1b0, 0x00000000},
-+ {0x0000a1b4, 0x00000000},
-+ {0x0000a1b8, 0x00000000},
-+ {0x0000a1bc, 0x00000000},
-+ {0x0000a1c0, 0x00000000},
-+ {0x0000a1c4, 0x00000000},
-+ {0x0000a1c8, 0x00000000},
-+ {0x0000a1cc, 0x00000000},
-+ {0x0000a1d0, 0x00000000},
-+ {0x0000a1d4, 0x00000000},
-+ {0x0000a1d8, 0x00000000},
-+ {0x0000a1dc, 0x00000000},
-+ {0x0000a1e0, 0x00000000},
-+ {0x0000a1e4, 0x00000000},
-+ {0x0000a1e8, 0x00000000},
-+ {0x0000a1ec, 0x00000000},
-+ {0x0000a1f0, 0x00000396},
-+ {0x0000a1f4, 0x00000396},
-+ {0x0000a1f8, 0x00000396},
-+ {0x0000a1fc, 0x00000196},
-+ {0x0000b000, 0x00010000},
-+ {0x0000b004, 0x00030002},
-+ {0x0000b008, 0x00050004},
-+ {0x0000b00c, 0x00810080},
-+ {0x0000b010, 0x00830082},
-+ {0x0000b014, 0x01810180},
-+ {0x0000b018, 0x01830182},
-+ {0x0000b01c, 0x01850184},
-+ {0x0000b020, 0x02810280},
-+ {0x0000b024, 0x02830282},
-+ {0x0000b028, 0x02850284},
-+ {0x0000b02c, 0x02890288},
-+ {0x0000b030, 0x028b028a},
-+ {0x0000b034, 0x0388028c},
-+ {0x0000b038, 0x038a0389},
-+ {0x0000b03c, 0x038c038b},
-+ {0x0000b040, 0x0390038d},
-+ {0x0000b044, 0x03920391},
-+ {0x0000b048, 0x03940393},
-+ {0x0000b04c, 0x03960395},
-+ {0x0000b050, 0x00000000},
-+ {0x0000b054, 0x00000000},
-+ {0x0000b058, 0x00000000},
-+ {0x0000b05c, 0x00000000},
-+ {0x0000b060, 0x00000000},
-+ {0x0000b064, 0x00000000},
-+ {0x0000b068, 0x00000000},
-+ {0x0000b06c, 0x00000000},
-+ {0x0000b070, 0x00000000},
-+ {0x0000b074, 0x00000000},
-+ {0x0000b078, 0x00000000},
-+ {0x0000b07c, 0x00000000},
-+ {0x0000b080, 0x32323232},
-+ {0x0000b084, 0x2f2f3232},
-+ {0x0000b088, 0x23282a2d},
-+ {0x0000b08c, 0x1c1e2123},
-+ {0x0000b090, 0x14171919},
-+ {0x0000b094, 0x0e0e1214},
-+ {0x0000b098, 0x03050707},
-+ {0x0000b09c, 0x00030303},
-+ {0x0000b0a0, 0x00000000},
-+ {0x0000b0a4, 0x00000000},
-+ {0x0000b0a8, 0x00000000},
-+ {0x0000b0ac, 0x00000000},
-+ {0x0000b0b0, 0x00000000},
-+ {0x0000b0b4, 0x00000000},
-+ {0x0000b0b8, 0x00000000},
-+ {0x0000b0bc, 0x00000000},
-+ {0x0000b0c0, 0x003f0020},
-+ {0x0000b0c4, 0x00400041},
-+ {0x0000b0c8, 0x0140005f},
-+ {0x0000b0cc, 0x0160015f},
-+ {0x0000b0d0, 0x017e017f},
-+ {0x0000b0d4, 0x02410242},
-+ {0x0000b0d8, 0x025f0240},
-+ {0x0000b0dc, 0x027f0260},
-+ {0x0000b0e0, 0x0341027e},
-+ {0x0000b0e4, 0x035f0340},
-+ {0x0000b0e8, 0x037f0360},
-+ {0x0000b0ec, 0x04400441},
-+ {0x0000b0f0, 0x0460045f},
-+ {0x0000b0f4, 0x0541047f},
-+ {0x0000b0f8, 0x055f0540},
-+ {0x0000b0fc, 0x057f0560},
-+ {0x0000b100, 0x06400641},
-+ {0x0000b104, 0x0660065f},
-+ {0x0000b108, 0x067e067f},
-+ {0x0000b10c, 0x07410742},
-+ {0x0000b110, 0x075f0740},
-+ {0x0000b114, 0x077f0760},
-+ {0x0000b118, 0x07800781},
-+ {0x0000b11c, 0x07a0079f},
-+ {0x0000b120, 0x07c107bf},
-+ {0x0000b124, 0x000007c0},
-+ {0x0000b128, 0x00000000},
-+ {0x0000b12c, 0x00000000},
-+ {0x0000b130, 0x00000000},
-+ {0x0000b134, 0x00000000},
-+ {0x0000b138, 0x00000000},
-+ {0x0000b13c, 0x00000000},
-+ {0x0000b140, 0x003f0020},
-+ {0x0000b144, 0x00400041},
-+ {0x0000b148, 0x0140005f},
-+ {0x0000b14c, 0x0160015f},
-+ {0x0000b150, 0x017e017f},
-+ {0x0000b154, 0x02410242},
-+ {0x0000b158, 0x025f0240},
-+ {0x0000b15c, 0x027f0260},
-+ {0x0000b160, 0x0341027e},
-+ {0x0000b164, 0x035f0340},
-+ {0x0000b168, 0x037f0360},
-+ {0x0000b16c, 0x04400441},
-+ {0x0000b170, 0x0460045f},
-+ {0x0000b174, 0x0541047f},
-+ {0x0000b178, 0x055f0540},
-+ {0x0000b17c, 0x057f0560},
-+ {0x0000b180, 0x06400641},
-+ {0x0000b184, 0x0660065f},
-+ {0x0000b188, 0x067e067f},
-+ {0x0000b18c, 0x07410742},
-+ {0x0000b190, 0x075f0740},
-+ {0x0000b194, 0x077f0760},
-+ {0x0000b198, 0x07800781},
-+ {0x0000b19c, 0x07a0079f},
-+ {0x0000b1a0, 0x07c107bf},
-+ {0x0000b1a4, 0x000007c0},
-+ {0x0000b1a8, 0x00000000},
-+ {0x0000b1ac, 0x00000000},
-+ {0x0000b1b0, 0x00000000},
-+ {0x0000b1b4, 0x00000000},
-+ {0x0000b1b8, 0x00000000},
-+ {0x0000b1bc, 0x00000000},
-+ {0x0000b1c0, 0x00000000},
-+ {0x0000b1c4, 0x00000000},
-+ {0x0000b1c8, 0x00000000},
-+ {0x0000b1cc, 0x00000000},
-+ {0x0000b1d0, 0x00000000},
-+ {0x0000b1d4, 0x00000000},
-+ {0x0000b1d8, 0x00000000},
-+ {0x0000b1dc, 0x00000000},
-+ {0x0000b1e0, 0x00000000},
-+ {0x0000b1e4, 0x00000000},
-+ {0x0000b1e8, 0x00000000},
-+ {0x0000b1ec, 0x00000000},
-+ {0x0000b1f0, 0x00000396},
-+ {0x0000b1f4, 0x00000396},
-+ {0x0000b1f8, 0x00000396},
-+ {0x0000b1fc, 0x00000196},
-+};
-+
-+static const u32 ar9462_2p0_baseband_core_txfir_coeff_japan_2484[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a398, 0x00000000},
-+ {0x0000a39c, 0x6f7f0301},
-+ {0x0000a3a0, 0xca9228ee},
-+};
-+
-+static const u32 ar9462_modes_low_ob_db_tx_gain_table_2p0[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
-+ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-+ {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-+ {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-+ {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
-+ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
-+ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
-+ {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
-+ {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
-+ {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
-+ {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
-+ {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
-+ {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
-+ {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
-+ {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
-+ {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
-+ {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
-+ {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
-+ {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
-+ {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
-+ {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
-+ {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
-+ {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
-+ {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
-+ {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
-+ {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
-+ {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
-+ {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
-+ {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-+ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
-+ {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
-+ {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
-+ {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
-+ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
-+ {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
-+ {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
-+ {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-+ {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-+ {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-+ {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-+ {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
-+ {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
-+ {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-+ {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
-+ {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
-+};
-+
-+static const u32 ar9462_2p0_soc_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
-+};
-+
-+static const u32 ar9462_2p0_baseband_core[][2] = {
-+ /* Addr allmodes */
-+ {0x00009800, 0xafe68e30},
-+ {0x00009804, 0xfd14e000},
-+ {0x00009808, 0x9c0a9f6b},
-+ {0x0000980c, 0x04900000},
-+ {0x00009814, 0x9280c00a},
-+ {0x00009818, 0x00000000},
-+ {0x0000981c, 0x00020028},
-+ {0x00009834, 0x6400a290},
-+ {0x00009838, 0x0108ecff},
-+ {0x0000983c, 0x0d000600},
-+ {0x00009880, 0x201fff00},
-+ {0x00009884, 0x00001042},
-+ {0x000098a4, 0x00200400},
-+ {0x000098b0, 0x32440bbe},
-+ {0x000098d0, 0x004b6a8e},
-+ {0x000098d4, 0x00000820},
-+ {0x000098dc, 0x00000000},
-+ {0x000098e4, 0x01ffffff},
-+ {0x000098e8, 0x01ffffff},
-+ {0x000098ec, 0x01ffffff},
-+ {0x000098f0, 0x00000000},
-+ {0x000098f4, 0x00000000},
-+ {0x00009bf0, 0x80000000},
-+ {0x00009c04, 0xff55ff55},
-+ {0x00009c08, 0x0320ff55},
-+ {0x00009c0c, 0x00000000},
-+ {0x00009c10, 0x00000000},
-+ {0x00009c14, 0x00046384},
-+ {0x00009c18, 0x05b6b440},
-+ {0x00009c1c, 0x00b6b440},
-+ {0x00009d00, 0xc080a333},
-+ {0x00009d04, 0x40206c10},
-+ {0x00009d08, 0x009c4060},
-+ {0x00009d0c, 0x9883800a},
-+ {0x00009d10, 0x01834061},
-+ {0x00009d14, 0x00c0040b},
-+ {0x00009d18, 0x00000000},
-+ {0x00009e08, 0x0038230c},
-+ {0x00009e24, 0x990bb515},
-+ {0x00009e28, 0x0c6f0000},
-+ {0x00009e30, 0x06336f77},
-+ {0x00009e34, 0x6af6532f},
-+ {0x00009e38, 0x0cc80c00},
-+ {0x00009e40, 0x0d261820},
-+ {0x00009e4c, 0x00001004},
-+ {0x00009e50, 0x00ff03f1},
-+ {0x00009e54, 0xe4c355c7},
-+ {0x00009e58, 0xfd897735},
-+ {0x00009e5c, 0xe9198724},
-+ {0x00009fc0, 0x803e4788},
-+ {0x00009fc4, 0x0001efb5},
-+ {0x00009fcc, 0x40000014},
-+ {0x00009fd0, 0x01193b93},
-+ {0x0000a20c, 0x00000000},
-+ {0x0000a220, 0x00000000},
-+ {0x0000a224, 0x00000000},
-+ {0x0000a228, 0x10002310},
-+ {0x0000a23c, 0x00000000},
-+ {0x0000a244, 0x0c000000},
-+ {0x0000a2a0, 0x00000001},
-+ {0x0000a2c0, 0x00000001},
-+ {0x0000a2c8, 0x00000000},
-+ {0x0000a2cc, 0x18c43433},
-+ {0x0000a2d4, 0x00000000},
-+ {0x0000a2ec, 0x00000000},
-+ {0x0000a2f0, 0x00000000},
-+ {0x0000a2f4, 0x00000000},
-+ {0x0000a2f8, 0x00000000},
-+ {0x0000a344, 0x00000000},
-+ {0x0000a34c, 0x00000000},
-+ {0x0000a350, 0x0000a000},
-+ {0x0000a364, 0x00000000},
-+ {0x0000a370, 0x00000000},
-+ {0x0000a390, 0x00000001},
-+ {0x0000a394, 0x00000444},
-+ {0x0000a398, 0x001f0e0f},
-+ {0x0000a39c, 0x0075393f},
-+ {0x0000a3a0, 0xb79f6427},
-+ {0x0000a3a4, 0x00000000},
-+ {0x0000a3a8, 0xaaaaaaaa},
-+ {0x0000a3ac, 0x3c466478},
-+ {0x0000a3c0, 0x20202020},
-+ {0x0000a3c4, 0x22222220},
-+ {0x0000a3c8, 0x20200020},
-+ {0x0000a3cc, 0x20202020},
-+ {0x0000a3d0, 0x20202020},
-+ {0x0000a3d4, 0x20202020},
-+ {0x0000a3d8, 0x20202020},
-+ {0x0000a3dc, 0x20202020},
-+ {0x0000a3e0, 0x20202020},
-+ {0x0000a3e4, 0x20202020},
-+ {0x0000a3e8, 0x20202020},
-+ {0x0000a3ec, 0x20202020},
-+ {0x0000a3f0, 0x00000000},
-+ {0x0000a3f4, 0x00000006},
-+ {0x0000a3f8, 0x0c9bd380},
-+ {0x0000a3fc, 0x000f0f01},
-+ {0x0000a400, 0x8fa91f01},
-+ {0x0000a404, 0x00000000},
-+ {0x0000a408, 0x0e79e5c6},
-+ {0x0000a40c, 0x00820820},
-+ {0x0000a414, 0x1ce739ce},
-+ {0x0000a418, 0x2d001dce},
-+ {0x0000a41c, 0x1ce739ce},
-+ {0x0000a420, 0x000001ce},
-+ {0x0000a424, 0x1ce739ce},
-+ {0x0000a428, 0x000001ce},
-+ {0x0000a42c, 0x1ce739ce},
-+ {0x0000a430, 0x1ce739ce},
-+ {0x0000a434, 0x00000000},
-+ {0x0000a438, 0x00001801},
-+ {0x0000a43c, 0x00100000},
-+ {0x0000a444, 0x00000000},
-+ {0x0000a448, 0x05000080},
-+ {0x0000a44c, 0x00000001},
-+ {0x0000a450, 0x00010000},
-+ {0x0000a454, 0x07000000},
-+ {0x0000a644, 0xbfad9d74},
-+ {0x0000a648, 0x0048060a},
-+ {0x0000a64c, 0x00002037},
-+ {0x0000a670, 0x03020100},
-+ {0x0000a674, 0x09080504},
-+ {0x0000a678, 0x0d0c0b0a},
-+ {0x0000a67c, 0x13121110},
-+ {0x0000a680, 0x31301514},
-+ {0x0000a684, 0x35343332},
-+ {0x0000a688, 0x00000036},
-+ {0x0000a690, 0x00000838},
-+ {0x0000a6b0, 0x0000000a},
-+ {0x0000a6b4, 0x00512c01},
-+ {0x0000a7c0, 0x00000000},
-+ {0x0000a7c4, 0xfffffffc},
-+ {0x0000a7c8, 0x00000000},
-+ {0x0000a7cc, 0x00000000},
-+ {0x0000a7d0, 0x00000000},
-+ {0x0000a7d4, 0x00000004},
-+ {0x0000a7dc, 0x00000001},
-+ {0x0000a7f0, 0x80000000},
-+ {0x0000a8d0, 0x004b6a8e},
-+ {0x0000a8d4, 0x00000820},
-+ {0x0000a8dc, 0x00000000},
-+ {0x0000a8f0, 0x00000000},
-+ {0x0000a8f4, 0x00000000},
-+ {0x0000abf0, 0x80000000},
-+ {0x0000b2d0, 0x00000080},
-+ {0x0000b2d4, 0x00000000},
-+ {0x0000b2ec, 0x00000000},
-+ {0x0000b2f0, 0x00000000},
-+ {0x0000b2f4, 0x00000000},
-+ {0x0000b2f8, 0x00000000},
-+ {0x0000b408, 0x0e79e5c0},
-+ {0x0000b40c, 0x00820820},
-+ {0x0000b420, 0x00000000},
-+ {0x0000b6b0, 0x0000000a},
-+ {0x0000b6b4, 0x00000001},
-+};
-+
-+static const u32 ar9462_2p0_radio_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
-+ {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
-+ {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
-+ {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
-+};
-+
-+static const u32 ar9462_modes_high_ob_db_tx_gain_table_2p0[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
-+ {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-+ {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-+ {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-+ {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
-+ {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
-+ {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
-+ {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
-+ {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
-+ {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
-+ {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
-+ {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
-+ {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
-+ {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
-+ {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
-+ {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
-+ {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
-+ {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
-+ {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
-+ {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
-+ {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
-+ {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
-+ {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
-+ {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
-+ {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
-+ {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
-+ {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
-+ {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
-+ {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
-+ {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
-+ {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
-+ {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
-+ {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
-+ {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
-+ {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
-+ {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
-+ {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-+ {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-+ {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-+ {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
-+ {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
-+ {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-+ {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
-+ {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
-+};
-+
-+static const u32 ar9462_2p0_radio_core[][2] = {
-+ /* Addr allmodes */
-+ {0x00016000, 0x36db6db6},
-+ {0x00016004, 0x6db6db40},
-+ {0x00016008, 0x73f00000},
-+ {0x0001600c, 0x00000000},
-+ {0x00016010, 0x6d820001},
-+ {0x00016040, 0x7f80fff8},
-+ {0x0001604c, 0x2699e04f},
-+ {0x00016050, 0x6db6db6c},
-+ {0x00016058, 0x6c200000},
-+ {0x00016080, 0x00040000},
-+ {0x00016084, 0x9a68048c},
-+ {0x00016088, 0x54214514},
-+ {0x0001608c, 0x1203040b},
-+ {0x00016090, 0x24926490},
-+ {0x00016098, 0xd2888888},
-+ {0x000160a0, 0x0a108ffe},
-+ {0x000160a4, 0x812fc491},
-+ {0x000160a8, 0x423c8000},
-+ {0x000160b4, 0x92000000},
-+ {0x000160b8, 0x0285dddc},
-+ {0x000160bc, 0x02908888},
-+ {0x000160c0, 0x00adb6d0},
-+ {0x000160c4, 0x6db6db60},
-+ {0x000160c8, 0x6db6db6c},
-+ {0x000160cc, 0x0de6c1b0},
-+ {0x00016100, 0x3fffbe04},
-+ {0x00016104, 0xfff80000},
-+ {0x00016108, 0x00200400},
-+ {0x00016110, 0x00000000},
-+ {0x00016144, 0x02084080},
-+ {0x00016148, 0x000080c0},
-+ {0x00016280, 0x050a0001},
-+ {0x00016284, 0x3d841400},
-+ {0x00016288, 0x00000000},
-+ {0x0001628c, 0xe3000000},
-+ {0x00016290, 0xa1005080},
-+ {0x00016294, 0x00000020},
-+ {0x00016298, 0x54a82900},
-+ {0x00016340, 0x121e4276},
-+ {0x00016344, 0x00300000},
-+ {0x00016400, 0x36db6db6},
-+ {0x00016404, 0x6db6db40},
-+ {0x00016408, 0x73f00000},
-+ {0x0001640c, 0x00000000},
-+ {0x00016410, 0x6c800001},
-+ {0x00016440, 0x7f80fff8},
-+ {0x0001644c, 0x4699e04f},
-+ {0x00016450, 0x6db6db6c},
-+ {0x00016500, 0x3fffbe04},
-+ {0x00016504, 0xfff80000},
-+ {0x00016508, 0x00200400},
-+ {0x00016510, 0x00000000},
-+ {0x00016544, 0x02084080},
-+ {0x00016548, 0x000080c0},
-+};
-+
-+static const u32 ar9462_2p0_tx_gain_table_baseband_postamble_emulation[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
-+ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
-+ {0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
-+ {0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
-+ {0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
-+ {0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
-+ {0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
-+ {0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
-+ {0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
-+ {0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
-+ {0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
-+ {0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
-+ {0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
-+};
-+
-+static const u32 ar9462_2p0_soc_preamble[][2] = {
-+ /* Addr allmodes */
-+ {0x00007020, 0x00000000},
-+ {0x00007034, 0x00000002},
-+ {0x00007038, 0x000004c2},
-+};
-+
-+static const u32 ar9462_2p0_sys2ant[][2] = {
-+ /* Addr allmodes */
-+ {0x00063120, 0x00801980},
-+};
-+
-+static const u32 ar9462_2p0_mac_core[][2] = {
-+ /* Addr allmodes */
-+ {0x00000008, 0x00000000},
-+ {0x00000030, 0x000e0085},
-+ {0x00000034, 0x00000005},
-+ {0x00000040, 0x00000000},
-+ {0x00000044, 0x00000000},
-+ {0x00000048, 0x00000008},
-+ {0x0000004c, 0x00000010},
-+ {0x00000050, 0x00000000},
-+ {0x00001040, 0x002ffc0f},
-+ {0x00001044, 0x002ffc0f},
-+ {0x00001048, 0x002ffc0f},
-+ {0x0000104c, 0x002ffc0f},
-+ {0x00001050, 0x002ffc0f},
-+ {0x00001054, 0x002ffc0f},
-+ {0x00001058, 0x002ffc0f},
-+ {0x0000105c, 0x002ffc0f},
-+ {0x00001060, 0x002ffc0f},
-+ {0x00001064, 0x002ffc0f},
-+ {0x000010f0, 0x00000100},
-+ {0x00001270, 0x00000000},
-+ {0x000012b0, 0x00000000},
-+ {0x000012f0, 0x00000000},
-+ {0x0000143c, 0x00000000},
-+ {0x0000147c, 0x00000000},
-+ {0x00001810, 0x0f000003},
-+ {0x00008000, 0x00000000},
-+ {0x00008004, 0x00000000},
-+ {0x00008008, 0x00000000},
-+ {0x0000800c, 0x00000000},
-+ {0x00008018, 0x00000000},
-+ {0x00008020, 0x00000000},
-+ {0x00008038, 0x00000000},
-+ {0x0000803c, 0x00080000},
-+ {0x00008040, 0x00000000},
-+ {0x00008044, 0x00000000},
-+ {0x00008048, 0x00000000},
-+ {0x0000804c, 0xffffffff},
-+ {0x00008050, 0xffffffff},
-+ {0x00008054, 0x00000000},
-+ {0x00008058, 0x00000000},
-+ {0x0000805c, 0x000fc78f},
-+ {0x00008060, 0x0000000f},
-+ {0x00008064, 0x00000000},
-+ {0x00008070, 0x00000310},
-+ {0x00008074, 0x00000020},
-+ {0x00008078, 0x00000000},
-+ {0x0000809c, 0x0000000f},
-+ {0x000080a0, 0x00000000},
-+ {0x000080a4, 0x02ff0000},
-+ {0x000080a8, 0x0e070605},
-+ {0x000080ac, 0x0000000d},
-+ {0x000080b0, 0x00000000},
-+ {0x000080b4, 0x00000000},
-+ {0x000080b8, 0x00000000},
-+ {0x000080bc, 0x00000000},
-+ {0x000080c0, 0x2a800000},
-+ {0x000080c4, 0x06900168},
-+ {0x000080c8, 0x13881c20},
-+ {0x000080cc, 0x01f40000},
-+ {0x000080d0, 0x00252500},
-+ {0x000080d4, 0x00b00005},
-+ {0x000080d8, 0x00400002},
-+ {0x000080dc, 0x00000000},
-+ {0x000080e0, 0xffffffff},
-+ {0x000080e4, 0x0000ffff},
-+ {0x000080e8, 0x3f3f3f3f},
-+ {0x000080ec, 0x00000000},
-+ {0x000080f0, 0x00000000},
-+ {0x000080f4, 0x00000000},
-+ {0x000080fc, 0x00020000},
-+ {0x00008100, 0x00000000},
-+ {0x00008108, 0x00000052},
-+ {0x0000810c, 0x00000000},
-+ {0x00008110, 0x00000000},
-+ {0x00008114, 0x000007ff},
-+ {0x00008118, 0x000000aa},
-+ {0x0000811c, 0x00003210},
-+ {0x00008124, 0x00000000},
-+ {0x00008128, 0x00000000},
-+ {0x0000812c, 0x00000000},
-+ {0x00008130, 0x00000000},
-+ {0x00008134, 0x00000000},
-+ {0x00008138, 0x00000000},
-+ {0x0000813c, 0x0000ffff},
-+ {0x00008144, 0xffffffff},
-+ {0x00008168, 0x00000000},
-+ {0x0000816c, 0x00000000},
-+ {0x00008170, 0x18486e00},
-+ {0x00008174, 0x33332210},
-+ {0x00008178, 0x00000000},
-+ {0x0000817c, 0x00020000},
-+ {0x000081c4, 0x33332210},
-+ {0x000081c8, 0x00000000},
-+ {0x000081cc, 0x00000000},
-+ {0x000081d4, 0x00000000},
-+ {0x000081ec, 0x00000000},
-+ {0x000081f0, 0x00000000},
-+ {0x000081f4, 0x00000000},
-+ {0x000081f8, 0x00000000},
-+ {0x000081fc, 0x00000000},
-+ {0x00008240, 0x00100000},
-+ {0x00008244, 0x0010f400},
-+ {0x00008248, 0x00000800},
-+ {0x0000824c, 0x0001e800},
-+ {0x00008250, 0x00000000},
-+ {0x00008254, 0x00000000},
-+ {0x00008258, 0x00000000},
-+ {0x0000825c, 0x40000000},
-+ {0x00008260, 0x00080922},
-+ {0x00008264, 0x99c00010},
-+ {0x00008268, 0xffffffff},
-+ {0x0000826c, 0x0000ffff},
-+ {0x00008270, 0x00000000},
-+ {0x00008274, 0x40000000},
-+ {0x00008278, 0x003e4180},
-+ {0x0000827c, 0x00000004},
-+ {0x00008284, 0x0000002c},
-+ {0x00008288, 0x0000002c},
-+ {0x0000828c, 0x000000ff},
-+ {0x00008294, 0x00000000},
-+ {0x00008298, 0x00000000},
-+ {0x0000829c, 0x00000000},
-+ {0x00008300, 0x00000140},
-+ {0x00008314, 0x00000000},
-+ {0x0000831c, 0x0000010d},
-+ {0x00008328, 0x00000000},
-+ {0x0000832c, 0x0000001f},
-+ {0x00008330, 0x00000302},
-+ {0x00008334, 0x00000700},
-+ {0x00008338, 0xffff0000},
-+ {0x0000833c, 0x02400000},
-+ {0x00008340, 0x000107ff},
-+ {0x00008344, 0xaa48105b},
-+ {0x00008348, 0x008f0000},
-+ {0x0000835c, 0x00000000},
-+ {0x00008360, 0xffffffff},
-+ {0x00008364, 0xffffffff},
-+ {0x00008368, 0x00000000},
-+ {0x00008370, 0x00000000},
-+ {0x00008374, 0x000000ff},
-+ {0x00008378, 0x00000000},
-+ {0x0000837c, 0x00000000},
-+ {0x00008380, 0xffffffff},
-+ {0x00008384, 0xffffffff},
-+ {0x00008390, 0xffffffff},
-+ {0x00008394, 0xffffffff},
-+ {0x00008398, 0x00000000},
-+ {0x0000839c, 0x00000000},
-+ {0x000083a4, 0x0000fa14},
-+ {0x000083a8, 0x000f0c00},
-+ {0x000083ac, 0x33332210},
-+ {0x000083b0, 0x33332210},
-+ {0x000083b4, 0x33332210},
-+ {0x000083b8, 0x33332210},
-+ {0x000083bc, 0x00000000},
-+ {0x000083c0, 0x00000000},
-+ {0x000083c4, 0x00000000},
-+ {0x000083c8, 0x00000000},
-+ {0x000083cc, 0x00000200},
-+ {0x000083d0, 0x000301ff},
-+};
-+
-+static const u32 ar9462_2p0_mac_postamble[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
-+ {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
-+ {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
-+ {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
-+ {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
-+ {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
-+ {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
-+ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
-+};
-+
-+static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {
-+ /* Addr allmodes */
-+ {0x0000a000, 0x00010000},
-+ {0x0000a004, 0x00030002},
-+ {0x0000a008, 0x00050004},
-+ {0x0000a00c, 0x00810080},
-+ {0x0000a010, 0x00830082},
-+ {0x0000a014, 0x01810180},
-+ {0x0000a018, 0x01830182},
-+ {0x0000a01c, 0x01850184},
-+ {0x0000a020, 0x01890188},
-+ {0x0000a024, 0x018b018a},
-+ {0x0000a028, 0x018d018c},
-+ {0x0000a02c, 0x03820190},
-+ {0x0000a030, 0x03840383},
-+ {0x0000a034, 0x03880385},
-+ {0x0000a038, 0x038a0389},
-+ {0x0000a03c, 0x038c038b},
-+ {0x0000a040, 0x0390038d},
-+ {0x0000a044, 0x03920391},
-+ {0x0000a048, 0x03940393},
-+ {0x0000a04c, 0x03960395},
-+ {0x0000a050, 0x00000000},
-+ {0x0000a054, 0x00000000},
-+ {0x0000a058, 0x00000000},
-+ {0x0000a05c, 0x00000000},
-+ {0x0000a060, 0x00000000},
-+ {0x0000a064, 0x00000000},
-+ {0x0000a068, 0x00000000},
-+ {0x0000a06c, 0x00000000},
-+ {0x0000a070, 0x00000000},
-+ {0x0000a074, 0x00000000},
-+ {0x0000a078, 0x00000000},
-+ {0x0000a07c, 0x00000000},
-+ {0x0000a080, 0x29292929},
-+ {0x0000a084, 0x29292929},
-+ {0x0000a088, 0x29292929},
-+ {0x0000a08c, 0x29292929},
-+ {0x0000a090, 0x22292929},
-+ {0x0000a094, 0x1d1d2222},
-+ {0x0000a098, 0x0c111117},
-+ {0x0000a09c, 0x00030303},
-+ {0x0000a0a0, 0x00000000},
-+ {0x0000a0a4, 0x00000000},
-+ {0x0000a0a8, 0x00000000},
-+ {0x0000a0ac, 0x00000000},
-+ {0x0000a0b0, 0x00000000},
-+ {0x0000a0b4, 0x00000000},
-+ {0x0000a0b8, 0x00000000},
-+ {0x0000a0bc, 0x00000000},
-+ {0x0000a0c0, 0x001f0000},
-+ {0x0000a0c4, 0x01000101},
-+ {0x0000a0c8, 0x011e011f},
-+ {0x0000a0cc, 0x011c011d},
-+ {0x0000a0d0, 0x02030204},
-+ {0x0000a0d4, 0x02010202},
-+ {0x0000a0d8, 0x021f0200},
-+ {0x0000a0dc, 0x0302021e},
-+ {0x0000a0e0, 0x03000301},
-+ {0x0000a0e4, 0x031e031f},
-+ {0x0000a0e8, 0x0402031d},
-+ {0x0000a0ec, 0x04000401},
-+ {0x0000a0f0, 0x041e041f},
-+ {0x0000a0f4, 0x0502041d},
-+ {0x0000a0f8, 0x05000501},
-+ {0x0000a0fc, 0x051e051f},
-+ {0x0000a100, 0x06010602},
-+ {0x0000a104, 0x061f0600},
-+ {0x0000a108, 0x061d061e},
-+ {0x0000a10c, 0x07020703},
-+ {0x0000a110, 0x07000701},
-+ {0x0000a114, 0x00000000},
-+ {0x0000a118, 0x00000000},
-+ {0x0000a11c, 0x00000000},
-+ {0x0000a120, 0x00000000},
-+ {0x0000a124, 0x00000000},
-+ {0x0000a128, 0x00000000},
-+ {0x0000a12c, 0x00000000},
-+ {0x0000a130, 0x00000000},
-+ {0x0000a134, 0x00000000},
-+ {0x0000a138, 0x00000000},
-+ {0x0000a13c, 0x00000000},
-+ {0x0000a140, 0x001f0000},
-+ {0x0000a144, 0x01000101},
-+ {0x0000a148, 0x011e011f},
-+ {0x0000a14c, 0x011c011d},
-+ {0x0000a150, 0x02030204},
-+ {0x0000a154, 0x02010202},
-+ {0x0000a158, 0x021f0200},
-+ {0x0000a15c, 0x0302021e},
-+ {0x0000a160, 0x03000301},
-+ {0x0000a164, 0x031e031f},
-+ {0x0000a168, 0x0402031d},
-+ {0x0000a16c, 0x04000401},
-+ {0x0000a170, 0x041e041f},
-+ {0x0000a174, 0x0502041d},
-+ {0x0000a178, 0x05000501},
-+ {0x0000a17c, 0x051e051f},
-+ {0x0000a180, 0x06010602},
-+ {0x0000a184, 0x061f0600},
-+ {0x0000a188, 0x061d061e},
-+ {0x0000a18c, 0x07020703},
-+ {0x0000a190, 0x07000701},
-+ {0x0000a194, 0x00000000},
-+ {0x0000a198, 0x00000000},
-+ {0x0000a19c, 0x00000000},
-+ {0x0000a1a0, 0x00000000},
-+ {0x0000a1a4, 0x00000000},
-+ {0x0000a1a8, 0x00000000},
-+ {0x0000a1ac, 0x00000000},
-+ {0x0000a1b0, 0x00000000},
-+ {0x0000a1b4, 0x00000000},
-+ {0x0000a1b8, 0x00000000},
-+ {0x0000a1bc, 0x00000000},
-+ {0x0000a1c0, 0x00000000},
-+ {0x0000a1c4, 0x00000000},
-+ {0x0000a1c8, 0x00000000},
-+ {0x0000a1cc, 0x00000000},
-+ {0x0000a1d0, 0x00000000},
-+ {0x0000a1d4, 0x00000000},
-+ {0x0000a1d8, 0x00000000},
-+ {0x0000a1dc, 0x00000000},
-+ {0x0000a1e0, 0x00000000},
-+ {0x0000a1e4, 0x00000000},
-+ {0x0000a1e8, 0x00000000},
-+ {0x0000a1ec, 0x00000000},
-+ {0x0000a1f0, 0x00000396},
-+ {0x0000a1f4, 0x00000396},
-+ {0x0000a1f8, 0x00000396},
-+ {0x0000a1fc, 0x00000196},
-+ {0x0000b000, 0x00010000},
-+ {0x0000b004, 0x00030002},
-+ {0x0000b008, 0x00050004},
-+ {0x0000b00c, 0x00810080},
-+ {0x0000b010, 0x00830082},
-+ {0x0000b014, 0x01810180},
-+ {0x0000b018, 0x01830182},
-+ {0x0000b01c, 0x01850184},
-+ {0x0000b020, 0x02810280},
-+ {0x0000b024, 0x02830282},
-+ {0x0000b028, 0x02850284},
-+ {0x0000b02c, 0x02890288},
-+ {0x0000b030, 0x028b028a},
-+ {0x0000b034, 0x0388028c},
-+ {0x0000b038, 0x038a0389},
-+ {0x0000b03c, 0x038c038b},
-+ {0x0000b040, 0x0390038d},
-+ {0x0000b044, 0x03920391},
-+ {0x0000b048, 0x03940393},
-+ {0x0000b04c, 0x03960395},
-+ {0x0000b050, 0x00000000},
-+ {0x0000b054, 0x00000000},
-+ {0x0000b058, 0x00000000},
-+ {0x0000b05c, 0x00000000},
-+ {0x0000b060, 0x00000000},
-+ {0x0000b064, 0x00000000},
-+ {0x0000b068, 0x00000000},
-+ {0x0000b06c, 0x00000000},
-+ {0x0000b070, 0x00000000},
-+ {0x0000b074, 0x00000000},
-+ {0x0000b078, 0x00000000},
-+ {0x0000b07c, 0x00000000},
-+ {0x0000b080, 0x2a2d2f32},
-+ {0x0000b084, 0x21232328},
-+ {0x0000b088, 0x19191c1e},
-+ {0x0000b08c, 0x12141417},
-+ {0x0000b090, 0x07070e0e},
-+ {0x0000b094, 0x03030305},
-+ {0x0000b098, 0x00000003},
-+ {0x0000b09c, 0x00000000},
-+ {0x0000b0a0, 0x00000000},
-+ {0x0000b0a4, 0x00000000},
-+ {0x0000b0a8, 0x00000000},
-+ {0x0000b0ac, 0x00000000},
-+ {0x0000b0b0, 0x00000000},
-+ {0x0000b0b4, 0x00000000},
-+ {0x0000b0b8, 0x00000000},
-+ {0x0000b0bc, 0x00000000},
-+ {0x0000b0c0, 0x003f0020},
-+ {0x0000b0c4, 0x00400041},
-+ {0x0000b0c8, 0x0140005f},
-+ {0x0000b0cc, 0x0160015f},
-+ {0x0000b0d0, 0x017e017f},
-+ {0x0000b0d4, 0x02410242},
-+ {0x0000b0d8, 0x025f0240},
-+ {0x0000b0dc, 0x027f0260},
-+ {0x0000b0e0, 0x0341027e},
-+ {0x0000b0e4, 0x035f0340},
-+ {0x0000b0e8, 0x037f0360},
-+ {0x0000b0ec, 0x04400441},
-+ {0x0000b0f0, 0x0460045f},
-+ {0x0000b0f4, 0x0541047f},
-+ {0x0000b0f8, 0x055f0540},
-+ {0x0000b0fc, 0x057f0560},
-+ {0x0000b100, 0x06400641},
-+ {0x0000b104, 0x0660065f},
-+ {0x0000b108, 0x067e067f},
-+ {0x0000b10c, 0x07410742},
-+ {0x0000b110, 0x075f0740},
-+ {0x0000b114, 0x077f0760},
-+ {0x0000b118, 0x07800781},
-+ {0x0000b11c, 0x07a0079f},
-+ {0x0000b120, 0x07c107bf},
-+ {0x0000b124, 0x000007c0},
-+ {0x0000b128, 0x00000000},
-+ {0x0000b12c, 0x00000000},
-+ {0x0000b130, 0x00000000},
-+ {0x0000b134, 0x00000000},
-+ {0x0000b138, 0x00000000},
-+ {0x0000b13c, 0x00000000},
-+ {0x0000b140, 0x003f0020},
-+ {0x0000b144, 0x00400041},
-+ {0x0000b148, 0x0140005f},
-+ {0x0000b14c, 0x0160015f},
-+ {0x0000b150, 0x017e017f},
-+ {0x0000b154, 0x02410242},
-+ {0x0000b158, 0x025f0240},
-+ {0x0000b15c, 0x027f0260},
-+ {0x0000b160, 0x0341027e},
-+ {0x0000b164, 0x035f0340},
-+ {0x0000b168, 0x037f0360},
-+ {0x0000b16c, 0x04400441},
-+ {0x0000b170, 0x0460045f},
-+ {0x0000b174, 0x0541047f},
-+ {0x0000b178, 0x055f0540},
-+ {0x0000b17c, 0x057f0560},
-+ {0x0000b180, 0x06400641},
-+ {0x0000b184, 0x0660065f},
-+ {0x0000b188, 0x067e067f},
-+ {0x0000b18c, 0x07410742},
-+ {0x0000b190, 0x075f0740},
-+ {0x0000b194, 0x077f0760},
-+ {0x0000b198, 0x07800781},
-+ {0x0000b19c, 0x07a0079f},
-+ {0x0000b1a0, 0x07c107bf},
-+ {0x0000b1a4, 0x000007c0},
-+ {0x0000b1a8, 0x00000000},
-+ {0x0000b1ac, 0x00000000},
-+ {0x0000b1b0, 0x00000000},
-+ {0x0000b1b4, 0x00000000},
-+ {0x0000b1b8, 0x00000000},
-+ {0x0000b1bc, 0x00000000},
-+ {0x0000b1c0, 0x00000000},
-+ {0x0000b1c4, 0x00000000},
-+ {0x0000b1c8, 0x00000000},
-+ {0x0000b1cc, 0x00000000},
-+ {0x0000b1d0, 0x00000000},
-+ {0x0000b1d4, 0x00000000},
-+ {0x0000b1d8, 0x00000000},
-+ {0x0000b1dc, 0x00000000},
-+ {0x0000b1e0, 0x00000000},
-+ {0x0000b1e4, 0x00000000},
-+ {0x0000b1e8, 0x00000000},
-+ {0x0000b1ec, 0x00000000},
-+ {0x0000b1f0, 0x00000396},
-+ {0x0000b1f4, 0x00000396},
-+ {0x0000b1f8, 0x00000396},
-+ {0x0000b1fc, 0x00000196},
-+};
-+
-+static const u32 ar9462_modes_green_ob_db_tx_gain_table_2p0[][5] = {
-+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-+ {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
-+ {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-+ {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-+ {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-+ {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
-+ {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
-+ {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
-+ {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
-+ {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
-+ {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
-+ {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
-+ {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
-+ {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
-+ {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
-+ {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
-+ {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
-+ {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
-+ {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
-+ {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
-+ {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
-+ {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
-+ {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
-+ {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
-+ {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
-+ {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
-+ {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
-+ {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
-+ {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
-+ {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
-+ {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
-+ {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-+ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-+ {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
-+ {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
-+ {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
-+ {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
-+ {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
-+ {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
-+ {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
-+ {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-+ {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-+ {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-+ {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-+ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-+ {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-+ {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
-+ {0x00016054, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
-+ {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-+ {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
-+ {0x00016454, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
-+};
-+
-+static const u32 ar9462_2p0_BTCOEX_MAX_TXPWR_table[][2] = {
-+ /* Addr allmodes */
-+ {0x000018c0, 0x10101010},
-+ {0x000018c4, 0x10101010},
-+ {0x000018c8, 0x10101010},
-+ {0x000018cc, 0x10101010},
-+ {0x000018d0, 0x10101010},
-+ {0x000018d4, 0x10101010},
-+ {0x000018d8, 0x10101010},
-+ {0x000018dc, 0x10101010},
-+};
-+
-+static const u32 ar9462_2p0_baseband_core_emulation[][2] = {
-+ /* Addr allmodes */
-+ {0x00009800, 0xafa68e30},
-+ {0x00009884, 0x00002842},
-+ {0x00009c04, 0xff55ff55},
-+ {0x00009c08, 0x0320ff55},
-+ {0x00009e50, 0x00000000},
-+ {0x00009fcc, 0x00000014},
-+ {0x0000a344, 0x00000010},
-+ {0x0000a398, 0x00000000},
-+ {0x0000a39c, 0x71733d01},
-+ {0x0000a3a0, 0xd0ad5c12},
-+ {0x0000a3c0, 0x22222220},
-+ {0x0000a3c4, 0x22222222},
-+ {0x0000a404, 0x00418a11},
-+ {0x0000a418, 0x050001ce},
-+ {0x0000a438, 0x00001800},
-+ {0x0000a458, 0x01444452},
-+ {0x0000a644, 0x3fad9d74},
-+ {0x0000a690, 0x00000038},
-+};
-+
-+#endif /* INITVALS_9462_2P0_H */
---- a/drivers/net/wireless/ath/ath9k/ar9480_1p0_initvals.h
-+++ /dev/null
-@@ -1,1833 +0,0 @@
--/*
-- * Copyright (c) 2010 Atheros Communications Inc.
-- *
-- * Permission to use, copy, modify, and/or distribute this software for any
-- * purpose with or without fee is hereby granted, provided that the above
-- * copyright notice and this permission notice appear in all copies.
-- *
-- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-- */
--
--#ifndef INITVALS_9480_1P0_H
--#define INITVALS_9480_1P0_H
--
--/* AR9480 1.0 */
--
--static const u32 ar9480_1p0_mac_core[][2] = {
-- /* Addr allmodes */
-- {0x00000008, 0x00000000},
-- {0x00000030, 0x00060085},
-- {0x00000034, 0x00000005},
-- {0x00000040, 0x00000000},
-- {0x00000044, 0x00000000},
-- {0x00000048, 0x00000008},
-- {0x0000004c, 0x00000010},
-- {0x00000050, 0x00000000},
-- {0x00001040, 0x002ffc0f},
-- {0x00001044, 0x002ffc0f},
-- {0x00001048, 0x002ffc0f},
-- {0x0000104c, 0x002ffc0f},
-- {0x00001050, 0x002ffc0f},
-- {0x00001054, 0x002ffc0f},
-- {0x00001058, 0x002ffc0f},
-- {0x0000105c, 0x002ffc0f},
-- {0x00001060, 0x002ffc0f},
-- {0x00001064, 0x002ffc0f},
-- {0x000010f0, 0x00000100},
-- {0x00001270, 0x00000000},
-- {0x000012b0, 0x00000000},
-- {0x000012f0, 0x00000000},
-- {0x0000143c, 0x00000000},
-- {0x0000147c, 0x00000000},
-- {0x00001810, 0x0f000003},
-- {0x00008000, 0x00000000},
-- {0x00008004, 0x00000000},
-- {0x00008008, 0x00000000},
-- {0x0000800c, 0x00000000},
-- {0x00008018, 0x00000000},
-- {0x00008020, 0x00000000},
-- {0x00008038, 0x00000000},
-- {0x0000803c, 0x00080000},
-- {0x00008040, 0x00000000},
-- {0x00008044, 0x00000000},
-- {0x00008048, 0x00000000},
-- {0x0000804c, 0xffffffff},
-- {0x00008050, 0xffffffff},
-- {0x00008054, 0x00000000},
-- {0x00008058, 0x00000000},
-- {0x0000805c, 0x000fc78f},
-- {0x00008060, 0x0000000f},
-- {0x00008064, 0x00000000},
-- {0x00008070, 0x00000310},
-- {0x00008074, 0x00000020},
-- {0x00008078, 0x00000000},
-- {0x0000809c, 0x0000000f},
-- {0x000080a0, 0x00000000},
-- {0x000080a4, 0x02ff0000},
-- {0x000080a8, 0x0e070605},
-- {0x000080ac, 0x0000000d},
-- {0x000080b0, 0x00000000},
-- {0x000080b4, 0x00000000},
-- {0x000080b8, 0x00000000},
-- {0x000080bc, 0x00000000},
-- {0x000080c0, 0x2a800000},
-- {0x000080c4, 0x06900168},
-- {0x000080c8, 0x13881c20},
-- {0x000080cc, 0x01f40000},
-- {0x000080d0, 0x00252500},
-- {0x000080d4, 0x00a00005},
-- {0x000080d8, 0x00400002},
-- {0x000080dc, 0x00000000},
-- {0x000080e0, 0xffffffff},
-- {0x000080e4, 0x0000ffff},
-- {0x000080e8, 0x3f3f3f3f},
-- {0x000080ec, 0x00000000},
-- {0x000080f0, 0x00000000},
-- {0x000080f4, 0x00000000},
-- {0x000080fc, 0x00020000},
-- {0x00008100, 0x00000000},
-- {0x00008108, 0x00000052},
-- {0x0000810c, 0x00000000},
-- {0x00008110, 0x00000000},
-- {0x00008114, 0x000007ff},
-- {0x00008118, 0x000000aa},
-- {0x0000811c, 0x00003210},
-- {0x00008124, 0x00000000},
-- {0x00008128, 0x00000000},
-- {0x0000812c, 0x00000000},
-- {0x00008130, 0x00000000},
-- {0x00008134, 0x00000000},
-- {0x00008138, 0x00000000},
-- {0x0000813c, 0x0000ffff},
-- {0x00008144, 0xffffffff},
-- {0x00008168, 0x00000000},
-- {0x0000816c, 0x00000000},
-- {0x00008170, 0x18486e00},
-- {0x00008174, 0x33332210},
-- {0x00008178, 0x00000000},
-- {0x0000817c, 0x00020000},
-- {0x000081c4, 0x33332210},
-- {0x000081c8, 0x00000000},
-- {0x000081cc, 0x00000000},
-- {0x000081d4, 0x00000000},
-- {0x000081ec, 0x00000000},
-- {0x000081f0, 0x00000000},
-- {0x000081f4, 0x00000000},
-- {0x000081f8, 0x00000000},
-- {0x000081fc, 0x00000000},
-- {0x00008240, 0x00100000},
-- {0x00008244, 0x0010f400},
-- {0x00008248, 0x00000800},
-- {0x0000824c, 0x0001e800},
-- {0x00008250, 0x00000000},
-- {0x00008254, 0x00000000},
-- {0x00008258, 0x00000000},
-- {0x0000825c, 0x40000000},
-- {0x00008260, 0x00080922},
-- {0x00008264, 0x99c00010},
-- {0x00008268, 0xffffffff},
-- {0x0000826c, 0x0000ffff},
-- {0x00008270, 0x00000000},
-- {0x00008274, 0x40000000},
-- {0x00008278, 0x003e4180},
-- {0x0000827c, 0x00000004},
-- {0x00008284, 0x0000002c},
-- {0x00008288, 0x0000002c},
-- {0x0000828c, 0x000000ff},
-- {0x00008294, 0x00000000},
-- {0x00008298, 0x00000000},
-- {0x0000829c, 0x00000000},
-- {0x00008300, 0x00000140},
-- {0x00008314, 0x00000000},
-- {0x0000831c, 0x0000010d},
-- {0x00008328, 0x00000000},
-- {0x0000832c, 0x0000001f},
-- {0x00008330, 0x00000302},
-- {0x00008334, 0x00000700},
-- {0x00008338, 0xffff0000},
-- {0x0000833c, 0x02400000},
-- {0x00008340, 0x000107ff},
-- {0x00008344, 0xaa48105b},
-- {0x00008348, 0x008f0000},
-- {0x0000835c, 0x00000000},
-- {0x00008360, 0xffffffff},
-- {0x00008364, 0xffffffff},
-- {0x00008368, 0x00000000},
-- {0x00008370, 0x00000000},
-- {0x00008374, 0x000000ff},
-- {0x00008378, 0x00000000},
-- {0x0000837c, 0x00000000},
-- {0x00008380, 0xffffffff},
-- {0x00008384, 0xffffffff},
-- {0x00008390, 0xffffffff},
-- {0x00008394, 0xffffffff},
-- {0x00008398, 0x00000000},
-- {0x0000839c, 0x00000000},
-- {0x000083a4, 0x0000fa14},
-- {0x000083a8, 0x000f0c00},
-- {0x000083ac, 0x33332210},
-- {0x000083b0, 0x33332210},
-- {0x000083b4, 0x33332210},
-- {0x000083b8, 0x33332210},
-- {0x000083bc, 0x00000000},
-- {0x000083c0, 0x00000000},
-- {0x000083c4, 0x00000000},
-- {0x000083c8, 0x00000000},
-- {0x000083cc, 0x00000200},
-- {0x000083d0, 0x000301ff},
--};
--
--static const u32 ar9480_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
-- /* Addr allmodes */
-- {0x0000a398, 0x00000000},
-- {0x0000a39c, 0x6f7f0301},
-- {0x0000a3a0, 0xca9228ee},
--};
--
--static const u32 ar9480_1p0_sys3ant[][2] = {
-- /* Addr allmodes */
-- {0x00063280, 0x00040807},
-- {0x00063284, 0x104ccccc},
--};
--
--static const u32 ar9480_pcie_phy_clkreq_enable_L1_1p0[][2] = {
-- /* Addr allmodes */
-- {0x00018c00, 0x10053e5e},
-- {0x00018c04, 0x000801d8},
-- {0x00018c08, 0x0000580c},
--};
--
--static const u32 ar9480_1p0_mac_core_emulation[][2] = {
-- /* Addr allmodes */
-- {0x00000030, 0x00060085},
-- {0x00000044, 0x00000008},
-- {0x0000805c, 0xffffc7ff},
-- {0x00008344, 0xaa4a105b},
--};
--
--static const u32 ar9480_common_rx_gain_table_ar9280_2p0_1p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x02000101},
-- {0x0000a004, 0x02000102},
-- {0x0000a008, 0x02000103},
-- {0x0000a00c, 0x02000104},
-- {0x0000a010, 0x02000200},
-- {0x0000a014, 0x02000201},
-- {0x0000a018, 0x02000202},
-- {0x0000a01c, 0x02000203},
-- {0x0000a020, 0x02000204},
-- {0x0000a024, 0x02000205},
-- {0x0000a028, 0x02000208},
-- {0x0000a02c, 0x02000302},
-- {0x0000a030, 0x02000303},
-- {0x0000a034, 0x02000304},
-- {0x0000a038, 0x02000400},
-- {0x0000a03c, 0x02010300},
-- {0x0000a040, 0x02010301},
-- {0x0000a044, 0x02010302},
-- {0x0000a048, 0x02000500},
-- {0x0000a04c, 0x02010400},
-- {0x0000a050, 0x02020300},
-- {0x0000a054, 0x02020301},
-- {0x0000a058, 0x02020302},
-- {0x0000a05c, 0x02020303},
-- {0x0000a060, 0x02020400},
-- {0x0000a064, 0x02030300},
-- {0x0000a068, 0x02030301},
-- {0x0000a06c, 0x02030302},
-- {0x0000a070, 0x02030303},
-- {0x0000a074, 0x02030400},
-- {0x0000a078, 0x02040300},
-- {0x0000a07c, 0x02040301},
-- {0x0000a080, 0x02040302},
-- {0x0000a084, 0x02040303},
-- {0x0000a088, 0x02030500},
-- {0x0000a08c, 0x02040400},
-- {0x0000a090, 0x02050203},
-- {0x0000a094, 0x02050204},
-- {0x0000a098, 0x02050205},
-- {0x0000a09c, 0x02040500},
-- {0x0000a0a0, 0x02050301},
-- {0x0000a0a4, 0x02050302},
-- {0x0000a0a8, 0x02050303},
-- {0x0000a0ac, 0x02050400},
-- {0x0000a0b0, 0x02050401},
-- {0x0000a0b4, 0x02050402},
-- {0x0000a0b8, 0x02050403},
-- {0x0000a0bc, 0x02050500},
-- {0x0000a0c0, 0x02050501},
-- {0x0000a0c4, 0x02050502},
-- {0x0000a0c8, 0x02050503},
-- {0x0000a0cc, 0x02050504},
-- {0x0000a0d0, 0x02050600},
-- {0x0000a0d4, 0x02050601},
-- {0x0000a0d8, 0x02050602},
-- {0x0000a0dc, 0x02050603},
-- {0x0000a0e0, 0x02050604},
-- {0x0000a0e4, 0x02050700},
-- {0x0000a0e8, 0x02050701},
-- {0x0000a0ec, 0x02050702},
-- {0x0000a0f0, 0x02050703},
-- {0x0000a0f4, 0x02050704},
-- {0x0000a0f8, 0x02050705},
-- {0x0000a0fc, 0x02050708},
-- {0x0000a100, 0x02050709},
-- {0x0000a104, 0x0205070a},
-- {0x0000a108, 0x0205070b},
-- {0x0000a10c, 0x0205070c},
-- {0x0000a110, 0x0205070d},
-- {0x0000a114, 0x02050710},
-- {0x0000a118, 0x02050711},
-- {0x0000a11c, 0x02050712},
-- {0x0000a120, 0x02050713},
-- {0x0000a124, 0x02050714},
-- {0x0000a128, 0x02050715},
-- {0x0000a12c, 0x02050730},
-- {0x0000a130, 0x02050731},
-- {0x0000a134, 0x02050732},
-- {0x0000a138, 0x02050733},
-- {0x0000a13c, 0x02050734},
-- {0x0000a140, 0x02050735},
-- {0x0000a144, 0x02050750},
-- {0x0000a148, 0x02050751},
-- {0x0000a14c, 0x02050752},
-- {0x0000a150, 0x02050753},
-- {0x0000a154, 0x02050754},
-- {0x0000a158, 0x02050755},
-- {0x0000a15c, 0x02050770},
-- {0x0000a160, 0x02050771},
-- {0x0000a164, 0x02050772},
-- {0x0000a168, 0x02050773},
-- {0x0000a16c, 0x02050774},
-- {0x0000a170, 0x02050775},
-- {0x0000a174, 0x00000776},
-- {0x0000a178, 0x00000776},
-- {0x0000a17c, 0x00000776},
-- {0x0000a180, 0x00000776},
-- {0x0000a184, 0x00000776},
-- {0x0000a188, 0x00000776},
-- {0x0000a18c, 0x00000776},
-- {0x0000a190, 0x00000776},
-- {0x0000a194, 0x00000776},
-- {0x0000a198, 0x00000776},
-- {0x0000a19c, 0x00000776},
-- {0x0000a1a0, 0x00000776},
-- {0x0000a1a4, 0x00000776},
-- {0x0000a1a8, 0x00000776},
-- {0x0000a1ac, 0x00000776},
-- {0x0000a1b0, 0x00000776},
-- {0x0000a1b4, 0x00000776},
-- {0x0000a1b8, 0x00000776},
-- {0x0000a1bc, 0x00000776},
-- {0x0000a1c0, 0x00000776},
-- {0x0000a1c4, 0x00000776},
-- {0x0000a1c8, 0x00000776},
-- {0x0000a1cc, 0x00000776},
-- {0x0000a1d0, 0x00000776},
-- {0x0000a1d4, 0x00000776},
-- {0x0000a1d8, 0x00000776},
-- {0x0000a1dc, 0x00000776},
-- {0x0000a1e0, 0x00000776},
-- {0x0000a1e4, 0x00000776},
-- {0x0000a1e8, 0x00000776},
-- {0x0000a1ec, 0x00000776},
-- {0x0000a1f0, 0x00000776},
-- {0x0000a1f4, 0x00000776},
-- {0x0000a1f8, 0x00000776},
-- {0x0000a1fc, 0x00000776},
-- {0x0000b000, 0x02000101},
-- {0x0000b004, 0x02000102},
-- {0x0000b008, 0x02000103},
-- {0x0000b00c, 0x02000104},
-- {0x0000b010, 0x02000200},
-- {0x0000b014, 0x02000201},
-- {0x0000b018, 0x02000202},
-- {0x0000b01c, 0x02000203},
-- {0x0000b020, 0x02000204},
-- {0x0000b024, 0x02000205},
-- {0x0000b028, 0x02000208},
-- {0x0000b02c, 0x02000302},
-- {0x0000b030, 0x02000303},
-- {0x0000b034, 0x02000304},
-- {0x0000b038, 0x02000400},
-- {0x0000b03c, 0x02010300},
-- {0x0000b040, 0x02010301},
-- {0x0000b044, 0x02010302},
-- {0x0000b048, 0x02000500},
-- {0x0000b04c, 0x02010400},
-- {0x0000b050, 0x02020300},
-- {0x0000b054, 0x02020301},
-- {0x0000b058, 0x02020302},
-- {0x0000b05c, 0x02020303},
-- {0x0000b060, 0x02020400},
-- {0x0000b064, 0x02030300},
-- {0x0000b068, 0x02030301},
-- {0x0000b06c, 0x02030302},
-- {0x0000b070, 0x02030303},
-- {0x0000b074, 0x02030400},
-- {0x0000b078, 0x02040300},
-- {0x0000b07c, 0x02040301},
-- {0x0000b080, 0x02040302},
-- {0x0000b084, 0x02040303},
-- {0x0000b088, 0x02030500},
-- {0x0000b08c, 0x02040400},
-- {0x0000b090, 0x02050203},
-- {0x0000b094, 0x02050204},
-- {0x0000b098, 0x02050205},
-- {0x0000b09c, 0x02040500},
-- {0x0000b0a0, 0x02050301},
-- {0x0000b0a4, 0x02050302},
-- {0x0000b0a8, 0x02050303},
-- {0x0000b0ac, 0x02050400},
-- {0x0000b0b0, 0x02050401},
-- {0x0000b0b4, 0x02050402},
-- {0x0000b0b8, 0x02050403},
-- {0x0000b0bc, 0x02050500},
-- {0x0000b0c0, 0x02050501},
-- {0x0000b0c4, 0x02050502},
-- {0x0000b0c8, 0x02050503},
-- {0x0000b0cc, 0x02050504},
-- {0x0000b0d0, 0x02050600},
-- {0x0000b0d4, 0x02050601},
-- {0x0000b0d8, 0x02050602},
-- {0x0000b0dc, 0x02050603},
-- {0x0000b0e0, 0x02050604},
-- {0x0000b0e4, 0x02050700},
-- {0x0000b0e8, 0x02050701},
-- {0x0000b0ec, 0x02050702},
-- {0x0000b0f0, 0x02050703},
-- {0x0000b0f4, 0x02050704},
-- {0x0000b0f8, 0x02050705},
-- {0x0000b0fc, 0x02050708},
-- {0x0000b100, 0x02050709},
-- {0x0000b104, 0x0205070a},
-- {0x0000b108, 0x0205070b},
-- {0x0000b10c, 0x0205070c},
-- {0x0000b110, 0x0205070d},
-- {0x0000b114, 0x02050710},
-- {0x0000b118, 0x02050711},
-- {0x0000b11c, 0x02050712},
-- {0x0000b120, 0x02050713},
-- {0x0000b124, 0x02050714},
-- {0x0000b128, 0x02050715},
-- {0x0000b12c, 0x02050730},
-- {0x0000b130, 0x02050731},
-- {0x0000b134, 0x02050732},
-- {0x0000b138, 0x02050733},
-- {0x0000b13c, 0x02050734},
-- {0x0000b140, 0x02050735},
-- {0x0000b144, 0x02050750},
-- {0x0000b148, 0x02050751},
-- {0x0000b14c, 0x02050752},
-- {0x0000b150, 0x02050753},
-- {0x0000b154, 0x02050754},
-- {0x0000b158, 0x02050755},
-- {0x0000b15c, 0x02050770},
-- {0x0000b160, 0x02050771},
-- {0x0000b164, 0x02050772},
-- {0x0000b168, 0x02050773},
-- {0x0000b16c, 0x02050774},
-- {0x0000b170, 0x02050775},
-- {0x0000b174, 0x00000776},
-- {0x0000b178, 0x00000776},
-- {0x0000b17c, 0x00000776},
-- {0x0000b180, 0x00000776},
-- {0x0000b184, 0x00000776},
-- {0x0000b188, 0x00000776},
-- {0x0000b18c, 0x00000776},
-- {0x0000b190, 0x00000776},
-- {0x0000b194, 0x00000776},
-- {0x0000b198, 0x00000776},
-- {0x0000b19c, 0x00000776},
-- {0x0000b1a0, 0x00000776},
-- {0x0000b1a4, 0x00000776},
-- {0x0000b1a8, 0x00000776},
-- {0x0000b1ac, 0x00000776},
-- {0x0000b1b0, 0x00000776},
-- {0x0000b1b4, 0x00000776},
-- {0x0000b1b8, 0x00000776},
-- {0x0000b1bc, 0x00000776},
-- {0x0000b1c0, 0x00000776},
-- {0x0000b1c4, 0x00000776},
-- {0x0000b1c8, 0x00000776},
-- {0x0000b1cc, 0x00000776},
-- {0x0000b1d0, 0x00000776},
-- {0x0000b1d4, 0x00000776},
-- {0x0000b1d8, 0x00000776},
-- {0x0000b1dc, 0x00000776},
-- {0x0000b1e0, 0x00000776},
-- {0x0000b1e4, 0x00000776},
-- {0x0000b1e8, 0x00000776},
-- {0x0000b1ec, 0x00000776},
-- {0x0000b1f0, 0x00000776},
-- {0x0000b1f4, 0x00000776},
-- {0x0000b1f8, 0x00000776},
-- {0x0000b1fc, 0x00000776},
--};
--
--static const u32 ar9200_ar9280_2p0_radio_core_1p0[][2] = {
-- /* Addr allmodes */
-- {0x00007800, 0x00040000},
-- {0x00007804, 0xdb005012},
-- {0x00007808, 0x04924914},
-- {0x0000780c, 0x21084210},
-- {0x00007810, 0x6d801300},
-- {0x00007814, 0x0019beff},
-- {0x00007818, 0x07e41000},
-- {0x0000781c, 0x00392000},
-- {0x00007820, 0x92592480},
-- {0x00007824, 0x00040000},
-- {0x00007828, 0xdb005012},
-- {0x0000782c, 0x04924914},
-- {0x00007830, 0x21084210},
-- {0x00007834, 0x6d801300},
-- {0x00007838, 0x0019beff},
-- {0x0000783c, 0x07e40000},
-- {0x00007840, 0x00392000},
-- {0x00007844, 0x92592480},
-- {0x00007848, 0x00100000},
-- {0x0000784c, 0x773f0567},
-- {0x00007850, 0x54214514},
-- {0x00007854, 0x12035828},
-- {0x00007858, 0x92592692},
-- {0x0000785c, 0x00000000},
-- {0x00007860, 0x56400000},
-- {0x00007864, 0x0a8e370e},
-- {0x00007868, 0xc0102850},
-- {0x0000786c, 0x812d4000},
-- {0x00007870, 0x807ec400},
-- {0x00007874, 0x001b6db0},
-- {0x00007878, 0x00376b63},
-- {0x0000787c, 0x06db6db6},
-- {0x00007880, 0x006d8000},
-- {0x00007884, 0xffeffffe},
-- {0x00007888, 0xffeffffe},
-- {0x0000788c, 0x00010000},
-- {0x00007890, 0x02060aeb},
-- {0x00007894, 0x5a108000},
--};
--
--static const u32 ar9480_1p0_baseband_postamble_emulation[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
-- {0x00009e44, 0x005c0000, 0x005c0000, 0x005c0000, 0x005c0000},
-- {0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
-- {0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-- {0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
-- {0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
-- {0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
-- {0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
-- {0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
-- {0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
-- {0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
-- {0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
-- {0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
-- {0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
-- {0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
-- {0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
-- {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
--};
--
--static const u32 ar9480_pcie_phy_pll_on_clkreq_disable_L1_1p0[][2] = {
-- /* Addr allmodes */
-- {0x00018c00, 0x10012e5e},
-- {0x00018c04, 0x000801d8},
-- {0x00018c08, 0x0000580c},
--};
--
--static const u32 ar9480_common_rx_gain_table_1p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x00010000},
-- {0x0000a004, 0x00030002},
-- {0x0000a008, 0x00050004},
-- {0x0000a00c, 0x00810080},
-- {0x0000a010, 0x00830082},
-- {0x0000a014, 0x01810180},
-- {0x0000a018, 0x01830182},
-- {0x0000a01c, 0x01850184},
-- {0x0000a020, 0x01890188},
-- {0x0000a024, 0x018b018a},
-- {0x0000a028, 0x018d018c},
-- {0x0000a02c, 0x01910190},
-- {0x0000a030, 0x01930192},
-- {0x0000a034, 0x01950194},
-- {0x0000a038, 0x038a0196},
-- {0x0000a03c, 0x038c038b},
-- {0x0000a040, 0x0390038d},
-- {0x0000a044, 0x03920391},
-- {0x0000a048, 0x03940393},
-- {0x0000a04c, 0x03960395},
-- {0x0000a050, 0x00000000},
-- {0x0000a054, 0x00000000},
-- {0x0000a058, 0x00000000},
-- {0x0000a05c, 0x00000000},
-- {0x0000a060, 0x00000000},
-- {0x0000a064, 0x00000000},
-- {0x0000a068, 0x00000000},
-- {0x0000a06c, 0x00000000},
-- {0x0000a070, 0x00000000},
-- {0x0000a074, 0x00000000},
-- {0x0000a078, 0x00000000},
-- {0x0000a07c, 0x00000000},
-- {0x0000a080, 0x22222229},
-- {0x0000a084, 0x1d1d1d1d},
-- {0x0000a088, 0x1d1d1d1d},
-- {0x0000a08c, 0x1d1d1d1d},
-- {0x0000a090, 0x171d1d1d},
-- {0x0000a094, 0x11111717},
-- {0x0000a098, 0x00030311},
-- {0x0000a09c, 0x00000000},
-- {0x0000a0a0, 0x00000000},
-- {0x0000a0a4, 0x00000000},
-- {0x0000a0a8, 0x00000000},
-- {0x0000a0ac, 0x00000000},
-- {0x0000a0b0, 0x00000000},
-- {0x0000a0b4, 0x00000000},
-- {0x0000a0b8, 0x00000000},
-- {0x0000a0bc, 0x00000000},
-- {0x0000a0c0, 0x001f0000},
-- {0x0000a0c4, 0x01000101},
-- {0x0000a0c8, 0x011e011f},
-- {0x0000a0cc, 0x011c011d},
-- {0x0000a0d0, 0x02030204},
-- {0x0000a0d4, 0x02010202},
-- {0x0000a0d8, 0x021f0200},
-- {0x0000a0dc, 0x0302021e},
-- {0x0000a0e0, 0x03000301},
-- {0x0000a0e4, 0x031e031f},
-- {0x0000a0e8, 0x0402031d},
-- {0x0000a0ec, 0x04000401},
-- {0x0000a0f0, 0x041e041f},
-- {0x0000a0f4, 0x0502041d},
-- {0x0000a0f8, 0x05000501},
-- {0x0000a0fc, 0x051e051f},
-- {0x0000a100, 0x06010602},
-- {0x0000a104, 0x061f0600},
-- {0x0000a108, 0x061d061e},
-- {0x0000a10c, 0x07020703},
-- {0x0000a110, 0x07000701},
-- {0x0000a114, 0x00000000},
-- {0x0000a118, 0x00000000},
-- {0x0000a11c, 0x00000000},
-- {0x0000a120, 0x00000000},
-- {0x0000a124, 0x00000000},
-- {0x0000a128, 0x00000000},
-- {0x0000a12c, 0x00000000},
-- {0x0000a130, 0x00000000},
-- {0x0000a134, 0x00000000},
-- {0x0000a138, 0x00000000},
-- {0x0000a13c, 0x00000000},
-- {0x0000a140, 0x001f0000},
-- {0x0000a144, 0x01000101},
-- {0x0000a148, 0x011e011f},
-- {0x0000a14c, 0x011c011d},
-- {0x0000a150, 0x02030204},
-- {0x0000a154, 0x02010202},
-- {0x0000a158, 0x021f0200},
-- {0x0000a15c, 0x0302021e},
-- {0x0000a160, 0x03000301},
-- {0x0000a164, 0x031e031f},
-- {0x0000a168, 0x0402031d},
-- {0x0000a16c, 0x04000401},
-- {0x0000a170, 0x041e041f},
-- {0x0000a174, 0x0502041d},
-- {0x0000a178, 0x05000501},
-- {0x0000a17c, 0x051e051f},
-- {0x0000a180, 0x06010602},
-- {0x0000a184, 0x061f0600},
-- {0x0000a188, 0x061d061e},
-- {0x0000a18c, 0x07020703},
-- {0x0000a190, 0x07000701},
-- {0x0000a194, 0x00000000},
-- {0x0000a198, 0x00000000},
-- {0x0000a19c, 0x00000000},
-- {0x0000a1a0, 0x00000000},
-- {0x0000a1a4, 0x00000000},
-- {0x0000a1a8, 0x00000000},
-- {0x0000a1ac, 0x00000000},
-- {0x0000a1b0, 0x00000000},
-- {0x0000a1b4, 0x00000000},
-- {0x0000a1b8, 0x00000000},
-- {0x0000a1bc, 0x00000000},
-- {0x0000a1c0, 0x00000000},
-- {0x0000a1c4, 0x00000000},
-- {0x0000a1c8, 0x00000000},
-- {0x0000a1cc, 0x00000000},
-- {0x0000a1d0, 0x00000000},
-- {0x0000a1d4, 0x00000000},
-- {0x0000a1d8, 0x00000000},
-- {0x0000a1dc, 0x00000000},
-- {0x0000a1e0, 0x00000000},
-- {0x0000a1e4, 0x00000000},
-- {0x0000a1e8, 0x00000000},
-- {0x0000a1ec, 0x00000000},
-- {0x0000a1f0, 0x00000396},
-- {0x0000a1f4, 0x00000396},
-- {0x0000a1f8, 0x00000396},
-- {0x0000a1fc, 0x00000196},
-- {0x0000b000, 0x00010000},
-- {0x0000b004, 0x00030002},
-- {0x0000b008, 0x00050004},
-- {0x0000b00c, 0x00810080},
-- {0x0000b010, 0x00830082},
-- {0x0000b014, 0x01810180},
-- {0x0000b018, 0x01830182},
-- {0x0000b01c, 0x01850184},
-- {0x0000b020, 0x02810280},
-- {0x0000b024, 0x02830282},
-- {0x0000b028, 0x02850284},
-- {0x0000b02c, 0x02890288},
-- {0x0000b030, 0x028b028a},
-- {0x0000b034, 0x0388028c},
-- {0x0000b038, 0x038a0389},
-- {0x0000b03c, 0x038c038b},
-- {0x0000b040, 0x0390038d},
-- {0x0000b044, 0x03920391},
-- {0x0000b048, 0x03940393},
-- {0x0000b04c, 0x03960395},
-- {0x0000b050, 0x00000000},
-- {0x0000b054, 0x00000000},
-- {0x0000b058, 0x00000000},
-- {0x0000b05c, 0x00000000},
-- {0x0000b060, 0x00000000},
-- {0x0000b064, 0x00000000},
-- {0x0000b068, 0x00000000},
-- {0x0000b06c, 0x00000000},
-- {0x0000b070, 0x00000000},
-- {0x0000b074, 0x00000000},
-- {0x0000b078, 0x00000000},
-- {0x0000b07c, 0x00000000},
-- {0x0000b080, 0x2a2d2f32},
-- {0x0000b084, 0x21232328},
-- {0x0000b088, 0x19191c1e},
-- {0x0000b08c, 0x12141417},
-- {0x0000b090, 0x07070e0e},
-- {0x0000b094, 0x03030305},
-- {0x0000b098, 0x00000003},
-- {0x0000b09c, 0x00000000},
-- {0x0000b0a0, 0x00000000},
-- {0x0000b0a4, 0x00000000},
-- {0x0000b0a8, 0x00000000},
-- {0x0000b0ac, 0x00000000},
-- {0x0000b0b0, 0x00000000},
-- {0x0000b0b4, 0x00000000},
-- {0x0000b0b8, 0x00000000},
-- {0x0000b0bc, 0x00000000},
-- {0x0000b0c0, 0x003f0020},
-- {0x0000b0c4, 0x00400041},
-- {0x0000b0c8, 0x0140005f},
-- {0x0000b0cc, 0x0160015f},
-- {0x0000b0d0, 0x017e017f},
-- {0x0000b0d4, 0x02410242},
-- {0x0000b0d8, 0x025f0240},
-- {0x0000b0dc, 0x027f0260},
-- {0x0000b0e0, 0x0341027e},
-- {0x0000b0e4, 0x035f0340},
-- {0x0000b0e8, 0x037f0360},
-- {0x0000b0ec, 0x04400441},
-- {0x0000b0f0, 0x0460045f},
-- {0x0000b0f4, 0x0541047f},
-- {0x0000b0f8, 0x055f0540},
-- {0x0000b0fc, 0x057f0560},
-- {0x0000b100, 0x06400641},
-- {0x0000b104, 0x0660065f},
-- {0x0000b108, 0x067e067f},
-- {0x0000b10c, 0x07410742},
-- {0x0000b110, 0x075f0740},
-- {0x0000b114, 0x077f0760},
-- {0x0000b118, 0x07800781},
-- {0x0000b11c, 0x07a0079f},
-- {0x0000b120, 0x07c107bf},
-- {0x0000b124, 0x000007c0},
-- {0x0000b128, 0x00000000},
-- {0x0000b12c, 0x00000000},
-- {0x0000b130, 0x00000000},
-- {0x0000b134, 0x00000000},
-- {0x0000b138, 0x00000000},
-- {0x0000b13c, 0x00000000},
-- {0x0000b140, 0x003f0020},
-- {0x0000b144, 0x00400041},
-- {0x0000b148, 0x0140005f},
-- {0x0000b14c, 0x0160015f},
-- {0x0000b150, 0x017e017f},
-- {0x0000b154, 0x02410242},
-- {0x0000b158, 0x025f0240},
-- {0x0000b15c, 0x027f0260},
-- {0x0000b160, 0x0341027e},
-- {0x0000b164, 0x035f0340},
-- {0x0000b168, 0x037f0360},
-- {0x0000b16c, 0x04400441},
-- {0x0000b170, 0x0460045f},
-- {0x0000b174, 0x0541047f},
-- {0x0000b178, 0x055f0540},
-- {0x0000b17c, 0x057f0560},
-- {0x0000b180, 0x06400641},
-- {0x0000b184, 0x0660065f},
-- {0x0000b188, 0x067e067f},
-- {0x0000b18c, 0x07410742},
-- {0x0000b190, 0x075f0740},
-- {0x0000b194, 0x077f0760},
-- {0x0000b198, 0x07800781},
-- {0x0000b19c, 0x07a0079f},
-- {0x0000b1a0, 0x07c107bf},
-- {0x0000b1a4, 0x000007c0},
-- {0x0000b1a8, 0x00000000},
-- {0x0000b1ac, 0x00000000},
-- {0x0000b1b0, 0x00000000},
-- {0x0000b1b4, 0x00000000},
-- {0x0000b1b8, 0x00000000},
-- {0x0000b1bc, 0x00000000},
-- {0x0000b1c0, 0x00000000},
-- {0x0000b1c4, 0x00000000},
-- {0x0000b1c8, 0x00000000},
-- {0x0000b1cc, 0x00000000},
-- {0x0000b1d0, 0x00000000},
-- {0x0000b1d4, 0x00000000},
-- {0x0000b1d8, 0x00000000},
-- {0x0000b1dc, 0x00000000},
-- {0x0000b1e0, 0x00000000},
-- {0x0000b1e4, 0x00000000},
-- {0x0000b1e8, 0x00000000},
-- {0x0000b1ec, 0x00000000},
-- {0x0000b1f0, 0x00000396},
-- {0x0000b1f4, 0x00000396},
-- {0x0000b1f8, 0x00000396},
-- {0x0000b1fc, 0x00000196},
--};
--
--static const u32 ar9480_modes_high_ob_db_tx_gain_table_1p0[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-- {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-- {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
-- {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
-- {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
-- {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
-- {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
-- {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
-- {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
-- {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
-- {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
-- {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
-- {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
-- {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
-- {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
-- {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
-- {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
-- {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
-- {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
-- {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
-- {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
-- {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
-- {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
-- {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
-- {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
-- {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
-- {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
-- {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
-- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
-- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
-- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
-- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
-- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
-- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
-- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-- {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-- {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-- {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
-- {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-- {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
--};
--
--static const u32 ar9480_common_wo_xlna_rx_gain_table_1p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x00010000},
-- {0x0000a004, 0x00030002},
-- {0x0000a008, 0x00050004},
-- {0x0000a00c, 0x00810080},
-- {0x0000a010, 0x00830082},
-- {0x0000a014, 0x01810180},
-- {0x0000a018, 0x01830182},
-- {0x0000a01c, 0x01850184},
-- {0x0000a020, 0x01890188},
-- {0x0000a024, 0x018b018a},
-- {0x0000a028, 0x018d018c},
-- {0x0000a02c, 0x03820190},
-- {0x0000a030, 0x03840383},
-- {0x0000a034, 0x03880385},
-- {0x0000a038, 0x038a0389},
-- {0x0000a03c, 0x038c038b},
-- {0x0000a040, 0x0390038d},
-- {0x0000a044, 0x03920391},
-- {0x0000a048, 0x03940393},
-- {0x0000a04c, 0x03960395},
-- {0x0000a050, 0x00000000},
-- {0x0000a054, 0x00000000},
-- {0x0000a058, 0x00000000},
-- {0x0000a05c, 0x00000000},
-- {0x0000a060, 0x00000000},
-- {0x0000a064, 0x00000000},
-- {0x0000a068, 0x00000000},
-- {0x0000a06c, 0x00000000},
-- {0x0000a070, 0x00000000},
-- {0x0000a074, 0x00000000},
-- {0x0000a078, 0x00000000},
-- {0x0000a07c, 0x00000000},
-- {0x0000a080, 0x29292929},
-- {0x0000a084, 0x29292929},
-- {0x0000a088, 0x29292929},
-- {0x0000a08c, 0x29292929},
-- {0x0000a090, 0x22292929},
-- {0x0000a094, 0x1d1d2222},
-- {0x0000a098, 0x0c111117},
-- {0x0000a09c, 0x00030303},
-- {0x0000a0a0, 0x00000000},
-- {0x0000a0a4, 0x00000000},
-- {0x0000a0a8, 0x00000000},
-- {0x0000a0ac, 0x00000000},
-- {0x0000a0b0, 0x00000000},
-- {0x0000a0b4, 0x00000000},
-- {0x0000a0b8, 0x00000000},
-- {0x0000a0bc, 0x00000000},
-- {0x0000a0c0, 0x001f0000},
-- {0x0000a0c4, 0x01000101},
-- {0x0000a0c8, 0x011e011f},
-- {0x0000a0cc, 0x011c011d},
-- {0x0000a0d0, 0x02030204},
-- {0x0000a0d4, 0x02010202},
-- {0x0000a0d8, 0x021f0200},
-- {0x0000a0dc, 0x0302021e},
-- {0x0000a0e0, 0x03000301},
-- {0x0000a0e4, 0x031e031f},
-- {0x0000a0e8, 0x0402031d},
-- {0x0000a0ec, 0x04000401},
-- {0x0000a0f0, 0x041e041f},
-- {0x0000a0f4, 0x0502041d},
-- {0x0000a0f8, 0x05000501},
-- {0x0000a0fc, 0x051e051f},
-- {0x0000a100, 0x06010602},
-- {0x0000a104, 0x061f0600},
-- {0x0000a108, 0x061d061e},
-- {0x0000a10c, 0x07020703},
-- {0x0000a110, 0x07000701},
-- {0x0000a114, 0x00000000},
-- {0x0000a118, 0x00000000},
-- {0x0000a11c, 0x00000000},
-- {0x0000a120, 0x00000000},
-- {0x0000a124, 0x00000000},
-- {0x0000a128, 0x00000000},
-- {0x0000a12c, 0x00000000},
-- {0x0000a130, 0x00000000},
-- {0x0000a134, 0x00000000},
-- {0x0000a138, 0x00000000},
-- {0x0000a13c, 0x00000000},
-- {0x0000a140, 0x001f0000},
-- {0x0000a144, 0x01000101},
-- {0x0000a148, 0x011e011f},
-- {0x0000a14c, 0x011c011d},
-- {0x0000a150, 0x02030204},
-- {0x0000a154, 0x02010202},
-- {0x0000a158, 0x021f0200},
-- {0x0000a15c, 0x0302021e},
-- {0x0000a160, 0x03000301},
-- {0x0000a164, 0x031e031f},
-- {0x0000a168, 0x0402031d},
-- {0x0000a16c, 0x04000401},
-- {0x0000a170, 0x041e041f},
-- {0x0000a174, 0x0502041d},
-- {0x0000a178, 0x05000501},
-- {0x0000a17c, 0x051e051f},
-- {0x0000a180, 0x06010602},
-- {0x0000a184, 0x061f0600},
-- {0x0000a188, 0x061d061e},
-- {0x0000a18c, 0x07020703},
-- {0x0000a190, 0x07000701},
-- {0x0000a194, 0x00000000},
-- {0x0000a198, 0x00000000},
-- {0x0000a19c, 0x00000000},
-- {0x0000a1a0, 0x00000000},
-- {0x0000a1a4, 0x00000000},
-- {0x0000a1a8, 0x00000000},
-- {0x0000a1ac, 0x00000000},
-- {0x0000a1b0, 0x00000000},
-- {0x0000a1b4, 0x00000000},
-- {0x0000a1b8, 0x00000000},
-- {0x0000a1bc, 0x00000000},
-- {0x0000a1c0, 0x00000000},
-- {0x0000a1c4, 0x00000000},
-- {0x0000a1c8, 0x00000000},
-- {0x0000a1cc, 0x00000000},
-- {0x0000a1d0, 0x00000000},
-- {0x0000a1d4, 0x00000000},
-- {0x0000a1d8, 0x00000000},
-- {0x0000a1dc, 0x00000000},
-- {0x0000a1e0, 0x00000000},
-- {0x0000a1e4, 0x00000000},
-- {0x0000a1e8, 0x00000000},
-- {0x0000a1ec, 0x00000000},
-- {0x0000a1f0, 0x00000396},
-- {0x0000a1f4, 0x00000396},
-- {0x0000a1f8, 0x00000396},
-- {0x0000a1fc, 0x00000196},
-- {0x0000b000, 0x00010000},
-- {0x0000b004, 0x00030002},
-- {0x0000b008, 0x00050004},
-- {0x0000b00c, 0x00810080},
-- {0x0000b010, 0x00830082},
-- {0x0000b014, 0x01810180},
-- {0x0000b018, 0x01830182},
-- {0x0000b01c, 0x01850184},
-- {0x0000b020, 0x02810280},
-- {0x0000b024, 0x02830282},
-- {0x0000b028, 0x02850284},
-- {0x0000b02c, 0x02890288},
-- {0x0000b030, 0x028b028a},
-- {0x0000b034, 0x0388028c},
-- {0x0000b038, 0x038a0389},
-- {0x0000b03c, 0x038c038b},
-- {0x0000b040, 0x0390038d},
-- {0x0000b044, 0x03920391},
-- {0x0000b048, 0x03940393},
-- {0x0000b04c, 0x03960395},
-- {0x0000b050, 0x00000000},
-- {0x0000b054, 0x00000000},
-- {0x0000b058, 0x00000000},
-- {0x0000b05c, 0x00000000},
-- {0x0000b060, 0x00000000},
-- {0x0000b064, 0x00000000},
-- {0x0000b068, 0x00000000},
-- {0x0000b06c, 0x00000000},
-- {0x0000b070, 0x00000000},
-- {0x0000b074, 0x00000000},
-- {0x0000b078, 0x00000000},
-- {0x0000b07c, 0x00000000},
-- {0x0000b080, 0x32323232},
-- {0x0000b084, 0x2f2f3232},
-- {0x0000b088, 0x23282a2d},
-- {0x0000b08c, 0x1c1e2123},
-- {0x0000b090, 0x14171919},
-- {0x0000b094, 0x0e0e1214},
-- {0x0000b098, 0x03050707},
-- {0x0000b09c, 0x00030303},
-- {0x0000b0a0, 0x00000000},
-- {0x0000b0a4, 0x00000000},
-- {0x0000b0a8, 0x00000000},
-- {0x0000b0ac, 0x00000000},
-- {0x0000b0b0, 0x00000000},
-- {0x0000b0b4, 0x00000000},
-- {0x0000b0b8, 0x00000000},
-- {0x0000b0bc, 0x00000000},
-- {0x0000b0c0, 0x003f0020},
-- {0x0000b0c4, 0x00400041},
-- {0x0000b0c8, 0x0140005f},
-- {0x0000b0cc, 0x0160015f},
-- {0x0000b0d0, 0x017e017f},
-- {0x0000b0d4, 0x02410242},
-- {0x0000b0d8, 0x025f0240},
-- {0x0000b0dc, 0x027f0260},
-- {0x0000b0e0, 0x0341027e},
-- {0x0000b0e4, 0x035f0340},
-- {0x0000b0e8, 0x037f0360},
-- {0x0000b0ec, 0x04400441},
-- {0x0000b0f0, 0x0460045f},
-- {0x0000b0f4, 0x0541047f},
-- {0x0000b0f8, 0x055f0540},
-- {0x0000b0fc, 0x057f0560},
-- {0x0000b100, 0x06400641},
-- {0x0000b104, 0x0660065f},
-- {0x0000b108, 0x067e067f},
-- {0x0000b10c, 0x07410742},
-- {0x0000b110, 0x075f0740},
-- {0x0000b114, 0x077f0760},
-- {0x0000b118, 0x07800781},
-- {0x0000b11c, 0x07a0079f},
-- {0x0000b120, 0x07c107bf},
-- {0x0000b124, 0x000007c0},
-- {0x0000b128, 0x00000000},
-- {0x0000b12c, 0x00000000},
-- {0x0000b130, 0x00000000},
-- {0x0000b134, 0x00000000},
-- {0x0000b138, 0x00000000},
-- {0x0000b13c, 0x00000000},
-- {0x0000b140, 0x003f0020},
-- {0x0000b144, 0x00400041},
-- {0x0000b148, 0x0140005f},
-- {0x0000b14c, 0x0160015f},
-- {0x0000b150, 0x017e017f},
-- {0x0000b154, 0x02410242},
-- {0x0000b158, 0x025f0240},
-- {0x0000b15c, 0x027f0260},
-- {0x0000b160, 0x0341027e},
-- {0x0000b164, 0x035f0340},
-- {0x0000b168, 0x037f0360},
-- {0x0000b16c, 0x04400441},
-- {0x0000b170, 0x0460045f},
-- {0x0000b174, 0x0541047f},
-- {0x0000b178, 0x055f0540},
-- {0x0000b17c, 0x057f0560},
-- {0x0000b180, 0x06400641},
-- {0x0000b184, 0x0660065f},
-- {0x0000b188, 0x067e067f},
-- {0x0000b18c, 0x07410742},
-- {0x0000b190, 0x075f0740},
-- {0x0000b194, 0x077f0760},
-- {0x0000b198, 0x07800781},
-- {0x0000b19c, 0x07a0079f},
-- {0x0000b1a0, 0x07c107bf},
-- {0x0000b1a4, 0x000007c0},
-- {0x0000b1a8, 0x00000000},
-- {0x0000b1ac, 0x00000000},
-- {0x0000b1b0, 0x00000000},
-- {0x0000b1b4, 0x00000000},
-- {0x0000b1b8, 0x00000000},
-- {0x0000b1bc, 0x00000000},
-- {0x0000b1c0, 0x00000000},
-- {0x0000b1c4, 0x00000000},
-- {0x0000b1c8, 0x00000000},
-- {0x0000b1cc, 0x00000000},
-- {0x0000b1d0, 0x00000000},
-- {0x0000b1d4, 0x00000000},
-- {0x0000b1d8, 0x00000000},
-- {0x0000b1dc, 0x00000000},
-- {0x0000b1e0, 0x00000000},
-- {0x0000b1e4, 0x00000000},
-- {0x0000b1e8, 0x00000000},
-- {0x0000b1ec, 0x00000000},
-- {0x0000b1f0, 0x00000396},
-- {0x0000b1f4, 0x00000396},
-- {0x0000b1f8, 0x00000396},
-- {0x0000b1fc, 0x00000196},
--};
--
--static const u32 ar9480_1p0_mac_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
-- {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
-- {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
-- {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
-- {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
-- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
-- {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
-- {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
--};
--
--static const u32 ar9480_1p0_mac_postamble_emulation[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
-- {0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
--};
--
--static const u32 ar9480_1p0_tx_gain_table_baseband_postamble_emulation[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
-- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
-- {0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
-- {0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
-- {0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
-- {0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
-- {0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
-- {0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
-- {0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
-- {0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
-- {0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
-- {0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
-- {0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
--};
--
--static const u32 ar9480_1p0_radio_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
-- {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24646c08, 0x24646c08},
-- {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
-- {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
-- {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
-- {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
-- {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
--};
--
--static const u32 ar9480_1p0_soc_postamble_emulation[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00007010, 0x00001133, 0x00001133, 0x00001133, 0x00001133},
--};
--
--static const u32 ar9480_1p0_baseband_core[][2] = {
-- /* Addr allmodes */
-- {0x00009800, 0xafe68e30},
-- {0x00009804, 0xfd14e000},
-- {0x00009808, 0x9c0a9f6b},
-- {0x0000980c, 0x04900000},
-- {0x00009814, 0x9280c00a},
-- {0x00009818, 0x00000000},
-- {0x0000981c, 0x00020028},
-- {0x00009834, 0x6400a290},
-- {0x00009838, 0x0108ecff},
-- {0x0000983c, 0x0d000600},
-- {0x00009880, 0x201fff00},
-- {0x00009884, 0x00001042},
-- {0x000098a4, 0x00200400},
-- {0x000098b0, 0x32840bbe},
-- {0x000098d0, 0x004b6a8e},
-- {0x000098d4, 0x00000820},
-- {0x000098dc, 0x00000000},
-- {0x000098e4, 0x01ffffff},
-- {0x000098e8, 0x01ffffff},
-- {0x000098ec, 0x01ffffff},
-- {0x000098f0, 0x00000000},
-- {0x000098f4, 0x00000000},
-- {0x00009c04, 0xff55ff55},
-- {0x00009c08, 0x0320ff55},
-- {0x00009c0c, 0x00000000},
-- {0x00009c10, 0x00000000},
-- {0x00009c14, 0x00046384},
-- {0x00009c18, 0x05b6b440},
-- {0x00009c1c, 0x00b6b440},
-- {0x00009d00, 0xc080a333},
-- {0x00009d04, 0x40206c10},
-- {0x00009d08, 0x009c4060},
-- {0x00009d0c, 0x9883800a},
-- {0x00009d10, 0x01834061},
-- {0x00009d14, 0x00c0040b},
-- {0x00009d18, 0x00000000},
-- {0x00009e08, 0x0038230c},
-- {0x00009e24, 0x990bb514},
-- {0x00009e28, 0x0c6f0000},
-- {0x00009e30, 0x06336f77},
-- {0x00009e34, 0x6af6532f},
-- {0x00009e38, 0x0cc80c00},
-- {0x00009e40, 0x0d261820},
-- {0x00009e4c, 0x00001004},
-- {0x00009e50, 0x00ff03f1},
-- {0x00009e54, 0x64c355c7},
-- {0x00009e58, 0xfd897735},
-- {0x00009e5c, 0xe9198724},
-- {0x00009fc0, 0x803e4788},
-- {0x00009fc4, 0x0001efb5},
-- {0x00009fcc, 0x40000014},
-- {0x00009fd0, 0x01193b93},
-- {0x0000a20c, 0x00000000},
-- {0x0000a220, 0x00000000},
-- {0x0000a224, 0x00000000},
-- {0x0000a228, 0x10002310},
-- {0x0000a23c, 0x00000000},
-- {0x0000a244, 0x0c000000},
-- {0x0000a2a0, 0x00000001},
-- {0x0000a2c0, 0x00000001},
-- {0x0000a2c8, 0x00000000},
-- {0x0000a2cc, 0x18c43433},
-- {0x0000a2d4, 0x00000000},
-- {0x0000a2ec, 0x00000000},
-- {0x0000a2f0, 0x00000000},
-- {0x0000a2f4, 0x00000000},
-- {0x0000a2f8, 0x00000000},
-- {0x0000a344, 0x00000000},
-- {0x0000a34c, 0x00000000},
-- {0x0000a350, 0x0000a000},
-- {0x0000a364, 0x00000000},
-- {0x0000a370, 0x00000000},
-- {0x0000a390, 0x00000001},
-- {0x0000a394, 0x00000444},
-- {0x0000a398, 0x001f0e0f},
-- {0x0000a39c, 0x0075393f},
-- {0x0000a3a0, 0xb79f6427},
-- {0x0000a3a4, 0x00000000},
-- {0x0000a3a8, 0xaaaaaaaa},
-- {0x0000a3ac, 0x3c466478},
-- {0x0000a3c0, 0x20202020},
-- {0x0000a3c4, 0x22222220},
-- {0x0000a3c8, 0x20200020},
-- {0x0000a3cc, 0x20202020},
-- {0x0000a3d0, 0x20202020},
-- {0x0000a3d4, 0x20202020},
-- {0x0000a3d8, 0x20202020},
-- {0x0000a3dc, 0x20202020},
-- {0x0000a3e0, 0x20202020},
-- {0x0000a3e4, 0x20202020},
-- {0x0000a3e8, 0x20202020},
-- {0x0000a3ec, 0x20202020},
-- {0x0000a3f0, 0x00000000},
-- {0x0000a3f4, 0x00000006},
-- {0x0000a3f8, 0x0c9bd380},
-- {0x0000a3fc, 0x000f0f01},
-- {0x0000a400, 0x8fa91f01},
-- {0x0000a404, 0x00000000},
-- {0x0000a408, 0x0e79e5c6},
-- {0x0000a40c, 0x00820820},
-- {0x0000a414, 0x1ce739ce},
-- {0x0000a418, 0x2d001dce},
-- {0x0000a41c, 0x1ce739ce},
-- {0x0000a420, 0x000001ce},
-- {0x0000a424, 0x1ce739ce},
-- {0x0000a428, 0x000001ce},
-- {0x0000a42c, 0x1ce739ce},
-- {0x0000a430, 0x1ce739ce},
-- {0x0000a434, 0x00000000},
-- {0x0000a438, 0x00001801},
-- {0x0000a43c, 0x00100000},
-- {0x0000a440, 0x00000000},
-- {0x0000a444, 0x00000000},
-- {0x0000a448, 0x05000080},
-- {0x0000a44c, 0x00000001},
-- {0x0000a450, 0x00010000},
-- {0x0000a458, 0x00000000},
-- {0x0000a644, 0xbfad9d74},
-- {0x0000a648, 0x0048060a},
-- {0x0000a64c, 0x00003c37},
-- {0x0000a670, 0x03020100},
-- {0x0000a674, 0x09080504},
-- {0x0000a678, 0x0d0c0b0a},
-- {0x0000a67c, 0x13121110},
-- {0x0000a680, 0x31301514},
-- {0x0000a684, 0x35343332},
-- {0x0000a688, 0x00000036},
-- {0x0000a690, 0x00000838},
-- {0x0000a6b0, 0x0000000a},
-- {0x0000a6b4, 0x28f12c01},
-- {0x0000a7c0, 0x00000000},
-- {0x0000a7c4, 0xfffffffc},
-- {0x0000a7c8, 0x00000000},
-- {0x0000a7cc, 0x00000000},
-- {0x0000a7d0, 0x00000000},
-- {0x0000a7d4, 0x00000004},
-- {0x0000a7dc, 0x00000001},
-- {0x0000a8d0, 0x004b6a8e},
-- {0x0000a8d4, 0x00000820},
-- {0x0000a8dc, 0x00000000},
-- {0x0000a8f0, 0x00000000},
-- {0x0000a8f4, 0x00000000},
-- {0x0000b2d0, 0x00000080},
-- {0x0000b2d4, 0x00000000},
-- {0x0000b2ec, 0x00000000},
-- {0x0000b2f0, 0x00000000},
-- {0x0000b2f4, 0x00000000},
-- {0x0000b2f8, 0x00000000},
-- {0x0000b408, 0x0e79e5c0},
-- {0x0000b40c, 0x00820820},
-- {0x0000b420, 0x00000000},
-- {0x0000b6b0, 0x0000000a},
-- {0x0000b6b4, 0x00c00001},
--};
--
--static const u32 ar9480_1p0_baseband_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
-- {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
-- {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
-- {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
-- {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
-- {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
-- {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
-- {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
-- {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
-- {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
-- {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
-- {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e},
-- {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
-- {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
-- {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
-- {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
-- {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},
-- {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
-- {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
-- {0x0000a204, 0x0131b7c0, 0x0131b7c4, 0x0131b7c4, 0x0131b7c0},
-- {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
-- {0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
-- {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
-- {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
-- {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
-- {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
-- {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
-- {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
-- {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
-- {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
-- {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-- {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
-- {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
-- {0x0000a288, 0x00000110, 0x00000110, 0x00100110, 0x00100110},
-- {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
-- {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
-- {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
-- {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
-- {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-- {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
-- {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-- {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
-- {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
--};
--
--static const u32 ar9480_modes_fast_clock_1p0[][3] = {
-- /* Addr 5G_HT20 5G_HT40 */
-- {0x00001030, 0x00000268, 0x000004d0},
-- {0x00001070, 0x0000018c, 0x00000318},
-- {0x000010b0, 0x00000fd0, 0x00001fa0},
-- {0x00008014, 0x044c044c, 0x08980898},
-- {0x0000801c, 0x148ec02b, 0x148ec057},
-- {0x00008318, 0x000044c0, 0x00008980},
-- {0x00009e00, 0x0372131c, 0x0372131c},
-- {0x0000a230, 0x0000400b, 0x00004016},
-- {0x0000a254, 0x00000898, 0x00001130},
--};
--
--static const u32 ar9480_modes_low_ob_db_tx_gain_table_1p0[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-- {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-- {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
-- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
-- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
-- {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
-- {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
-- {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
-- {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
-- {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
-- {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
-- {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
-- {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
-- {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
-- {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
-- {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
-- {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
-- {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
-- {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
-- {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
-- {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
-- {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
-- {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
-- {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
-- {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
-- {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
-- {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
-- {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
-- {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
-- {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
-- {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
-- {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
-- {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
-- {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-- {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-- {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-- {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
-- {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-- {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
--};
--
--static const u32 ar9480_1p0_soc_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
--};
--
--static const u32 ar9480_common_mixed_rx_gain_table_1p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x00010000},
-- {0x0000a004, 0x00030002},
-- {0x0000a008, 0x00050004},
-- {0x0000a00c, 0x00810080},
-- {0x0000a010, 0x00830082},
-- {0x0000a014, 0x01810180},
-- {0x0000a018, 0x01830182},
-- {0x0000a01c, 0x01850184},
-- {0x0000a020, 0x01890188},
-- {0x0000a024, 0x018b018a},
-- {0x0000a028, 0x018d018c},
-- {0x0000a02c, 0x03820190},
-- {0x0000a030, 0x03840383},
-- {0x0000a034, 0x03880385},
-- {0x0000a038, 0x038a0389},
-- {0x0000a03c, 0x038c038b},
-- {0x0000a040, 0x0390038d},
-- {0x0000a044, 0x03920391},
-- {0x0000a048, 0x03940393},
-- {0x0000a04c, 0x03960395},
-- {0x0000a050, 0x00000000},
-- {0x0000a054, 0x00000000},
-- {0x0000a058, 0x00000000},
-- {0x0000a05c, 0x00000000},
-- {0x0000a060, 0x00000000},
-- {0x0000a064, 0x00000000},
-- {0x0000a068, 0x00000000},
-- {0x0000a06c, 0x00000000},
-- {0x0000a070, 0x00000000},
-- {0x0000a074, 0x00000000},
-- {0x0000a078, 0x00000000},
-- {0x0000a07c, 0x00000000},
-- {0x0000a080, 0x29292929},
-- {0x0000a084, 0x29292929},
-- {0x0000a088, 0x29292929},
-- {0x0000a08c, 0x29292929},
-- {0x0000a090, 0x22292929},
-- {0x0000a094, 0x1d1d2222},
-- {0x0000a098, 0x0c111117},
-- {0x0000a09c, 0x00030303},
-- {0x0000a0a0, 0x00000000},
-- {0x0000a0a4, 0x00000000},
-- {0x0000a0a8, 0x00000000},
-- {0x0000a0ac, 0x00000000},
-- {0x0000a0b0, 0x00000000},
-- {0x0000a0b4, 0x00000000},
-- {0x0000a0b8, 0x00000000},
-- {0x0000a0bc, 0x00000000},
-- {0x0000a0c0, 0x001f0000},
-- {0x0000a0c4, 0x01000101},
-- {0x0000a0c8, 0x011e011f},
-- {0x0000a0cc, 0x011c011d},
-- {0x0000a0d0, 0x02030204},
-- {0x0000a0d4, 0x02010202},
-- {0x0000a0d8, 0x021f0200},
-- {0x0000a0dc, 0x0302021e},
-- {0x0000a0e0, 0x03000301},
-- {0x0000a0e4, 0x031e031f},
-- {0x0000a0e8, 0x0402031d},
-- {0x0000a0ec, 0x04000401},
-- {0x0000a0f0, 0x041e041f},
-- {0x0000a0f4, 0x0502041d},
-- {0x0000a0f8, 0x05000501},
-- {0x0000a0fc, 0x051e051f},
-- {0x0000a100, 0x06010602},
-- {0x0000a104, 0x061f0600},
-- {0x0000a108, 0x061d061e},
-- {0x0000a10c, 0x07020703},
-- {0x0000a110, 0x07000701},
-- {0x0000a114, 0x00000000},
-- {0x0000a118, 0x00000000},
-- {0x0000a11c, 0x00000000},
-- {0x0000a120, 0x00000000},
-- {0x0000a124, 0x00000000},
-- {0x0000a128, 0x00000000},
-- {0x0000a12c, 0x00000000},
-- {0x0000a130, 0x00000000},
-- {0x0000a134, 0x00000000},
-- {0x0000a138, 0x00000000},
-- {0x0000a13c, 0x00000000},
-- {0x0000a140, 0x001f0000},
-- {0x0000a144, 0x01000101},
-- {0x0000a148, 0x011e011f},
-- {0x0000a14c, 0x011c011d},
-- {0x0000a150, 0x02030204},
-- {0x0000a154, 0x02010202},
-- {0x0000a158, 0x021f0200},
-- {0x0000a15c, 0x0302021e},
-- {0x0000a160, 0x03000301},
-- {0x0000a164, 0x031e031f},
-- {0x0000a168, 0x0402031d},
-- {0x0000a16c, 0x04000401},
-- {0x0000a170, 0x041e041f},
-- {0x0000a174, 0x0502041d},
-- {0x0000a178, 0x05000501},
-- {0x0000a17c, 0x051e051f},
-- {0x0000a180, 0x06010602},
-- {0x0000a184, 0x061f0600},
-- {0x0000a188, 0x061d061e},
-- {0x0000a18c, 0x07020703},
-- {0x0000a190, 0x07000701},
-- {0x0000a194, 0x00000000},
-- {0x0000a198, 0x00000000},
-- {0x0000a19c, 0x00000000},
-- {0x0000a1a0, 0x00000000},
-- {0x0000a1a4, 0x00000000},
-- {0x0000a1a8, 0x00000000},
-- {0x0000a1ac, 0x00000000},
-- {0x0000a1b0, 0x00000000},
-- {0x0000a1b4, 0x00000000},
-- {0x0000a1b8, 0x00000000},
-- {0x0000a1bc, 0x00000000},
-- {0x0000a1c0, 0x00000000},
-- {0x0000a1c4, 0x00000000},
-- {0x0000a1c8, 0x00000000},
-- {0x0000a1cc, 0x00000000},
-- {0x0000a1d0, 0x00000000},
-- {0x0000a1d4, 0x00000000},
-- {0x0000a1d8, 0x00000000},
-- {0x0000a1dc, 0x00000000},
-- {0x0000a1e0, 0x00000000},
-- {0x0000a1e4, 0x00000000},
-- {0x0000a1e8, 0x00000000},
-- {0x0000a1ec, 0x00000000},
-- {0x0000a1f0, 0x00000396},
-- {0x0000a1f4, 0x00000396},
-- {0x0000a1f8, 0x00000396},
-- {0x0000a1fc, 0x00000196},
-- {0x0000b000, 0x00010000},
-- {0x0000b004, 0x00030002},
-- {0x0000b008, 0x00050004},
-- {0x0000b00c, 0x00810080},
-- {0x0000b010, 0x00830082},
-- {0x0000b014, 0x01810180},
-- {0x0000b018, 0x01830182},
-- {0x0000b01c, 0x01850184},
-- {0x0000b020, 0x02810280},
-- {0x0000b024, 0x02830282},
-- {0x0000b028, 0x02850284},
-- {0x0000b02c, 0x02890288},
-- {0x0000b030, 0x028b028a},
-- {0x0000b034, 0x0388028c},
-- {0x0000b038, 0x038a0389},
-- {0x0000b03c, 0x038c038b},
-- {0x0000b040, 0x0390038d},
-- {0x0000b044, 0x03920391},
-- {0x0000b048, 0x03940393},
-- {0x0000b04c, 0x03960395},
-- {0x0000b050, 0x00000000},
-- {0x0000b054, 0x00000000},
-- {0x0000b058, 0x00000000},
-- {0x0000b05c, 0x00000000},
-- {0x0000b060, 0x00000000},
-- {0x0000b064, 0x00000000},
-- {0x0000b068, 0x00000000},
-- {0x0000b06c, 0x00000000},
-- {0x0000b070, 0x00000000},
-- {0x0000b074, 0x00000000},
-- {0x0000b078, 0x00000000},
-- {0x0000b07c, 0x00000000},
-- {0x0000b080, 0x2a2d2f32},
-- {0x0000b084, 0x21232328},
-- {0x0000b088, 0x19191c1e},
-- {0x0000b08c, 0x12141417},
-- {0x0000b090, 0x07070e0e},
-- {0x0000b094, 0x03030305},
-- {0x0000b098, 0x00000003},
-- {0x0000b09c, 0x00000000},
-- {0x0000b0a0, 0x00000000},
-- {0x0000b0a4, 0x00000000},
-- {0x0000b0a8, 0x00000000},
-- {0x0000b0ac, 0x00000000},
-- {0x0000b0b0, 0x00000000},
-- {0x0000b0b4, 0x00000000},
-- {0x0000b0b8, 0x00000000},
-- {0x0000b0bc, 0x00000000},
-- {0x0000b0c0, 0x003f0020},
-- {0x0000b0c4, 0x00400041},
-- {0x0000b0c8, 0x0140005f},
-- {0x0000b0cc, 0x0160015f},
-- {0x0000b0d0, 0x017e017f},
-- {0x0000b0d4, 0x02410242},
-- {0x0000b0d8, 0x025f0240},
-- {0x0000b0dc, 0x027f0260},
-- {0x0000b0e0, 0x0341027e},
-- {0x0000b0e4, 0x035f0340},
-- {0x0000b0e8, 0x037f0360},
-- {0x0000b0ec, 0x04400441},
-- {0x0000b0f0, 0x0460045f},
-- {0x0000b0f4, 0x0541047f},
-- {0x0000b0f8, 0x055f0540},
-- {0x0000b0fc, 0x057f0560},
-- {0x0000b100, 0x06400641},
-- {0x0000b104, 0x0660065f},
-- {0x0000b108, 0x067e067f},
-- {0x0000b10c, 0x07410742},
-- {0x0000b110, 0x075f0740},
-- {0x0000b114, 0x077f0760},
-- {0x0000b118, 0x07800781},
-- {0x0000b11c, 0x07a0079f},
-- {0x0000b120, 0x07c107bf},
-- {0x0000b124, 0x000007c0},
-- {0x0000b128, 0x00000000},
-- {0x0000b12c, 0x00000000},
-- {0x0000b130, 0x00000000},
-- {0x0000b134, 0x00000000},
-- {0x0000b138, 0x00000000},
-- {0x0000b13c, 0x00000000},
-- {0x0000b140, 0x003f0020},
-- {0x0000b144, 0x00400041},
-- {0x0000b148, 0x0140005f},
-- {0x0000b14c, 0x0160015f},
-- {0x0000b150, 0x017e017f},
-- {0x0000b154, 0x02410242},
-- {0x0000b158, 0x025f0240},
-- {0x0000b15c, 0x027f0260},
-- {0x0000b160, 0x0341027e},
-- {0x0000b164, 0x035f0340},
-- {0x0000b168, 0x037f0360},
-- {0x0000b16c, 0x04400441},
-- {0x0000b170, 0x0460045f},
-- {0x0000b174, 0x0541047f},
-- {0x0000b178, 0x055f0540},
-- {0x0000b17c, 0x057f0560},
-- {0x0000b180, 0x06400641},
-- {0x0000b184, 0x0660065f},
-- {0x0000b188, 0x067e067f},
-- {0x0000b18c, 0x07410742},
-- {0x0000b190, 0x075f0740},
-- {0x0000b194, 0x077f0760},
-- {0x0000b198, 0x07800781},
-- {0x0000b19c, 0x07a0079f},
-- {0x0000b1a0, 0x07c107bf},
-- {0x0000b1a4, 0x000007c0},
-- {0x0000b1a8, 0x00000000},
-- {0x0000b1ac, 0x00000000},
-- {0x0000b1b0, 0x00000000},
-- {0x0000b1b4, 0x00000000},
-- {0x0000b1b8, 0x00000000},
-- {0x0000b1bc, 0x00000000},
-- {0x0000b1c0, 0x00000000},
-- {0x0000b1c4, 0x00000000},
-- {0x0000b1c8, 0x00000000},
-- {0x0000b1cc, 0x00000000},
-- {0x0000b1d0, 0x00000000},
-- {0x0000b1d4, 0x00000000},
-- {0x0000b1d8, 0x00000000},
-- {0x0000b1dc, 0x00000000},
-- {0x0000b1e0, 0x00000000},
-- {0x0000b1e4, 0x00000000},
-- {0x0000b1e8, 0x00000000},
-- {0x0000b1ec, 0x00000000},
-- {0x0000b1f0, 0x00000396},
-- {0x0000b1f4, 0x00000396},
-- {0x0000b1f8, 0x00000396},
-- {0x0000b1fc, 0x00000196},
--};
--
--static const u32 ar9480_pcie_phy_clkreq_disable_L1_1p0[][2] = {
-- /* Addr allmodes */
-- {0x00018c00, 0x10013e5e},
-- {0x00018c04, 0x000801d8},
-- {0x00018c08, 0x0000580c},
--};
--
--static const u32 ar9480_1p0_baseband_core_emulation[][2] = {
-- /* Addr allmodes */
-- {0x00009800, 0xafa68e30},
-- {0x00009884, 0x00002842},
-- {0x00009c04, 0xff55ff55},
-- {0x00009c08, 0x0320ff55},
-- {0x00009e50, 0x00000000},
-- {0x00009fcc, 0x00000014},
-- {0x0000a344, 0x00000010},
-- {0x0000a398, 0x00000000},
-- {0x0000a39c, 0x71733d01},
-- {0x0000a3a0, 0xd0ad5c12},
-- {0x0000a3c0, 0x22222220},
-- {0x0000a3c4, 0x22222222},
-- {0x0000a404, 0x00418a11},
-- {0x0000a418, 0x050001ce},
-- {0x0000a438, 0x00001800},
-- {0x0000a458, 0x01444452},
-- {0x0000a644, 0x3fad9d74},
-- {0x0000a690, 0x00000038},
--};
--
--static const u32 ar9480_1p0_radio_core[][2] = {
-- /* Addr allmodes */
-- {0x00016000, 0x36db6db6},
-- {0x00016004, 0x6db6db40},
-- {0x00016008, 0x73f00000},
-- {0x0001600c, 0x00000000},
-- {0x00016010, 0x6d820001},
-- {0x00016040, 0x7f80fff8},
-- {0x0001604c, 0x2699e04f},
-- {0x00016050, 0x6db6db6c},
-- {0x00016054, 0x6db60000},
-- {0x00016058, 0x6c200000},
-- {0x00016080, 0x00040000},
-- {0x00016084, 0x9a68048c},
-- {0x00016088, 0x54214514},
-- {0x0001608c, 0x12030409},
-- {0x00016090, 0x24926490},
-- {0x00016098, 0xd2888888},
-- {0x000160a0, 0x0a108ffe},
-- {0x000160a4, 0x812fc490},
-- {0x000160a8, 0x423c8000},
-- {0x000160b4, 0x92000000},
-- {0x000160b8, 0x0285dddc},
-- {0x000160bc, 0x02908888},
-- {0x000160c0, 0x00adb6d0},
-- {0x000160c4, 0x6db6db60},
-- {0x000160c8, 0x6db6db6c},
-- {0x000160cc, 0x0de6c1b0},
-- {0x00016100, 0x3fffbe04},
-- {0x00016104, 0xfff80000},
-- {0x00016108, 0x00200400},
-- {0x00016110, 0x00000000},
-- {0x00016144, 0x02084080},
-- {0x00016148, 0x000080c0},
-- {0x00016280, 0x050a0001},
-- {0x00016284, 0x3d841400},
-- {0x00016288, 0x00000000},
-- {0x0001628c, 0xe3000000},
-- {0x00016290, 0xa1005080},
-- {0x00016294, 0x00000020},
-- {0x00016298, 0x50a02900},
-- {0x00016340, 0x121e4276},
-- {0x00016344, 0x00300000},
-- {0x00016400, 0x36db6db6},
-- {0x00016404, 0x6db6db40},
-- {0x00016408, 0x73f00000},
-- {0x0001640c, 0x00000000},
-- {0x00016410, 0x6c800001},
-- {0x00016440, 0x7f80fff8},
-- {0x0001644c, 0x4699e04f},
-- {0x00016450, 0x6db6db6c},
-- {0x00016454, 0x6db60000},
-- {0x00016500, 0x3fffbe04},
-- {0x00016504, 0xfff80000},
-- {0x00016508, 0x00200400},
-- {0x00016510, 0x00000000},
-- {0x00016544, 0x02084080},
-- {0x00016548, 0x000080c0},
--};
--
--static const u32 ar9480_1p0_soc_preamble[][2] = {
-- /* Addr allmodes */
-- {0x00007020, 0x00000000},
-- {0x00007034, 0x00000002},
-- {0x00007038, 0x000004c2},
--};
--
--static const u32 ar9480_1p0_sys2ant[][2] = {
-- /* Addr allmodes */
-- {0x00063120, 0x00801980},
--};
--
--#endif /* INITVALS_9480_1P0_H */
---- a/drivers/net/wireless/ath/ath9k/ar9480_2p0_initvals.h
-+++ /dev/null
-@@ -1,1928 +0,0 @@
--/*
-- * Copyright (c) 2010 Atheros Communications Inc.
-- *
-- * Permission to use, copy, modify, and/or distribute this software for any
-- * purpose with or without fee is hereby granted, provided that the above
-- * copyright notice and this permission notice appear in all copies.
-- *
-- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-- */
--
--#ifndef INITVALS_9480_2P0_H
--#define INITVALS_9480_2P0_H
--
--/* AR9480 2.0 */
--
--static const u32 ar9480_modes_fast_clock_2p0[][3] = {
-- /* Addr 5G_HT20 5G_HT40 */
-- {0x00001030, 0x00000268, 0x000004d0},
-- {0x00001070, 0x0000018c, 0x00000318},
-- {0x000010b0, 0x00000fd0, 0x00001fa0},
-- {0x00008014, 0x044c044c, 0x08980898},
-- {0x0000801c, 0x148ec02b, 0x148ec057},
-- {0x00008318, 0x000044c0, 0x00008980},
-- {0x00009e00, 0x0372131c, 0x0372131c},
-- {0x0000a230, 0x0000400b, 0x00004016},
-- {0x0000a254, 0x00000898, 0x00001130},
--};
--
--static const u32 ar9480_pciephy_clkreq_enable_L1_2p0[][2] = {
-- /* Addr allmodes */
-- {0x00018c00, 0x18253ede},
-- {0x00018c04, 0x000801d8},
-- {0x00018c08, 0x0003580c},
--};
--
--static const u32 ar9480_2p0_baseband_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
-- {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
-- {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
-- {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
-- {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
-- {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
-- {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
-- {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
-- {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
-- {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
-- {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
-- {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3039605e, 0x33795d5e},
-- {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
-- {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
-- {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
-- {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
-- {0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
-- {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
-- {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
-- {0x0000a204, 0x013187c0, 0x013187c4, 0x013187c4, 0x013187c0},
-- {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
-- {0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
-- {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
-- {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
-- {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
-- {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
-- {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
-- {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
-- {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
-- {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
-- {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-- {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
-- {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
-- {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
-- {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
-- {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
-- {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
-- {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
-- {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-- {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
-- {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
-- {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
-- {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
--};
--
--static const u32 ar9480_2p0_mac_core_emulation[][2] = {
-- /* Addr allmodes */
-- {0x00000030, 0x000e0085},
-- {0x00000044, 0x00000008},
-- {0x0000805c, 0xffffc7ff},
-- {0x00008344, 0xaa4a105b},
--};
--
--static const u32 ar9480_common_rx_gain_table_2p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x00010000},
-- {0x0000a004, 0x00030002},
-- {0x0000a008, 0x00050004},
-- {0x0000a00c, 0x00810080},
-- {0x0000a010, 0x00830082},
-- {0x0000a014, 0x01810180},
-- {0x0000a018, 0x01830182},
-- {0x0000a01c, 0x01850184},
-- {0x0000a020, 0x01890188},
-- {0x0000a024, 0x018b018a},
-- {0x0000a028, 0x018d018c},
-- {0x0000a02c, 0x01910190},
-- {0x0000a030, 0x01930192},
-- {0x0000a034, 0x01950194},
-- {0x0000a038, 0x038a0196},
-- {0x0000a03c, 0x038c038b},
-- {0x0000a040, 0x0390038d},
-- {0x0000a044, 0x03920391},
-- {0x0000a048, 0x03940393},
-- {0x0000a04c, 0x03960395},
-- {0x0000a050, 0x00000000},
-- {0x0000a054, 0x00000000},
-- {0x0000a058, 0x00000000},
-- {0x0000a05c, 0x00000000},
-- {0x0000a060, 0x00000000},
-- {0x0000a064, 0x00000000},
-- {0x0000a068, 0x00000000},
-- {0x0000a06c, 0x00000000},
-- {0x0000a070, 0x00000000},
-- {0x0000a074, 0x00000000},
-- {0x0000a078, 0x00000000},
-- {0x0000a07c, 0x00000000},
-- {0x0000a080, 0x22222229},
-- {0x0000a084, 0x1d1d1d1d},
-- {0x0000a088, 0x1d1d1d1d},
-- {0x0000a08c, 0x1d1d1d1d},
-- {0x0000a090, 0x171d1d1d},
-- {0x0000a094, 0x11111717},
-- {0x0000a098, 0x00030311},
-- {0x0000a09c, 0x00000000},
-- {0x0000a0a0, 0x00000000},
-- {0x0000a0a4, 0x00000000},
-- {0x0000a0a8, 0x00000000},
-- {0x0000a0ac, 0x00000000},
-- {0x0000a0b0, 0x00000000},
-- {0x0000a0b4, 0x00000000},
-- {0x0000a0b8, 0x00000000},
-- {0x0000a0bc, 0x00000000},
-- {0x0000a0c0, 0x001f0000},
-- {0x0000a0c4, 0x01000101},
-- {0x0000a0c8, 0x011e011f},
-- {0x0000a0cc, 0x011c011d},
-- {0x0000a0d0, 0x02030204},
-- {0x0000a0d4, 0x02010202},
-- {0x0000a0d8, 0x021f0200},
-- {0x0000a0dc, 0x0302021e},
-- {0x0000a0e0, 0x03000301},
-- {0x0000a0e4, 0x031e031f},
-- {0x0000a0e8, 0x0402031d},
-- {0x0000a0ec, 0x04000401},
-- {0x0000a0f0, 0x041e041f},
-- {0x0000a0f4, 0x0502041d},
-- {0x0000a0f8, 0x05000501},
-- {0x0000a0fc, 0x051e051f},
-- {0x0000a100, 0x06010602},
-- {0x0000a104, 0x061f0600},
-- {0x0000a108, 0x061d061e},
-- {0x0000a10c, 0x07020703},
-- {0x0000a110, 0x07000701},
-- {0x0000a114, 0x00000000},
-- {0x0000a118, 0x00000000},
-- {0x0000a11c, 0x00000000},
-- {0x0000a120, 0x00000000},
-- {0x0000a124, 0x00000000},
-- {0x0000a128, 0x00000000},
-- {0x0000a12c, 0x00000000},
-- {0x0000a130, 0x00000000},
-- {0x0000a134, 0x00000000},
-- {0x0000a138, 0x00000000},
-- {0x0000a13c, 0x00000000},
-- {0x0000a140, 0x001f0000},
-- {0x0000a144, 0x01000101},
-- {0x0000a148, 0x011e011f},
-- {0x0000a14c, 0x011c011d},
-- {0x0000a150, 0x02030204},
-- {0x0000a154, 0x02010202},
-- {0x0000a158, 0x021f0200},
-- {0x0000a15c, 0x0302021e},
-- {0x0000a160, 0x03000301},
-- {0x0000a164, 0x031e031f},
-- {0x0000a168, 0x0402031d},
-- {0x0000a16c, 0x04000401},
-- {0x0000a170, 0x041e041f},
-- {0x0000a174, 0x0502041d},
-- {0x0000a178, 0x05000501},
-- {0x0000a17c, 0x051e051f},
-- {0x0000a180, 0x06010602},
-- {0x0000a184, 0x061f0600},
-- {0x0000a188, 0x061d061e},
-- {0x0000a18c, 0x07020703},
-- {0x0000a190, 0x07000701},
-- {0x0000a194, 0x00000000},
-- {0x0000a198, 0x00000000},
-- {0x0000a19c, 0x00000000},
-- {0x0000a1a0, 0x00000000},
-- {0x0000a1a4, 0x00000000},
-- {0x0000a1a8, 0x00000000},
-- {0x0000a1ac, 0x00000000},
-- {0x0000a1b0, 0x00000000},
-- {0x0000a1b4, 0x00000000},
-- {0x0000a1b8, 0x00000000},
-- {0x0000a1bc, 0x00000000},
-- {0x0000a1c0, 0x00000000},
-- {0x0000a1c4, 0x00000000},
-- {0x0000a1c8, 0x00000000},
-- {0x0000a1cc, 0x00000000},
-- {0x0000a1d0, 0x00000000},
-- {0x0000a1d4, 0x00000000},
-- {0x0000a1d8, 0x00000000},
-- {0x0000a1dc, 0x00000000},
-- {0x0000a1e0, 0x00000000},
-- {0x0000a1e4, 0x00000000},
-- {0x0000a1e8, 0x00000000},
-- {0x0000a1ec, 0x00000000},
-- {0x0000a1f0, 0x00000396},
-- {0x0000a1f4, 0x00000396},
-- {0x0000a1f8, 0x00000396},
-- {0x0000a1fc, 0x00000196},
-- {0x0000b000, 0x00010000},
-- {0x0000b004, 0x00030002},
-- {0x0000b008, 0x00050004},
-- {0x0000b00c, 0x00810080},
-- {0x0000b010, 0x00830082},
-- {0x0000b014, 0x01810180},
-- {0x0000b018, 0x01830182},
-- {0x0000b01c, 0x01850184},
-- {0x0000b020, 0x02810280},
-- {0x0000b024, 0x02830282},
-- {0x0000b028, 0x02850284},
-- {0x0000b02c, 0x02890288},
-- {0x0000b030, 0x028b028a},
-- {0x0000b034, 0x0388028c},
-- {0x0000b038, 0x038a0389},
-- {0x0000b03c, 0x038c038b},
-- {0x0000b040, 0x0390038d},
-- {0x0000b044, 0x03920391},
-- {0x0000b048, 0x03940393},
-- {0x0000b04c, 0x03960395},
-- {0x0000b050, 0x00000000},
-- {0x0000b054, 0x00000000},
-- {0x0000b058, 0x00000000},
-- {0x0000b05c, 0x00000000},
-- {0x0000b060, 0x00000000},
-- {0x0000b064, 0x00000000},
-- {0x0000b068, 0x00000000},
-- {0x0000b06c, 0x00000000},
-- {0x0000b070, 0x00000000},
-- {0x0000b074, 0x00000000},
-- {0x0000b078, 0x00000000},
-- {0x0000b07c, 0x00000000},
-- {0x0000b080, 0x2a2d2f32},
-- {0x0000b084, 0x21232328},
-- {0x0000b088, 0x19191c1e},
-- {0x0000b08c, 0x12141417},
-- {0x0000b090, 0x07070e0e},
-- {0x0000b094, 0x03030305},
-- {0x0000b098, 0x00000003},
-- {0x0000b09c, 0x00000000},
-- {0x0000b0a0, 0x00000000},
-- {0x0000b0a4, 0x00000000},
-- {0x0000b0a8, 0x00000000},
-- {0x0000b0ac, 0x00000000},
-- {0x0000b0b0, 0x00000000},
-- {0x0000b0b4, 0x00000000},
-- {0x0000b0b8, 0x00000000},
-- {0x0000b0bc, 0x00000000},
-- {0x0000b0c0, 0x003f0020},
-- {0x0000b0c4, 0x00400041},
-- {0x0000b0c8, 0x0140005f},
-- {0x0000b0cc, 0x0160015f},
-- {0x0000b0d0, 0x017e017f},
-- {0x0000b0d4, 0x02410242},
-- {0x0000b0d8, 0x025f0240},
-- {0x0000b0dc, 0x027f0260},
-- {0x0000b0e0, 0x0341027e},
-- {0x0000b0e4, 0x035f0340},
-- {0x0000b0e8, 0x037f0360},
-- {0x0000b0ec, 0x04400441},
-- {0x0000b0f0, 0x0460045f},
-- {0x0000b0f4, 0x0541047f},
-- {0x0000b0f8, 0x055f0540},
-- {0x0000b0fc, 0x057f0560},
-- {0x0000b100, 0x06400641},
-- {0x0000b104, 0x0660065f},
-- {0x0000b108, 0x067e067f},
-- {0x0000b10c, 0x07410742},
-- {0x0000b110, 0x075f0740},
-- {0x0000b114, 0x077f0760},
-- {0x0000b118, 0x07800781},
-- {0x0000b11c, 0x07a0079f},
-- {0x0000b120, 0x07c107bf},
-- {0x0000b124, 0x000007c0},
-- {0x0000b128, 0x00000000},
-- {0x0000b12c, 0x00000000},
-- {0x0000b130, 0x00000000},
-- {0x0000b134, 0x00000000},
-- {0x0000b138, 0x00000000},
-- {0x0000b13c, 0x00000000},
-- {0x0000b140, 0x003f0020},
-- {0x0000b144, 0x00400041},
-- {0x0000b148, 0x0140005f},
-- {0x0000b14c, 0x0160015f},
-- {0x0000b150, 0x017e017f},
-- {0x0000b154, 0x02410242},
-- {0x0000b158, 0x025f0240},
-- {0x0000b15c, 0x027f0260},
-- {0x0000b160, 0x0341027e},
-- {0x0000b164, 0x035f0340},
-- {0x0000b168, 0x037f0360},
-- {0x0000b16c, 0x04400441},
-- {0x0000b170, 0x0460045f},
-- {0x0000b174, 0x0541047f},
-- {0x0000b178, 0x055f0540},
-- {0x0000b17c, 0x057f0560},
-- {0x0000b180, 0x06400641},
-- {0x0000b184, 0x0660065f},
-- {0x0000b188, 0x067e067f},
-- {0x0000b18c, 0x07410742},
-- {0x0000b190, 0x075f0740},
-- {0x0000b194, 0x077f0760},
-- {0x0000b198, 0x07800781},
-- {0x0000b19c, 0x07a0079f},
-- {0x0000b1a0, 0x07c107bf},
-- {0x0000b1a4, 0x000007c0},
-- {0x0000b1a8, 0x00000000},
-- {0x0000b1ac, 0x00000000},
-- {0x0000b1b0, 0x00000000},
-- {0x0000b1b4, 0x00000000},
-- {0x0000b1b8, 0x00000000},
-- {0x0000b1bc, 0x00000000},
-- {0x0000b1c0, 0x00000000},
-- {0x0000b1c4, 0x00000000},
-- {0x0000b1c8, 0x00000000},
-- {0x0000b1cc, 0x00000000},
-- {0x0000b1d0, 0x00000000},
-- {0x0000b1d4, 0x00000000},
-- {0x0000b1d8, 0x00000000},
-- {0x0000b1dc, 0x00000000},
-- {0x0000b1e0, 0x00000000},
-- {0x0000b1e4, 0x00000000},
-- {0x0000b1e8, 0x00000000},
-- {0x0000b1ec, 0x00000000},
-- {0x0000b1f0, 0x00000396},
-- {0x0000b1f4, 0x00000396},
-- {0x0000b1f8, 0x00000396},
-- {0x0000b1fc, 0x00000196},
--};
--
--static const u32 ar9480_pciephy_clkreq_disable_L1_2p0[][2] = {
-- /* Addr allmodes */
-- {0x00018c00, 0x18213ede},
-- {0x00018c04, 0x000801d8},
-- {0x00018c08, 0x0003580c},
--};
--
--static const u32 ar9480_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
-- /* Addr allmodes */
-- {0x00018c00, 0x18212ede},
-- {0x00018c04, 0x000801d8},
-- {0x00018c08, 0x0003580c},
--};
--
--static const u32 ar9480_2p0_sys3ant[][2] = {
-- /* Addr allmodes */
-- {0x00063280, 0x00040807},
-- {0x00063284, 0x104ccccc},
--};
--
--static const u32 ar9480_common_rx_gain_table_ar9280_2p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x02000101},
-- {0x0000a004, 0x02000102},
-- {0x0000a008, 0x02000103},
-- {0x0000a00c, 0x02000104},
-- {0x0000a010, 0x02000200},
-- {0x0000a014, 0x02000201},
-- {0x0000a018, 0x02000202},
-- {0x0000a01c, 0x02000203},
-- {0x0000a020, 0x02000204},
-- {0x0000a024, 0x02000205},
-- {0x0000a028, 0x02000208},
-- {0x0000a02c, 0x02000302},
-- {0x0000a030, 0x02000303},
-- {0x0000a034, 0x02000304},
-- {0x0000a038, 0x02000400},
-- {0x0000a03c, 0x02010300},
-- {0x0000a040, 0x02010301},
-- {0x0000a044, 0x02010302},
-- {0x0000a048, 0x02000500},
-- {0x0000a04c, 0x02010400},
-- {0x0000a050, 0x02020300},
-- {0x0000a054, 0x02020301},
-- {0x0000a058, 0x02020302},
-- {0x0000a05c, 0x02020303},
-- {0x0000a060, 0x02020400},
-- {0x0000a064, 0x02030300},
-- {0x0000a068, 0x02030301},
-- {0x0000a06c, 0x02030302},
-- {0x0000a070, 0x02030303},
-- {0x0000a074, 0x02030400},
-- {0x0000a078, 0x02040300},
-- {0x0000a07c, 0x02040301},
-- {0x0000a080, 0x02040302},
-- {0x0000a084, 0x02040303},
-- {0x0000a088, 0x02030500},
-- {0x0000a08c, 0x02040400},
-- {0x0000a090, 0x02050203},
-- {0x0000a094, 0x02050204},
-- {0x0000a098, 0x02050205},
-- {0x0000a09c, 0x02040500},
-- {0x0000a0a0, 0x02050301},
-- {0x0000a0a4, 0x02050302},
-- {0x0000a0a8, 0x02050303},
-- {0x0000a0ac, 0x02050400},
-- {0x0000a0b0, 0x02050401},
-- {0x0000a0b4, 0x02050402},
-- {0x0000a0b8, 0x02050403},
-- {0x0000a0bc, 0x02050500},
-- {0x0000a0c0, 0x02050501},
-- {0x0000a0c4, 0x02050502},
-- {0x0000a0c8, 0x02050503},
-- {0x0000a0cc, 0x02050504},
-- {0x0000a0d0, 0x02050600},
-- {0x0000a0d4, 0x02050601},
-- {0x0000a0d8, 0x02050602},
-- {0x0000a0dc, 0x02050603},
-- {0x0000a0e0, 0x02050604},
-- {0x0000a0e4, 0x02050700},
-- {0x0000a0e8, 0x02050701},
-- {0x0000a0ec, 0x02050702},
-- {0x0000a0f0, 0x02050703},
-- {0x0000a0f4, 0x02050704},
-- {0x0000a0f8, 0x02050705},
-- {0x0000a0fc, 0x02050708},
-- {0x0000a100, 0x02050709},
-- {0x0000a104, 0x0205070a},
-- {0x0000a108, 0x0205070b},
-- {0x0000a10c, 0x0205070c},
-- {0x0000a110, 0x0205070d},
-- {0x0000a114, 0x02050710},
-- {0x0000a118, 0x02050711},
-- {0x0000a11c, 0x02050712},
-- {0x0000a120, 0x02050713},
-- {0x0000a124, 0x02050714},
-- {0x0000a128, 0x02050715},
-- {0x0000a12c, 0x02050730},
-- {0x0000a130, 0x02050731},
-- {0x0000a134, 0x02050732},
-- {0x0000a138, 0x02050733},
-- {0x0000a13c, 0x02050734},
-- {0x0000a140, 0x02050735},
-- {0x0000a144, 0x02050750},
-- {0x0000a148, 0x02050751},
-- {0x0000a14c, 0x02050752},
-- {0x0000a150, 0x02050753},
-- {0x0000a154, 0x02050754},
-- {0x0000a158, 0x02050755},
-- {0x0000a15c, 0x02050770},
-- {0x0000a160, 0x02050771},
-- {0x0000a164, 0x02050772},
-- {0x0000a168, 0x02050773},
-- {0x0000a16c, 0x02050774},
-- {0x0000a170, 0x02050775},
-- {0x0000a174, 0x00000776},
-- {0x0000a178, 0x00000776},
-- {0x0000a17c, 0x00000776},
-- {0x0000a180, 0x00000776},
-- {0x0000a184, 0x00000776},
-- {0x0000a188, 0x00000776},
-- {0x0000a18c, 0x00000776},
-- {0x0000a190, 0x00000776},
-- {0x0000a194, 0x00000776},
-- {0x0000a198, 0x00000776},
-- {0x0000a19c, 0x00000776},
-- {0x0000a1a0, 0x00000776},
-- {0x0000a1a4, 0x00000776},
-- {0x0000a1a8, 0x00000776},
-- {0x0000a1ac, 0x00000776},
-- {0x0000a1b0, 0x00000776},
-- {0x0000a1b4, 0x00000776},
-- {0x0000a1b8, 0x00000776},
-- {0x0000a1bc, 0x00000776},
-- {0x0000a1c0, 0x00000776},
-- {0x0000a1c4, 0x00000776},
-- {0x0000a1c8, 0x00000776},
-- {0x0000a1cc, 0x00000776},
-- {0x0000a1d0, 0x00000776},
-- {0x0000a1d4, 0x00000776},
-- {0x0000a1d8, 0x00000776},
-- {0x0000a1dc, 0x00000776},
-- {0x0000a1e0, 0x00000776},
-- {0x0000a1e4, 0x00000776},
-- {0x0000a1e8, 0x00000776},
-- {0x0000a1ec, 0x00000776},
-- {0x0000a1f0, 0x00000776},
-- {0x0000a1f4, 0x00000776},
-- {0x0000a1f8, 0x00000776},
-- {0x0000a1fc, 0x00000776},
-- {0x0000b000, 0x02000101},
-- {0x0000b004, 0x02000102},
-- {0x0000b008, 0x02000103},
-- {0x0000b00c, 0x02000104},
-- {0x0000b010, 0x02000200},
-- {0x0000b014, 0x02000201},
-- {0x0000b018, 0x02000202},
-- {0x0000b01c, 0x02000203},
-- {0x0000b020, 0x02000204},
-- {0x0000b024, 0x02000205},
-- {0x0000b028, 0x02000208},
-- {0x0000b02c, 0x02000302},
-- {0x0000b030, 0x02000303},
-- {0x0000b034, 0x02000304},
-- {0x0000b038, 0x02000400},
-- {0x0000b03c, 0x02010300},
-- {0x0000b040, 0x02010301},
-- {0x0000b044, 0x02010302},
-- {0x0000b048, 0x02000500},
-- {0x0000b04c, 0x02010400},
-- {0x0000b050, 0x02020300},
-- {0x0000b054, 0x02020301},
-- {0x0000b058, 0x02020302},
-- {0x0000b05c, 0x02020303},
-- {0x0000b060, 0x02020400},
-- {0x0000b064, 0x02030300},
-- {0x0000b068, 0x02030301},
-- {0x0000b06c, 0x02030302},
-- {0x0000b070, 0x02030303},
-- {0x0000b074, 0x02030400},
-- {0x0000b078, 0x02040300},
-- {0x0000b07c, 0x02040301},
-- {0x0000b080, 0x02040302},
-- {0x0000b084, 0x02040303},
-- {0x0000b088, 0x02030500},
-- {0x0000b08c, 0x02040400},
-- {0x0000b090, 0x02050203},
-- {0x0000b094, 0x02050204},
-- {0x0000b098, 0x02050205},
-- {0x0000b09c, 0x02040500},
-- {0x0000b0a0, 0x02050301},
-- {0x0000b0a4, 0x02050302},
-- {0x0000b0a8, 0x02050303},
-- {0x0000b0ac, 0x02050400},
-- {0x0000b0b0, 0x02050401},
-- {0x0000b0b4, 0x02050402},
-- {0x0000b0b8, 0x02050403},
-- {0x0000b0bc, 0x02050500},
-- {0x0000b0c0, 0x02050501},
-- {0x0000b0c4, 0x02050502},
-- {0x0000b0c8, 0x02050503},
-- {0x0000b0cc, 0x02050504},
-- {0x0000b0d0, 0x02050600},
-- {0x0000b0d4, 0x02050601},
-- {0x0000b0d8, 0x02050602},
-- {0x0000b0dc, 0x02050603},
-- {0x0000b0e0, 0x02050604},
-- {0x0000b0e4, 0x02050700},
-- {0x0000b0e8, 0x02050701},
-- {0x0000b0ec, 0x02050702},
-- {0x0000b0f0, 0x02050703},
-- {0x0000b0f4, 0x02050704},
-- {0x0000b0f8, 0x02050705},
-- {0x0000b0fc, 0x02050708},
-- {0x0000b100, 0x02050709},
-- {0x0000b104, 0x0205070a},
-- {0x0000b108, 0x0205070b},
-- {0x0000b10c, 0x0205070c},
-- {0x0000b110, 0x0205070d},
-- {0x0000b114, 0x02050710},
-- {0x0000b118, 0x02050711},
-- {0x0000b11c, 0x02050712},
-- {0x0000b120, 0x02050713},
-- {0x0000b124, 0x02050714},
-- {0x0000b128, 0x02050715},
-- {0x0000b12c, 0x02050730},
-- {0x0000b130, 0x02050731},
-- {0x0000b134, 0x02050732},
-- {0x0000b138, 0x02050733},
-- {0x0000b13c, 0x02050734},
-- {0x0000b140, 0x02050735},
-- {0x0000b144, 0x02050750},
-- {0x0000b148, 0x02050751},
-- {0x0000b14c, 0x02050752},
-- {0x0000b150, 0x02050753},
-- {0x0000b154, 0x02050754},
-- {0x0000b158, 0x02050755},
-- {0x0000b15c, 0x02050770},
-- {0x0000b160, 0x02050771},
-- {0x0000b164, 0x02050772},
-- {0x0000b168, 0x02050773},
-- {0x0000b16c, 0x02050774},
-- {0x0000b170, 0x02050775},
-- {0x0000b174, 0x00000776},
-- {0x0000b178, 0x00000776},
-- {0x0000b17c, 0x00000776},
-- {0x0000b180, 0x00000776},
-- {0x0000b184, 0x00000776},
-- {0x0000b188, 0x00000776},
-- {0x0000b18c, 0x00000776},
-- {0x0000b190, 0x00000776},
-- {0x0000b194, 0x00000776},
-- {0x0000b198, 0x00000776},
-- {0x0000b19c, 0x00000776},
-- {0x0000b1a0, 0x00000776},
-- {0x0000b1a4, 0x00000776},
-- {0x0000b1a8, 0x00000776},
-- {0x0000b1ac, 0x00000776},
-- {0x0000b1b0, 0x00000776},
-- {0x0000b1b4, 0x00000776},
-- {0x0000b1b8, 0x00000776},
-- {0x0000b1bc, 0x00000776},
-- {0x0000b1c0, 0x00000776},
-- {0x0000b1c4, 0x00000776},
-- {0x0000b1c8, 0x00000776},
-- {0x0000b1cc, 0x00000776},
-- {0x0000b1d0, 0x00000776},
-- {0x0000b1d4, 0x00000776},
-- {0x0000b1d8, 0x00000776},
-- {0x0000b1dc, 0x00000776},
-- {0x0000b1e0, 0x00000776},
-- {0x0000b1e4, 0x00000776},
-- {0x0000b1e8, 0x00000776},
-- {0x0000b1ec, 0x00000776},
-- {0x0000b1f0, 0x00000776},
-- {0x0000b1f4, 0x00000776},
-- {0x0000b1f8, 0x00000776},
-- {0x0000b1fc, 0x00000776},
--};
--
--static const u32 ar9200_ar9280_2p0_radio_core[][2] = {
-- /* Addr allmodes */
-- {0x00007800, 0x00040000},
-- {0x00007804, 0xdb005012},
-- {0x00007808, 0x04924914},
-- {0x0000780c, 0x21084210},
-- {0x00007810, 0x6d801300},
-- {0x00007814, 0x0019beff},
-- {0x00007818, 0x07e41000},
-- {0x0000781c, 0x00392000},
-- {0x00007820, 0x92592480},
-- {0x00007824, 0x00040000},
-- {0x00007828, 0xdb005012},
-- {0x0000782c, 0x04924914},
-- {0x00007830, 0x21084210},
-- {0x00007834, 0x6d801300},
-- {0x00007838, 0x0019beff},
-- {0x0000783c, 0x07e40000},
-- {0x00007840, 0x00392000},
-- {0x00007844, 0x92592480},
-- {0x00007848, 0x00100000},
-- {0x0000784c, 0x773f0567},
-- {0x00007850, 0x54214514},
-- {0x00007854, 0x12035828},
-- {0x00007858, 0x92592692},
-- {0x0000785c, 0x00000000},
-- {0x00007860, 0x56400000},
-- {0x00007864, 0x0a8e370e},
-- {0x00007868, 0xc0102850},
-- {0x0000786c, 0x812d4000},
-- {0x00007870, 0x807ec400},
-- {0x00007874, 0x001b6db0},
-- {0x00007878, 0x00376b63},
-- {0x0000787c, 0x06db6db6},
-- {0x00007880, 0x006d8000},
-- {0x00007884, 0xffeffffe},
-- {0x00007888, 0xffeffffe},
-- {0x0000788c, 0x00010000},
-- {0x00007890, 0x02060aeb},
-- {0x00007894, 0x5a108000},
--};
--
--static const u32 ar9480_2p0_mac_postamble_emulation[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
-- {0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
--};
--
--static const u32 ar9480_2p0_radio_postamble_sys3ant[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
-- {0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
-- {0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
--};
--
--static const u32 ar9480_2p0_baseband_postamble_emulation[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
-- {0x00009e44, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000},
-- {0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
-- {0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
-- {0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
-- {0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
-- {0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
-- {0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
-- {0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
-- {0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
-- {0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
-- {0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
-- {0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
-- {0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
-- {0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
-- {0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
-- {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
--};
--
--static const u32 ar9480_2p0_radio_postamble_sys2ant[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
-- {0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
-- {0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
--};
--
--static const u32 ar9480_common_wo_xlna_rx_gain_table_2p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x00010000},
-- {0x0000a004, 0x00030002},
-- {0x0000a008, 0x00050004},
-- {0x0000a00c, 0x00810080},
-- {0x0000a010, 0x00830082},
-- {0x0000a014, 0x01810180},
-- {0x0000a018, 0x01830182},
-- {0x0000a01c, 0x01850184},
-- {0x0000a020, 0x01890188},
-- {0x0000a024, 0x018b018a},
-- {0x0000a028, 0x018d018c},
-- {0x0000a02c, 0x03820190},
-- {0x0000a030, 0x03840383},
-- {0x0000a034, 0x03880385},
-- {0x0000a038, 0x038a0389},
-- {0x0000a03c, 0x038c038b},
-- {0x0000a040, 0x0390038d},
-- {0x0000a044, 0x03920391},
-- {0x0000a048, 0x03940393},
-- {0x0000a04c, 0x03960395},
-- {0x0000a050, 0x00000000},
-- {0x0000a054, 0x00000000},
-- {0x0000a058, 0x00000000},
-- {0x0000a05c, 0x00000000},
-- {0x0000a060, 0x00000000},
-- {0x0000a064, 0x00000000},
-- {0x0000a068, 0x00000000},
-- {0x0000a06c, 0x00000000},
-- {0x0000a070, 0x00000000},
-- {0x0000a074, 0x00000000},
-- {0x0000a078, 0x00000000},
-- {0x0000a07c, 0x00000000},
-- {0x0000a080, 0x29292929},
-- {0x0000a084, 0x29292929},
-- {0x0000a088, 0x29292929},
-- {0x0000a08c, 0x29292929},
-- {0x0000a090, 0x22292929},
-- {0x0000a094, 0x1d1d2222},
-- {0x0000a098, 0x0c111117},
-- {0x0000a09c, 0x00030303},
-- {0x0000a0a0, 0x00000000},
-- {0x0000a0a4, 0x00000000},
-- {0x0000a0a8, 0x00000000},
-- {0x0000a0ac, 0x00000000},
-- {0x0000a0b0, 0x00000000},
-- {0x0000a0b4, 0x00000000},
-- {0x0000a0b8, 0x00000000},
-- {0x0000a0bc, 0x00000000},
-- {0x0000a0c0, 0x001f0000},
-- {0x0000a0c4, 0x01000101},
-- {0x0000a0c8, 0x011e011f},
-- {0x0000a0cc, 0x011c011d},
-- {0x0000a0d0, 0x02030204},
-- {0x0000a0d4, 0x02010202},
-- {0x0000a0d8, 0x021f0200},
-- {0x0000a0dc, 0x0302021e},
-- {0x0000a0e0, 0x03000301},
-- {0x0000a0e4, 0x031e031f},
-- {0x0000a0e8, 0x0402031d},
-- {0x0000a0ec, 0x04000401},
-- {0x0000a0f0, 0x041e041f},
-- {0x0000a0f4, 0x0502041d},
-- {0x0000a0f8, 0x05000501},
-- {0x0000a0fc, 0x051e051f},
-- {0x0000a100, 0x06010602},
-- {0x0000a104, 0x061f0600},
-- {0x0000a108, 0x061d061e},
-- {0x0000a10c, 0x07020703},
-- {0x0000a110, 0x07000701},
-- {0x0000a114, 0x00000000},
-- {0x0000a118, 0x00000000},
-- {0x0000a11c, 0x00000000},
-- {0x0000a120, 0x00000000},
-- {0x0000a124, 0x00000000},
-- {0x0000a128, 0x00000000},
-- {0x0000a12c, 0x00000000},
-- {0x0000a130, 0x00000000},
-- {0x0000a134, 0x00000000},
-- {0x0000a138, 0x00000000},
-- {0x0000a13c, 0x00000000},
-- {0x0000a140, 0x001f0000},
-- {0x0000a144, 0x01000101},
-- {0x0000a148, 0x011e011f},
-- {0x0000a14c, 0x011c011d},
-- {0x0000a150, 0x02030204},
-- {0x0000a154, 0x02010202},
-- {0x0000a158, 0x021f0200},
-- {0x0000a15c, 0x0302021e},
-- {0x0000a160, 0x03000301},
-- {0x0000a164, 0x031e031f},
-- {0x0000a168, 0x0402031d},
-- {0x0000a16c, 0x04000401},
-- {0x0000a170, 0x041e041f},
-- {0x0000a174, 0x0502041d},
-- {0x0000a178, 0x05000501},
-- {0x0000a17c, 0x051e051f},
-- {0x0000a180, 0x06010602},
-- {0x0000a184, 0x061f0600},
-- {0x0000a188, 0x061d061e},
-- {0x0000a18c, 0x07020703},
-- {0x0000a190, 0x07000701},
-- {0x0000a194, 0x00000000},
-- {0x0000a198, 0x00000000},
-- {0x0000a19c, 0x00000000},
-- {0x0000a1a0, 0x00000000},
-- {0x0000a1a4, 0x00000000},
-- {0x0000a1a8, 0x00000000},
-- {0x0000a1ac, 0x00000000},
-- {0x0000a1b0, 0x00000000},
-- {0x0000a1b4, 0x00000000},
-- {0x0000a1b8, 0x00000000},
-- {0x0000a1bc, 0x00000000},
-- {0x0000a1c0, 0x00000000},
-- {0x0000a1c4, 0x00000000},
-- {0x0000a1c8, 0x00000000},
-- {0x0000a1cc, 0x00000000},
-- {0x0000a1d0, 0x00000000},
-- {0x0000a1d4, 0x00000000},
-- {0x0000a1d8, 0x00000000},
-- {0x0000a1dc, 0x00000000},
-- {0x0000a1e0, 0x00000000},
-- {0x0000a1e4, 0x00000000},
-- {0x0000a1e8, 0x00000000},
-- {0x0000a1ec, 0x00000000},
-- {0x0000a1f0, 0x00000396},
-- {0x0000a1f4, 0x00000396},
-- {0x0000a1f8, 0x00000396},
-- {0x0000a1fc, 0x00000196},
-- {0x0000b000, 0x00010000},
-- {0x0000b004, 0x00030002},
-- {0x0000b008, 0x00050004},
-- {0x0000b00c, 0x00810080},
-- {0x0000b010, 0x00830082},
-- {0x0000b014, 0x01810180},
-- {0x0000b018, 0x01830182},
-- {0x0000b01c, 0x01850184},
-- {0x0000b020, 0x02810280},
-- {0x0000b024, 0x02830282},
-- {0x0000b028, 0x02850284},
-- {0x0000b02c, 0x02890288},
-- {0x0000b030, 0x028b028a},
-- {0x0000b034, 0x0388028c},
-- {0x0000b038, 0x038a0389},
-- {0x0000b03c, 0x038c038b},
-- {0x0000b040, 0x0390038d},
-- {0x0000b044, 0x03920391},
-- {0x0000b048, 0x03940393},
-- {0x0000b04c, 0x03960395},
-- {0x0000b050, 0x00000000},
-- {0x0000b054, 0x00000000},
-- {0x0000b058, 0x00000000},
-- {0x0000b05c, 0x00000000},
-- {0x0000b060, 0x00000000},
-- {0x0000b064, 0x00000000},
-- {0x0000b068, 0x00000000},
-- {0x0000b06c, 0x00000000},
-- {0x0000b070, 0x00000000},
-- {0x0000b074, 0x00000000},
-- {0x0000b078, 0x00000000},
-- {0x0000b07c, 0x00000000},
-- {0x0000b080, 0x32323232},
-- {0x0000b084, 0x2f2f3232},
-- {0x0000b088, 0x23282a2d},
-- {0x0000b08c, 0x1c1e2123},
-- {0x0000b090, 0x14171919},
-- {0x0000b094, 0x0e0e1214},
-- {0x0000b098, 0x03050707},
-- {0x0000b09c, 0x00030303},
-- {0x0000b0a0, 0x00000000},
-- {0x0000b0a4, 0x00000000},
-- {0x0000b0a8, 0x00000000},
-- {0x0000b0ac, 0x00000000},
-- {0x0000b0b0, 0x00000000},
-- {0x0000b0b4, 0x00000000},
-- {0x0000b0b8, 0x00000000},
-- {0x0000b0bc, 0x00000000},
-- {0x0000b0c0, 0x003f0020},
-- {0x0000b0c4, 0x00400041},
-- {0x0000b0c8, 0x0140005f},
-- {0x0000b0cc, 0x0160015f},
-- {0x0000b0d0, 0x017e017f},
-- {0x0000b0d4, 0x02410242},
-- {0x0000b0d8, 0x025f0240},
-- {0x0000b0dc, 0x027f0260},
-- {0x0000b0e0, 0x0341027e},
-- {0x0000b0e4, 0x035f0340},
-- {0x0000b0e8, 0x037f0360},
-- {0x0000b0ec, 0x04400441},
-- {0x0000b0f0, 0x0460045f},
-- {0x0000b0f4, 0x0541047f},
-- {0x0000b0f8, 0x055f0540},
-- {0x0000b0fc, 0x057f0560},
-- {0x0000b100, 0x06400641},
-- {0x0000b104, 0x0660065f},
-- {0x0000b108, 0x067e067f},
-- {0x0000b10c, 0x07410742},
-- {0x0000b110, 0x075f0740},
-- {0x0000b114, 0x077f0760},
-- {0x0000b118, 0x07800781},
-- {0x0000b11c, 0x07a0079f},
-- {0x0000b120, 0x07c107bf},
-- {0x0000b124, 0x000007c0},
-- {0x0000b128, 0x00000000},
-- {0x0000b12c, 0x00000000},
-- {0x0000b130, 0x00000000},
-- {0x0000b134, 0x00000000},
-- {0x0000b138, 0x00000000},
-- {0x0000b13c, 0x00000000},
-- {0x0000b140, 0x003f0020},
-- {0x0000b144, 0x00400041},
-- {0x0000b148, 0x0140005f},
-- {0x0000b14c, 0x0160015f},
-- {0x0000b150, 0x017e017f},
-- {0x0000b154, 0x02410242},
-- {0x0000b158, 0x025f0240},
-- {0x0000b15c, 0x027f0260},
-- {0x0000b160, 0x0341027e},
-- {0x0000b164, 0x035f0340},
-- {0x0000b168, 0x037f0360},
-- {0x0000b16c, 0x04400441},
-- {0x0000b170, 0x0460045f},
-- {0x0000b174, 0x0541047f},
-- {0x0000b178, 0x055f0540},
-- {0x0000b17c, 0x057f0560},
-- {0x0000b180, 0x06400641},
-- {0x0000b184, 0x0660065f},
-- {0x0000b188, 0x067e067f},
-- {0x0000b18c, 0x07410742},
-- {0x0000b190, 0x075f0740},
-- {0x0000b194, 0x077f0760},
-- {0x0000b198, 0x07800781},
-- {0x0000b19c, 0x07a0079f},
-- {0x0000b1a0, 0x07c107bf},
-- {0x0000b1a4, 0x000007c0},
-- {0x0000b1a8, 0x00000000},
-- {0x0000b1ac, 0x00000000},
-- {0x0000b1b0, 0x00000000},
-- {0x0000b1b4, 0x00000000},
-- {0x0000b1b8, 0x00000000},
-- {0x0000b1bc, 0x00000000},
-- {0x0000b1c0, 0x00000000},
-- {0x0000b1c4, 0x00000000},
-- {0x0000b1c8, 0x00000000},
-- {0x0000b1cc, 0x00000000},
-- {0x0000b1d0, 0x00000000},
-- {0x0000b1d4, 0x00000000},
-- {0x0000b1d8, 0x00000000},
-- {0x0000b1dc, 0x00000000},
-- {0x0000b1e0, 0x00000000},
-- {0x0000b1e4, 0x00000000},
-- {0x0000b1e8, 0x00000000},
-- {0x0000b1ec, 0x00000000},
-- {0x0000b1f0, 0x00000396},
-- {0x0000b1f4, 0x00000396},
-- {0x0000b1f8, 0x00000396},
-- {0x0000b1fc, 0x00000196},
--};
--
--static const u32 ar9480_2p0_baseband_core_txfir_coeff_japan_2484[][2] = {
-- /* Addr allmodes */
-- {0x0000a398, 0x00000000},
-- {0x0000a39c, 0x6f7f0301},
-- {0x0000a3a0, 0xca9228ee},
--};
--
--static const u32 ar9480_modes_low_ob_db_tx_gain_table_2p0[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
-- {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-- {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-- {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
-- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
-- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
-- {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
-- {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
-- {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
-- {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
-- {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
-- {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
-- {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
-- {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
-- {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
-- {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
-- {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
-- {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
-- {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
-- {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
-- {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
-- {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
-- {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
-- {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
-- {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
-- {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
-- {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
-- {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
-- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
-- {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
-- {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
-- {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
-- {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
-- {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
-- {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
-- {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
-- {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
-- {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
-- {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-- {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
-- {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
-- {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
-- {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
-- {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
--};
--
--static const u32 ar9480_2p0_soc_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
--};
--
--static const u32 ar9480_2p0_baseband_core[][2] = {
-- /* Addr allmodes */
-- {0x00009800, 0xafe68e30},
-- {0x00009804, 0xfd14e000},
-- {0x00009808, 0x9c0a9f6b},
-- {0x0000980c, 0x04900000},
-- {0x00009814, 0x9280c00a},
-- {0x00009818, 0x00000000},
-- {0x0000981c, 0x00020028},
-- {0x00009834, 0x6400a290},
-- {0x00009838, 0x0108ecff},
-- {0x0000983c, 0x0d000600},
-- {0x00009880, 0x201fff00},
-- {0x00009884, 0x00001042},
-- {0x000098a4, 0x00200400},
-- {0x000098b0, 0x32440bbe},
-- {0x000098d0, 0x004b6a8e},
-- {0x000098d4, 0x00000820},
-- {0x000098dc, 0x00000000},
-- {0x000098e4, 0x01ffffff},
-- {0x000098e8, 0x01ffffff},
-- {0x000098ec, 0x01ffffff},
-- {0x000098f0, 0x00000000},
-- {0x000098f4, 0x00000000},
-- {0x00009bf0, 0x80000000},
-- {0x00009c04, 0xff55ff55},
-- {0x00009c08, 0x0320ff55},
-- {0x00009c0c, 0x00000000},
-- {0x00009c10, 0x00000000},
-- {0x00009c14, 0x00046384},
-- {0x00009c18, 0x05b6b440},
-- {0x00009c1c, 0x00b6b440},
-- {0x00009d00, 0xc080a333},
-- {0x00009d04, 0x40206c10},
-- {0x00009d08, 0x009c4060},
-- {0x00009d0c, 0x9883800a},
-- {0x00009d10, 0x01834061},
-- {0x00009d14, 0x00c0040b},
-- {0x00009d18, 0x00000000},
-- {0x00009e08, 0x0038230c},
-- {0x00009e24, 0x990bb515},
-- {0x00009e28, 0x0c6f0000},
-- {0x00009e30, 0x06336f77},
-- {0x00009e34, 0x6af6532f},
-- {0x00009e38, 0x0cc80c00},
-- {0x00009e40, 0x0d261820},
-- {0x00009e4c, 0x00001004},
-- {0x00009e50, 0x00ff03f1},
-- {0x00009e54, 0xe4c355c7},
-- {0x00009e58, 0xfd897735},
-- {0x00009e5c, 0xe9198724},
-- {0x00009fc0, 0x803e4788},
-- {0x00009fc4, 0x0001efb5},
-- {0x00009fcc, 0x40000014},
-- {0x00009fd0, 0x01193b93},
-- {0x0000a20c, 0x00000000},
-- {0x0000a220, 0x00000000},
-- {0x0000a224, 0x00000000},
-- {0x0000a228, 0x10002310},
-- {0x0000a23c, 0x00000000},
-- {0x0000a244, 0x0c000000},
-- {0x0000a2a0, 0x00000001},
-- {0x0000a2c0, 0x00000001},
-- {0x0000a2c8, 0x00000000},
-- {0x0000a2cc, 0x18c43433},
-- {0x0000a2d4, 0x00000000},
-- {0x0000a2ec, 0x00000000},
-- {0x0000a2f0, 0x00000000},
-- {0x0000a2f4, 0x00000000},
-- {0x0000a2f8, 0x00000000},
-- {0x0000a344, 0x00000000},
-- {0x0000a34c, 0x00000000},
-- {0x0000a350, 0x0000a000},
-- {0x0000a364, 0x00000000},
-- {0x0000a370, 0x00000000},
-- {0x0000a390, 0x00000001},
-- {0x0000a394, 0x00000444},
-- {0x0000a398, 0x001f0e0f},
-- {0x0000a39c, 0x0075393f},
-- {0x0000a3a0, 0xb79f6427},
-- {0x0000a3a4, 0x00000000},
-- {0x0000a3a8, 0xaaaaaaaa},
-- {0x0000a3ac, 0x3c466478},
-- {0x0000a3c0, 0x20202020},
-- {0x0000a3c4, 0x22222220},
-- {0x0000a3c8, 0x20200020},
-- {0x0000a3cc, 0x20202020},
-- {0x0000a3d0, 0x20202020},
-- {0x0000a3d4, 0x20202020},
-- {0x0000a3d8, 0x20202020},
-- {0x0000a3dc, 0x20202020},
-- {0x0000a3e0, 0x20202020},
-- {0x0000a3e4, 0x20202020},
-- {0x0000a3e8, 0x20202020},
-- {0x0000a3ec, 0x20202020},
-- {0x0000a3f0, 0x00000000},
-- {0x0000a3f4, 0x00000006},
-- {0x0000a3f8, 0x0c9bd380},
-- {0x0000a3fc, 0x000f0f01},
-- {0x0000a400, 0x8fa91f01},
-- {0x0000a404, 0x00000000},
-- {0x0000a408, 0x0e79e5c6},
-- {0x0000a40c, 0x00820820},
-- {0x0000a414, 0x1ce739ce},
-- {0x0000a418, 0x2d001dce},
-- {0x0000a41c, 0x1ce739ce},
-- {0x0000a420, 0x000001ce},
-- {0x0000a424, 0x1ce739ce},
-- {0x0000a428, 0x000001ce},
-- {0x0000a42c, 0x1ce739ce},
-- {0x0000a430, 0x1ce739ce},
-- {0x0000a434, 0x00000000},
-- {0x0000a438, 0x00001801},
-- {0x0000a43c, 0x00100000},
-- {0x0000a444, 0x00000000},
-- {0x0000a448, 0x05000080},
-- {0x0000a44c, 0x00000001},
-- {0x0000a450, 0x00010000},
-- {0x0000a454, 0x07000000},
-- {0x0000a644, 0xbfad9d74},
-- {0x0000a648, 0x0048060a},
-- {0x0000a64c, 0x00002037},
-- {0x0000a670, 0x03020100},
-- {0x0000a674, 0x09080504},
-- {0x0000a678, 0x0d0c0b0a},
-- {0x0000a67c, 0x13121110},
-- {0x0000a680, 0x31301514},
-- {0x0000a684, 0x35343332},
-- {0x0000a688, 0x00000036},
-- {0x0000a690, 0x00000838},
-- {0x0000a6b0, 0x0000000a},
-- {0x0000a6b4, 0x00512c01},
-- {0x0000a7c0, 0x00000000},
-- {0x0000a7c4, 0xfffffffc},
-- {0x0000a7c8, 0x00000000},
-- {0x0000a7cc, 0x00000000},
-- {0x0000a7d0, 0x00000000},
-- {0x0000a7d4, 0x00000004},
-- {0x0000a7dc, 0x00000001},
-- {0x0000a7f0, 0x80000000},
-- {0x0000a8d0, 0x004b6a8e},
-- {0x0000a8d4, 0x00000820},
-- {0x0000a8dc, 0x00000000},
-- {0x0000a8f0, 0x00000000},
-- {0x0000a8f4, 0x00000000},
-- {0x0000abf0, 0x80000000},
-- {0x0000b2d0, 0x00000080},
-- {0x0000b2d4, 0x00000000},
-- {0x0000b2ec, 0x00000000},
-- {0x0000b2f0, 0x00000000},
-- {0x0000b2f4, 0x00000000},
-- {0x0000b2f8, 0x00000000},
-- {0x0000b408, 0x0e79e5c0},
-- {0x0000b40c, 0x00820820},
-- {0x0000b420, 0x00000000},
-- {0x0000b6b0, 0x0000000a},
-- {0x0000b6b4, 0x00000001},
--};
+ struct ath_rx_edma {
+@@ -341,6 +343,7 @@ int ath_tx_init(struct ath_softc *sc, in
+ void ath_tx_cleanup(struct ath_softc *sc);
+ int ath_txq_update(struct ath_softc *sc, int qnum,
+ struct ath9k_tx_queue_info *q);
++void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
+ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
+ struct ath_tx_control *txctl);
+ void ath_tx_tasklet(struct ath_softc *sc);
+@@ -360,7 +363,7 @@ void ath_tx_aggr_sleep(struct ieee80211_
+
+ struct ath_vif {
+ int av_bslot;
+- bool is_bslot_active, primary_sta_vif;
++ bool primary_sta_vif;
+ __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
+ struct ath_buf *av_bcbuf;
+ };
+@@ -386,6 +389,7 @@ struct ath_beacon_config {
+ u16 dtim_period;
+ u16 bmiss_timeout;
+ u8 dtim_count;
++ bool enable_beacon;
+ };
+
+ struct ath_beacon {
+@@ -397,7 +401,6 @@ struct ath_beacon {
+
+ u32 beaconq;
+ u32 bmisscnt;
+- u32 ast_be_xmit;
+ u32 bc_tstamp;
+ struct ieee80211_vif *bslot[ATH_BCBUF];
+ int slottime;
+@@ -411,12 +414,14 @@ struct ath_beacon {
+ bool tx_last;
+ };
+
+-void ath_beacon_tasklet(unsigned long data);
+-void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
+-int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif);
+-void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
+-int ath_beaconq_config(struct ath_softc *sc);
+-void ath_set_beacon(struct ath_softc *sc);
++void ath9k_beacon_tasklet(unsigned long data);
++bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
++void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
++ u32 changed);
++void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
++void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
++void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif);
++void ath9k_set_beacon(struct ath_softc *sc);
+ void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
+
+ /*******************/
+@@ -442,9 +447,12 @@ void ath_rx_poll(unsigned long data);
+ void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon);
+ void ath_paprd_calibrate(struct work_struct *work);
+ void ath_ani_calibrate(unsigned long data);
+-void ath_start_ani(struct ath_common *common);
++void ath_start_ani(struct ath_softc *sc);
++void ath_stop_ani(struct ath_softc *sc);
++void ath_check_ani(struct ath_softc *sc);
+ int ath_update_survey_stats(struct ath_softc *sc);
+ void ath_update_survey_nf(struct ath_softc *sc, int channel);
++void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
+
+ /**********/
+ /* BTCOEX */
+@@ -619,7 +627,6 @@ enum sc_op_flags {
+ SC_OP_INVALID,
+ SC_OP_BEACONS,
+ SC_OP_RXFLUSH,
+- SC_OP_TSF_RESET,
+ SC_OP_ANI_RUN,
+ SC_OP_PRIM_STA_VIF,
+ SC_OP_HW_RESET,
+--- a/drivers/net/wireless/ath/ath9k/beacon.c
++++ b/drivers/net/wireless/ath/ath9k/beacon.c
+@@ -30,7 +30,7 @@ static void ath9k_reset_beacon_status(st
+ * the operating mode of the station (AP or AdHoc). Parameters are AIFS
+ * settings and channel width min/max
+ */
+-int ath_beaconq_config(struct ath_softc *sc)
++static void ath9k_beaconq_config(struct ath_softc *sc)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -38,6 +38,7 @@ int ath_beaconq_config(struct ath_softc
+ struct ath_txq *txq;
+
+ ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
++
+ if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
+ /* Always burst out beacon and CAB traffic. */
+ qi.tqi_aifs = 1;
+@@ -56,12 +57,9 @@ int ath_beaconq_config(struct ath_softc
+ }
+
+ if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
+- ath_err(common,
+- "Unable to update h/w beacon queue parameters\n");
+- return 0;
++ ath_err(common, "Unable to update h/w beacon queue parameters\n");
+ } else {
+ ath9k_hw_resettxqueue(ah, sc->beacon.beaconq);
+- return 1;
+ }
+ }
+
+@@ -70,7 +68,7 @@ int ath_beaconq_config(struct ath_softc
+ * up rate codes, and channel flags. Beacons are always sent out at the
+ * lowest rate, and are not retried.
+ */
+-static void ath_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
++static void ath9k_beacon_setup(struct ath_softc *sc, struct ieee80211_vif *vif,
+ struct ath_buf *bf, int rateidx)
+ {
+ struct sk_buff *skb = bf->bf_mpdu;
+@@ -81,8 +79,6 @@ static void ath_beacon_setup(struct ath_
+ u8 chainmask = ah->txchainmask;
+ u8 rate = 0;
+
+- ath9k_reset_beacon_status(sc);
-
--static const u32 ar9480_2p0_radio_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
-- {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
-- {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
-- {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
--};
+ sband = &sc->sbands[common->hw->conf.channel->band];
+ rate = sband->bitrates[rateidx].hw_value;
+ if (vif->bss_conf.use_short_preamble)
+@@ -111,7 +107,7 @@ static void ath_beacon_setup(struct ath_
+ ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
+ }
+
+-static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
++static void ath9k_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
+ {
+ struct ath_softc *sc = hw->priv;
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+@@ -128,28 +124,22 @@ static void ath_tx_cabq(struct ieee80211
+ }
+ }
+
+-static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
+- struct ieee80211_vif *vif)
++static struct ath_buf *ath9k_beacon_generate(struct ieee80211_hw *hw,
++ struct ieee80211_vif *vif)
+ {
+ struct ath_softc *sc = hw->priv;
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ struct ath_buf *bf;
+- struct ath_vif *avp;
++ struct ath_vif *avp = (void *)vif->drv_priv;
+ struct sk_buff *skb;
+- struct ath_txq *cabq;
++ struct ath_txq *cabq = sc->beacon.cabq;
+ struct ieee80211_tx_info *info;
++ struct ieee80211_mgmt *mgmt_hdr;
+ int cabq_depth;
+
+- ath9k_reset_beacon_status(sc);
-
--static const u32 ar9480_modes_high_ob_db_tx_gain_table_2p0[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
-- {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-- {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-- {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-- {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
-- {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
-- {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
-- {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
-- {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
-- {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
-- {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
-- {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
-- {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
-- {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
-- {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
-- {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
-- {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
-- {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
-- {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
-- {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
-- {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
-- {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
-- {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
-- {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
-- {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
-- {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
-- {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
-- {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
-- {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
-- {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
-- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
-- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
-- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
-- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
-- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
-- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
-- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-- {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-- {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-- {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
-- {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
-- {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-- {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
-- {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
--};
+- avp = (void *)vif->drv_priv;
+- cabq = sc->beacon.cabq;
-
--static const u32 ar9480_2p0_radio_core[][2] = {
-- /* Addr allmodes */
-- {0x00016000, 0x36db6db6},
-- {0x00016004, 0x6db6db40},
-- {0x00016008, 0x73f00000},
-- {0x0001600c, 0x00000000},
-- {0x00016010, 0x6d820001},
-- {0x00016040, 0x7f80fff8},
-- {0x0001604c, 0x2699e04f},
-- {0x00016050, 0x6db6db6c},
-- {0x00016058, 0x6c200000},
-- {0x00016080, 0x00040000},
-- {0x00016084, 0x9a68048c},
-- {0x00016088, 0x54214514},
-- {0x0001608c, 0x1203040b},
-- {0x00016090, 0x24926490},
-- {0x00016098, 0xd2888888},
-- {0x000160a0, 0x0a108ffe},
-- {0x000160a4, 0x812fc491},
-- {0x000160a8, 0x423c8000},
-- {0x000160b4, 0x92000000},
-- {0x000160b8, 0x0285dddc},
-- {0x000160bc, 0x02908888},
-- {0x000160c0, 0x00adb6d0},
-- {0x000160c4, 0x6db6db60},
-- {0x000160c8, 0x6db6db6c},
-- {0x000160cc, 0x0de6c1b0},
-- {0x00016100, 0x3fffbe04},
-- {0x00016104, 0xfff80000},
-- {0x00016108, 0x00200400},
-- {0x00016110, 0x00000000},
-- {0x00016144, 0x02084080},
-- {0x00016148, 0x000080c0},
-- {0x00016280, 0x050a0001},
-- {0x00016284, 0x3d841400},
-- {0x00016288, 0x00000000},
-- {0x0001628c, 0xe3000000},
-- {0x00016290, 0xa1005080},
-- {0x00016294, 0x00000020},
-- {0x00016298, 0x54a82900},
-- {0x00016340, 0x121e4276},
-- {0x00016344, 0x00300000},
-- {0x00016400, 0x36db6db6},
-- {0x00016404, 0x6db6db40},
-- {0x00016408, 0x73f00000},
-- {0x0001640c, 0x00000000},
-- {0x00016410, 0x6c800001},
-- {0x00016440, 0x7f80fff8},
-- {0x0001644c, 0x4699e04f},
-- {0x00016450, 0x6db6db6c},
-- {0x00016500, 0x3fffbe04},
-- {0x00016504, 0xfff80000},
-- {0x00016508, 0x00200400},
-- {0x00016510, 0x00000000},
-- {0x00016544, 0x02084080},
-- {0x00016548, 0x000080c0},
--};
+- if ((avp->av_bcbuf == NULL) || !avp->is_bslot_active)
++ if (avp->av_bcbuf == NULL)
+ return NULL;
+
+- /* Release the old beacon first */
-
--static const u32 ar9480_2p0_tx_gain_table_baseband_postamble_emulation[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
-- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
-- {0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
-- {0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
-- {0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
-- {0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
-- {0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
-- {0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
-- {0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
-- {0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
-- {0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
-- {0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
-- {0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
--};
+ bf = avp->av_bcbuf;
+ skb = bf->bf_mpdu;
+ if (skb) {
+@@ -159,14 +149,14 @@ static struct ath_buf *ath_beacon_genera
+ bf->bf_buf_addr = 0;
+ }
+
+- /* Get a new beacon from mac80211 */
-
--static const u32 ar9480_2p0_soc_preamble[][2] = {
-- /* Addr allmodes */
-- {0x00007020, 0x00000000},
-- {0x00007034, 0x00000002},
-- {0x00007038, 0x000004c2},
--};
+ skb = ieee80211_beacon_get(hw, vif);
+- bf->bf_mpdu = skb;
+ if (skb == NULL)
+ return NULL;
+- ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
+- avp->tsf_adjust;
++
++ bf->bf_mpdu = skb;
++
++ mgmt_hdr = (struct ieee80211_mgmt *)skb->data;
++ mgmt_hdr->u.beacon.timestamp = avp->tsf_adjust;
+
+ info = IEEE80211_SKB_CB(skb);
+ if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
+@@ -212,61 +202,52 @@ static struct ath_buf *ath_beacon_genera
+ }
+ }
+
+- ath_beacon_setup(sc, vif, bf, info->control.rates[0].idx);
++ ath9k_beacon_setup(sc, vif, bf, info->control.rates[0].idx);
+
+ while (skb) {
+- ath_tx_cabq(hw, skb);
++ ath9k_tx_cabq(hw, skb);
+ skb = ieee80211_get_buffered_bc(hw, vif);
+ }
+
+ return bf;
+ }
+
+-int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
++void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif)
+ {
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+- struct ath_vif *avp;
+- struct ath_buf *bf;
+- struct sk_buff *skb;
+- struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+- __le64 tstamp;
++ struct ath_vif *avp = (void *)vif->drv_priv;
++ int slot;
+
+- avp = (void *)vif->drv_priv;
++ avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf, struct ath_buf, list);
++ list_del(&avp->av_bcbuf->list);
+
+- /* Allocate a beacon descriptor if we haven't done so. */
+- if (!avp->av_bcbuf) {
+- /* Allocate beacon state for hostap/ibss. We know
+- * a buffer is available. */
+- avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
+- struct ath_buf, list);
+- list_del(&avp->av_bcbuf->list);
-
--static const u32 ar9480_2p0_sys2ant[][2] = {
-- /* Addr allmodes */
-- {0x00063120, 0x00801980},
--};
+- if (ath9k_uses_beacons(vif->type)) {
+- int slot;
+- /*
+- * Assign the vif to a beacon xmit slot. As
+- * above, this cannot fail to find one.
+- */
+- avp->av_bslot = 0;
+- for (slot = 0; slot < ATH_BCBUF; slot++)
+- if (sc->beacon.bslot[slot] == NULL) {
+- avp->av_bslot = slot;
+- avp->is_bslot_active = false;
-
--static const u32 ar9480_2p0_mac_core[][2] = {
-- /* Addr allmodes */
-- {0x00000008, 0x00000000},
-- {0x00000030, 0x000e0085},
-- {0x00000034, 0x00000005},
-- {0x00000040, 0x00000000},
-- {0x00000044, 0x00000000},
-- {0x00000048, 0x00000008},
-- {0x0000004c, 0x00000010},
-- {0x00000050, 0x00000000},
-- {0x00001040, 0x002ffc0f},
-- {0x00001044, 0x002ffc0f},
-- {0x00001048, 0x002ffc0f},
-- {0x0000104c, 0x002ffc0f},
-- {0x00001050, 0x002ffc0f},
-- {0x00001054, 0x002ffc0f},
-- {0x00001058, 0x002ffc0f},
-- {0x0000105c, 0x002ffc0f},
-- {0x00001060, 0x002ffc0f},
-- {0x00001064, 0x002ffc0f},
-- {0x000010f0, 0x00000100},
-- {0x00001270, 0x00000000},
-- {0x000012b0, 0x00000000},
-- {0x000012f0, 0x00000000},
-- {0x0000143c, 0x00000000},
-- {0x0000147c, 0x00000000},
-- {0x00001810, 0x0f000003},
-- {0x00008000, 0x00000000},
-- {0x00008004, 0x00000000},
-- {0x00008008, 0x00000000},
-- {0x0000800c, 0x00000000},
-- {0x00008018, 0x00000000},
-- {0x00008020, 0x00000000},
-- {0x00008038, 0x00000000},
-- {0x0000803c, 0x00080000},
-- {0x00008040, 0x00000000},
-- {0x00008044, 0x00000000},
-- {0x00008048, 0x00000000},
-- {0x0000804c, 0xffffffff},
-- {0x00008050, 0xffffffff},
-- {0x00008054, 0x00000000},
-- {0x00008058, 0x00000000},
-- {0x0000805c, 0x000fc78f},
-- {0x00008060, 0x0000000f},
-- {0x00008064, 0x00000000},
-- {0x00008070, 0x00000310},
-- {0x00008074, 0x00000020},
-- {0x00008078, 0x00000000},
-- {0x0000809c, 0x0000000f},
-- {0x000080a0, 0x00000000},
-- {0x000080a4, 0x02ff0000},
-- {0x000080a8, 0x0e070605},
-- {0x000080ac, 0x0000000d},
-- {0x000080b0, 0x00000000},
-- {0x000080b4, 0x00000000},
-- {0x000080b8, 0x00000000},
-- {0x000080bc, 0x00000000},
-- {0x000080c0, 0x2a800000},
-- {0x000080c4, 0x06900168},
-- {0x000080c8, 0x13881c20},
-- {0x000080cc, 0x01f40000},
-- {0x000080d0, 0x00252500},
-- {0x000080d4, 0x00b00005},
-- {0x000080d8, 0x00400002},
-- {0x000080dc, 0x00000000},
-- {0x000080e0, 0xffffffff},
-- {0x000080e4, 0x0000ffff},
-- {0x000080e8, 0x3f3f3f3f},
-- {0x000080ec, 0x00000000},
-- {0x000080f0, 0x00000000},
-- {0x000080f4, 0x00000000},
-- {0x000080fc, 0x00020000},
-- {0x00008100, 0x00000000},
-- {0x00008108, 0x00000052},
-- {0x0000810c, 0x00000000},
-- {0x00008110, 0x00000000},
-- {0x00008114, 0x000007ff},
-- {0x00008118, 0x000000aa},
-- {0x0000811c, 0x00003210},
-- {0x00008124, 0x00000000},
-- {0x00008128, 0x00000000},
-- {0x0000812c, 0x00000000},
-- {0x00008130, 0x00000000},
-- {0x00008134, 0x00000000},
-- {0x00008138, 0x00000000},
-- {0x0000813c, 0x0000ffff},
-- {0x00008144, 0xffffffff},
-- {0x00008168, 0x00000000},
-- {0x0000816c, 0x00000000},
-- {0x00008170, 0x18486e00},
-- {0x00008174, 0x33332210},
-- {0x00008178, 0x00000000},
-- {0x0000817c, 0x00020000},
-- {0x000081c4, 0x33332210},
-- {0x000081c8, 0x00000000},
-- {0x000081cc, 0x00000000},
-- {0x000081d4, 0x00000000},
-- {0x000081ec, 0x00000000},
-- {0x000081f0, 0x00000000},
-- {0x000081f4, 0x00000000},
-- {0x000081f8, 0x00000000},
-- {0x000081fc, 0x00000000},
-- {0x00008240, 0x00100000},
-- {0x00008244, 0x0010f400},
-- {0x00008248, 0x00000800},
-- {0x0000824c, 0x0001e800},
-- {0x00008250, 0x00000000},
-- {0x00008254, 0x00000000},
-- {0x00008258, 0x00000000},
-- {0x0000825c, 0x40000000},
-- {0x00008260, 0x00080922},
-- {0x00008264, 0x99c00010},
-- {0x00008268, 0xffffffff},
-- {0x0000826c, 0x0000ffff},
-- {0x00008270, 0x00000000},
-- {0x00008274, 0x40000000},
-- {0x00008278, 0x003e4180},
-- {0x0000827c, 0x00000004},
-- {0x00008284, 0x0000002c},
-- {0x00008288, 0x0000002c},
-- {0x0000828c, 0x000000ff},
-- {0x00008294, 0x00000000},
-- {0x00008298, 0x00000000},
-- {0x0000829c, 0x00000000},
-- {0x00008300, 0x00000140},
-- {0x00008314, 0x00000000},
-- {0x0000831c, 0x0000010d},
-- {0x00008328, 0x00000000},
-- {0x0000832c, 0x0000001f},
-- {0x00008330, 0x00000302},
-- {0x00008334, 0x00000700},
-- {0x00008338, 0xffff0000},
-- {0x0000833c, 0x02400000},
-- {0x00008340, 0x000107ff},
-- {0x00008344, 0xaa48105b},
-- {0x00008348, 0x008f0000},
-- {0x0000835c, 0x00000000},
-- {0x00008360, 0xffffffff},
-- {0x00008364, 0xffffffff},
-- {0x00008368, 0x00000000},
-- {0x00008370, 0x00000000},
-- {0x00008374, 0x000000ff},
-- {0x00008378, 0x00000000},
-- {0x0000837c, 0x00000000},
-- {0x00008380, 0xffffffff},
-- {0x00008384, 0xffffffff},
-- {0x00008390, 0xffffffff},
-- {0x00008394, 0xffffffff},
-- {0x00008398, 0x00000000},
-- {0x0000839c, 0x00000000},
-- {0x000083a4, 0x0000fa14},
-- {0x000083a8, 0x000f0c00},
-- {0x000083ac, 0x33332210},
-- {0x000083b0, 0x33332210},
-- {0x000083b4, 0x33332210},
-- {0x000083b8, 0x33332210},
-- {0x000083bc, 0x00000000},
-- {0x000083c0, 0x00000000},
-- {0x000083c4, 0x00000000},
-- {0x000083c8, 0x00000000},
-- {0x000083cc, 0x00000200},
-- {0x000083d0, 0x000301ff},
--};
+- /* NB: keep looking for a double slot */
+- if (slot == 0 || !sc->beacon.bslot[slot-1])
+- break;
+- }
+- BUG_ON(sc->beacon.bslot[avp->av_bslot] != NULL);
+- sc->beacon.bslot[avp->av_bslot] = vif;
+- sc->nbcnvifs++;
++ for (slot = 0; slot < ATH_BCBUF; slot++) {
++ if (sc->beacon.bslot[slot] == NULL) {
++ avp->av_bslot = slot;
++ break;
+ }
+ }
+
+- /* release the previous beacon frame, if it already exists. */
+- bf = avp->av_bcbuf;
+- if (bf->bf_mpdu != NULL) {
+- skb = bf->bf_mpdu;
++ sc->beacon.bslot[avp->av_bslot] = vif;
++ sc->nbcnvifs++;
++
++ ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n",
++ avp->av_bslot);
++}
++
++void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif)
++{
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++ struct ath_vif *avp = (void *)vif->drv_priv;
++ struct ath_buf *bf = avp->av_bcbuf;
++
++ ath_dbg(common, CONFIG, "Removing interface at beacon slot: %d\n",
++ avp->av_bslot);
++
++ tasklet_disable(&sc->bcon_tasklet);
++
++ if (bf && bf->bf_mpdu) {
++ struct sk_buff *skb = bf->bf_mpdu;
+ dma_unmap_single(sc->dev, bf->bf_buf_addr,
+ skb->len, DMA_TO_DEVICE);
+ dev_kfree_skb_any(skb);
+@@ -274,99 +255,74 @@ int ath_beacon_alloc(struct ath_softc *s
+ bf->bf_buf_addr = 0;
+ }
+
+- /* NB: the beacon data buffer must be 32-bit aligned. */
+- skb = ieee80211_beacon_get(sc->hw, vif);
+- if (skb == NULL)
+- return -ENOMEM;
-
--static const u32 ar9480_2p0_mac_postamble[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
-- {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
-- {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
-- {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
-- {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
-- {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
-- {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
-- {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
--};
+- tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
+- sc->beacon.bc_tstamp = (u32) le64_to_cpu(tstamp);
+- /* Calculate a TSF adjustment factor required for staggered beacons. */
+- if (avp->av_bslot > 0) {
+- u64 tsfadjust;
+- int intval;
++ avp->av_bcbuf = NULL;
++ sc->beacon.bslot[avp->av_bslot] = NULL;
++ sc->nbcnvifs--;
++ list_add_tail(&bf->list, &sc->beacon.bbuf);
+
+- intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
++ tasklet_enable(&sc->bcon_tasklet);
++}
+
+- /*
+- * Calculate the TSF offset for this beacon slot, i.e., the
+- * number of usecs that need to be added to the timestamp field
+- * in Beacon and Probe Response frames. Beacon slot 0 is
+- * processed at the correct offset, so it does not require TSF
+- * adjustment. Other slots are adjusted to get the timestamp
+- * close to the TBTT for the BSS.
+- */
+- tsfadjust = TU_TO_USEC(intval * avp->av_bslot) / ATH_BCBUF;
+- avp->tsf_adjust = cpu_to_le64(tsfadjust);
++static int ath9k_beacon_choose_slot(struct ath_softc *sc)
++{
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++ struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
++ u16 intval;
++ u32 tsftu;
++ u64 tsf;
++ int slot;
+
+- ath_dbg(common, BEACON,
+- "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
+- avp->av_bslot, intval, (unsigned long long)tsfadjust);
++ if (sc->sc_ah->opmode != NL80211_IFTYPE_AP) {
++ ath_dbg(common, BEACON, "slot 0, tsf: %llu\n",
++ ath9k_hw_gettsf64(sc->sc_ah));
++ return 0;
++ }
+
+- ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
+- avp->tsf_adjust;
+- } else
+- avp->tsf_adjust = cpu_to_le64(0);
++ intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
++ tsf = ath9k_hw_gettsf64(sc->sc_ah);
++ tsf += TU_TO_USEC(sc->sc_ah->config.sw_beacon_response_time);
++ tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
++ slot = (tsftu % (intval * ATH_BCBUF)) / intval;
+
+- bf->bf_mpdu = skb;
+- bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
+- skb->len, DMA_TO_DEVICE);
+- if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
+- dev_kfree_skb_any(skb);
+- bf->bf_mpdu = NULL;
+- bf->bf_buf_addr = 0;
+- ath_err(common, "dma_mapping_error on beacon alloc\n");
+- return -ENOMEM;
+- }
+- avp->is_bslot_active = true;
++ ath_dbg(common, BEACON, "slot: %d tsf: %llu tsftu: %u\n",
++ slot, tsf, tsftu / ATH_BCBUF);
+
+- return 0;
++ return slot;
+ }
+
+-void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp)
++void ath9k_set_tsfadjust(struct ath_softc *sc, struct ieee80211_vif *vif)
+ {
+- if (avp->av_bcbuf != NULL) {
+- struct ath_buf *bf;
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
++ struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
++ struct ath_vif *avp = (void *)vif->drv_priv;
++ u64 tsfadjust;
+
+- avp->is_bslot_active = false;
+- if (avp->av_bslot != -1) {
+- sc->beacon.bslot[avp->av_bslot] = NULL;
+- sc->nbcnvifs--;
+- avp->av_bslot = -1;
+- }
++ if (avp->av_bslot == 0)
++ return;
+
+- bf = avp->av_bcbuf;
+- if (bf->bf_mpdu != NULL) {
+- struct sk_buff *skb = bf->bf_mpdu;
+- dma_unmap_single(sc->dev, bf->bf_buf_addr,
+- skb->len, DMA_TO_DEVICE);
+- dev_kfree_skb_any(skb);
+- bf->bf_mpdu = NULL;
+- bf->bf_buf_addr = 0;
+- }
+- list_add_tail(&bf->list, &sc->beacon.bbuf);
++ tsfadjust = cur_conf->beacon_interval * avp->av_bslot / ATH_BCBUF;
++ avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
+
+- avp->av_bcbuf = NULL;
+- }
++ ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n",
++ (unsigned long long)tsfadjust, avp->av_bslot);
+ }
+
+-void ath_beacon_tasklet(unsigned long data)
++void ath9k_beacon_tasklet(unsigned long data)
+ {
+ struct ath_softc *sc = (struct ath_softc *)data;
+- struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ struct ath_buf *bf = NULL;
+ struct ieee80211_vif *vif;
+ bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
+ int slot;
+- u32 bfaddr, bc = 0;
+
+- if (work_pending(&sc->hw_reset_work)) {
++ if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
+ ath_dbg(common, RESET,
+ "reset work is pending, skip beaconing now\n");
+ return;
+ }
++
+ /*
+ * Check if the previous beacon has gone out. If
+ * not don't try to post another, skip this period
+@@ -390,55 +346,25 @@ void ath_beacon_tasklet(unsigned long da
+ } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
+ ath_dbg(common, BSTUCK, "beacon is officially stuck\n");
+ sc->beacon.bmisscnt = 0;
+- set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
+- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++ ath9k_queue_reset(sc, RESET_TYPE_BEACON_STUCK);
+ }
+
+ return;
+ }
+
+- /*
+- * Generate beacon frames. we are sending frames
+- * staggered so calculate the slot for this frame based
+- * on the tsf to safeguard against missing an swba.
+- */
-
--static const u32 ar9480_common_mixed_rx_gain_table_2p0[][2] = {
-- /* Addr allmodes */
-- {0x0000a000, 0x00010000},
-- {0x0000a004, 0x00030002},
-- {0x0000a008, 0x00050004},
-- {0x0000a00c, 0x00810080},
-- {0x0000a010, 0x00830082},
-- {0x0000a014, 0x01810180},
-- {0x0000a018, 0x01830182},
-- {0x0000a01c, 0x01850184},
-- {0x0000a020, 0x01890188},
-- {0x0000a024, 0x018b018a},
-- {0x0000a028, 0x018d018c},
-- {0x0000a02c, 0x03820190},
-- {0x0000a030, 0x03840383},
-- {0x0000a034, 0x03880385},
-- {0x0000a038, 0x038a0389},
-- {0x0000a03c, 0x038c038b},
-- {0x0000a040, 0x0390038d},
-- {0x0000a044, 0x03920391},
-- {0x0000a048, 0x03940393},
-- {0x0000a04c, 0x03960395},
-- {0x0000a050, 0x00000000},
-- {0x0000a054, 0x00000000},
-- {0x0000a058, 0x00000000},
-- {0x0000a05c, 0x00000000},
-- {0x0000a060, 0x00000000},
-- {0x0000a064, 0x00000000},
-- {0x0000a068, 0x00000000},
-- {0x0000a06c, 0x00000000},
-- {0x0000a070, 0x00000000},
-- {0x0000a074, 0x00000000},
-- {0x0000a078, 0x00000000},
-- {0x0000a07c, 0x00000000},
-- {0x0000a080, 0x29292929},
-- {0x0000a084, 0x29292929},
-- {0x0000a088, 0x29292929},
-- {0x0000a08c, 0x29292929},
-- {0x0000a090, 0x22292929},
-- {0x0000a094, 0x1d1d2222},
-- {0x0000a098, 0x0c111117},
-- {0x0000a09c, 0x00030303},
-- {0x0000a0a0, 0x00000000},
-- {0x0000a0a4, 0x00000000},
-- {0x0000a0a8, 0x00000000},
-- {0x0000a0ac, 0x00000000},
-- {0x0000a0b0, 0x00000000},
-- {0x0000a0b4, 0x00000000},
-- {0x0000a0b8, 0x00000000},
-- {0x0000a0bc, 0x00000000},
-- {0x0000a0c0, 0x001f0000},
-- {0x0000a0c4, 0x01000101},
-- {0x0000a0c8, 0x011e011f},
-- {0x0000a0cc, 0x011c011d},
-- {0x0000a0d0, 0x02030204},
-- {0x0000a0d4, 0x02010202},
-- {0x0000a0d8, 0x021f0200},
-- {0x0000a0dc, 0x0302021e},
-- {0x0000a0e0, 0x03000301},
-- {0x0000a0e4, 0x031e031f},
-- {0x0000a0e8, 0x0402031d},
-- {0x0000a0ec, 0x04000401},
-- {0x0000a0f0, 0x041e041f},
-- {0x0000a0f4, 0x0502041d},
-- {0x0000a0f8, 0x05000501},
-- {0x0000a0fc, 0x051e051f},
-- {0x0000a100, 0x06010602},
-- {0x0000a104, 0x061f0600},
-- {0x0000a108, 0x061d061e},
-- {0x0000a10c, 0x07020703},
-- {0x0000a110, 0x07000701},
-- {0x0000a114, 0x00000000},
-- {0x0000a118, 0x00000000},
-- {0x0000a11c, 0x00000000},
-- {0x0000a120, 0x00000000},
-- {0x0000a124, 0x00000000},
-- {0x0000a128, 0x00000000},
-- {0x0000a12c, 0x00000000},
-- {0x0000a130, 0x00000000},
-- {0x0000a134, 0x00000000},
-- {0x0000a138, 0x00000000},
-- {0x0000a13c, 0x00000000},
-- {0x0000a140, 0x001f0000},
-- {0x0000a144, 0x01000101},
-- {0x0000a148, 0x011e011f},
-- {0x0000a14c, 0x011c011d},
-- {0x0000a150, 0x02030204},
-- {0x0000a154, 0x02010202},
-- {0x0000a158, 0x021f0200},
-- {0x0000a15c, 0x0302021e},
-- {0x0000a160, 0x03000301},
-- {0x0000a164, 0x031e031f},
-- {0x0000a168, 0x0402031d},
-- {0x0000a16c, 0x04000401},
-- {0x0000a170, 0x041e041f},
-- {0x0000a174, 0x0502041d},
-- {0x0000a178, 0x05000501},
-- {0x0000a17c, 0x051e051f},
-- {0x0000a180, 0x06010602},
-- {0x0000a184, 0x061f0600},
-- {0x0000a188, 0x061d061e},
-- {0x0000a18c, 0x07020703},
-- {0x0000a190, 0x07000701},
-- {0x0000a194, 0x00000000},
-- {0x0000a198, 0x00000000},
-- {0x0000a19c, 0x00000000},
-- {0x0000a1a0, 0x00000000},
-- {0x0000a1a4, 0x00000000},
-- {0x0000a1a8, 0x00000000},
-- {0x0000a1ac, 0x00000000},
-- {0x0000a1b0, 0x00000000},
-- {0x0000a1b4, 0x00000000},
-- {0x0000a1b8, 0x00000000},
-- {0x0000a1bc, 0x00000000},
-- {0x0000a1c0, 0x00000000},
-- {0x0000a1c4, 0x00000000},
-- {0x0000a1c8, 0x00000000},
-- {0x0000a1cc, 0x00000000},
-- {0x0000a1d0, 0x00000000},
-- {0x0000a1d4, 0x00000000},
-- {0x0000a1d8, 0x00000000},
-- {0x0000a1dc, 0x00000000},
-- {0x0000a1e0, 0x00000000},
-- {0x0000a1e4, 0x00000000},
-- {0x0000a1e8, 0x00000000},
-- {0x0000a1ec, 0x00000000},
-- {0x0000a1f0, 0x00000396},
-- {0x0000a1f4, 0x00000396},
-- {0x0000a1f8, 0x00000396},
-- {0x0000a1fc, 0x00000196},
-- {0x0000b000, 0x00010000},
-- {0x0000b004, 0x00030002},
-- {0x0000b008, 0x00050004},
-- {0x0000b00c, 0x00810080},
-- {0x0000b010, 0x00830082},
-- {0x0000b014, 0x01810180},
-- {0x0000b018, 0x01830182},
-- {0x0000b01c, 0x01850184},
-- {0x0000b020, 0x02810280},
-- {0x0000b024, 0x02830282},
-- {0x0000b028, 0x02850284},
-- {0x0000b02c, 0x02890288},
-- {0x0000b030, 0x028b028a},
-- {0x0000b034, 0x0388028c},
-- {0x0000b038, 0x038a0389},
-- {0x0000b03c, 0x038c038b},
-- {0x0000b040, 0x0390038d},
-- {0x0000b044, 0x03920391},
-- {0x0000b048, 0x03940393},
-- {0x0000b04c, 0x03960395},
-- {0x0000b050, 0x00000000},
-- {0x0000b054, 0x00000000},
-- {0x0000b058, 0x00000000},
-- {0x0000b05c, 0x00000000},
-- {0x0000b060, 0x00000000},
-- {0x0000b064, 0x00000000},
-- {0x0000b068, 0x00000000},
-- {0x0000b06c, 0x00000000},
-- {0x0000b070, 0x00000000},
-- {0x0000b074, 0x00000000},
-- {0x0000b078, 0x00000000},
-- {0x0000b07c, 0x00000000},
-- {0x0000b080, 0x2a2d2f32},
-- {0x0000b084, 0x21232328},
-- {0x0000b088, 0x19191c1e},
-- {0x0000b08c, 0x12141417},
-- {0x0000b090, 0x07070e0e},
-- {0x0000b094, 0x03030305},
-- {0x0000b098, 0x00000003},
-- {0x0000b09c, 0x00000000},
-- {0x0000b0a0, 0x00000000},
-- {0x0000b0a4, 0x00000000},
-- {0x0000b0a8, 0x00000000},
-- {0x0000b0ac, 0x00000000},
-- {0x0000b0b0, 0x00000000},
-- {0x0000b0b4, 0x00000000},
-- {0x0000b0b8, 0x00000000},
-- {0x0000b0bc, 0x00000000},
-- {0x0000b0c0, 0x003f0020},
-- {0x0000b0c4, 0x00400041},
-- {0x0000b0c8, 0x0140005f},
-- {0x0000b0cc, 0x0160015f},
-- {0x0000b0d0, 0x017e017f},
-- {0x0000b0d4, 0x02410242},
-- {0x0000b0d8, 0x025f0240},
-- {0x0000b0dc, 0x027f0260},
-- {0x0000b0e0, 0x0341027e},
-- {0x0000b0e4, 0x035f0340},
-- {0x0000b0e8, 0x037f0360},
-- {0x0000b0ec, 0x04400441},
-- {0x0000b0f0, 0x0460045f},
-- {0x0000b0f4, 0x0541047f},
-- {0x0000b0f8, 0x055f0540},
-- {0x0000b0fc, 0x057f0560},
-- {0x0000b100, 0x06400641},
-- {0x0000b104, 0x0660065f},
-- {0x0000b108, 0x067e067f},
-- {0x0000b10c, 0x07410742},
-- {0x0000b110, 0x075f0740},
-- {0x0000b114, 0x077f0760},
-- {0x0000b118, 0x07800781},
-- {0x0000b11c, 0x07a0079f},
-- {0x0000b120, 0x07c107bf},
-- {0x0000b124, 0x000007c0},
-- {0x0000b128, 0x00000000},
-- {0x0000b12c, 0x00000000},
-- {0x0000b130, 0x00000000},
-- {0x0000b134, 0x00000000},
-- {0x0000b138, 0x00000000},
-- {0x0000b13c, 0x00000000},
-- {0x0000b140, 0x003f0020},
-- {0x0000b144, 0x00400041},
-- {0x0000b148, 0x0140005f},
-- {0x0000b14c, 0x0160015f},
-- {0x0000b150, 0x017e017f},
-- {0x0000b154, 0x02410242},
-- {0x0000b158, 0x025f0240},
-- {0x0000b15c, 0x027f0260},
-- {0x0000b160, 0x0341027e},
-- {0x0000b164, 0x035f0340},
-- {0x0000b168, 0x037f0360},
-- {0x0000b16c, 0x04400441},
-- {0x0000b170, 0x0460045f},
-- {0x0000b174, 0x0541047f},
-- {0x0000b178, 0x055f0540},
-- {0x0000b17c, 0x057f0560},
-- {0x0000b180, 0x06400641},
-- {0x0000b184, 0x0660065f},
-- {0x0000b188, 0x067e067f},
-- {0x0000b18c, 0x07410742},
-- {0x0000b190, 0x075f0740},
-- {0x0000b194, 0x077f0760},
-- {0x0000b198, 0x07800781},
-- {0x0000b19c, 0x07a0079f},
-- {0x0000b1a0, 0x07c107bf},
-- {0x0000b1a4, 0x000007c0},
-- {0x0000b1a8, 0x00000000},
-- {0x0000b1ac, 0x00000000},
-- {0x0000b1b0, 0x00000000},
-- {0x0000b1b4, 0x00000000},
-- {0x0000b1b8, 0x00000000},
-- {0x0000b1bc, 0x00000000},
-- {0x0000b1c0, 0x00000000},
-- {0x0000b1c4, 0x00000000},
-- {0x0000b1c8, 0x00000000},
-- {0x0000b1cc, 0x00000000},
-- {0x0000b1d0, 0x00000000},
-- {0x0000b1d4, 0x00000000},
-- {0x0000b1d8, 0x00000000},
-- {0x0000b1dc, 0x00000000},
-- {0x0000b1e0, 0x00000000},
-- {0x0000b1e4, 0x00000000},
-- {0x0000b1e8, 0x00000000},
-- {0x0000b1ec, 0x00000000},
-- {0x0000b1f0, 0x00000396},
-- {0x0000b1f4, 0x00000396},
-- {0x0000b1f8, 0x00000396},
-- {0x0000b1fc, 0x00000196},
--};
-
--static const u32 ar9480_modes_green_ob_db_tx_gain_table_2p0[][5] = {
-- /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
-- {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
-- {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-- {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-- {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
-- {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
-- {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
-- {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
-- {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
-- {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
-- {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
-- {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
-- {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
-- {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
-- {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
-- {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
-- {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
-- {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
-- {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
-- {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
-- {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
-- {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
-- {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
-- {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
-- {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
-- {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
-- {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
-- {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
-- {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
-- {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
-- {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
-- {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
-- {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-- {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
-- {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
-- {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
-- {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
-- {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
-- {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
-- {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
-- {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
-- {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
-- {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
-- {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
-- {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
-- {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-- {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
-- {0x00016054, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
-- {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
-- {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
-- {0x00016454, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
--};
+- if (ah->opmode == NL80211_IFTYPE_AP) {
+- u16 intval;
+- u32 tsftu;
+- u64 tsf;
-
--static const u32 ar9480_2p0_BTCOEX_MAX_TXPWR_table[][2] = {
-- /* Addr allmodes */
-- {0x000018c0, 0x10101010},
-- {0x000018c4, 0x10101010},
-- {0x000018c8, 0x10101010},
-- {0x000018cc, 0x10101010},
-- {0x000018d0, 0x10101010},
-- {0x000018d4, 0x10101010},
-- {0x000018d8, 0x10101010},
-- {0x000018dc, 0x10101010},
--};
+- intval = cur_conf->beacon_interval ? : ATH_DEFAULT_BINTVAL;
+- tsf = ath9k_hw_gettsf64(ah);
+- tsf += TU_TO_USEC(ah->config.sw_beacon_response_time);
+- tsftu = TSF_TO_TU((tsf * ATH_BCBUF) >>32, tsf * ATH_BCBUF);
+- slot = (tsftu % (intval * ATH_BCBUF)) / intval;
+- vif = sc->beacon.bslot[slot];
-
--static const u32 ar9480_2p0_baseband_core_emulation[][2] = {
-- /* Addr allmodes */
-- {0x00009800, 0xafa68e30},
-- {0x00009884, 0x00002842},
-- {0x00009c04, 0xff55ff55},
-- {0x00009c08, 0x0320ff55},
-- {0x00009e50, 0x00000000},
-- {0x00009fcc, 0x00000014},
-- {0x0000a344, 0x00000010},
-- {0x0000a398, 0x00000000},
-- {0x0000a39c, 0x71733d01},
-- {0x0000a3a0, 0xd0ad5c12},
-- {0x0000a3c0, 0x22222220},
-- {0x0000a3c4, 0x22222222},
-- {0x0000a404, 0x00418a11},
-- {0x0000a418, 0x050001ce},
-- {0x0000a438, 0x00001800},
-- {0x0000a458, 0x01444452},
-- {0x0000a644, 0x3fad9d74},
-- {0x0000a690, 0x00000038},
--};
+- ath_dbg(common, BEACON,
+- "slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
+- slot, tsf, tsftu / ATH_BCBUF, intval, vif);
+- } else {
+- slot = 0;
+- vif = sc->beacon.bslot[slot];
+- }
++ slot = ath9k_beacon_choose_slot(sc);
++ vif = sc->beacon.bslot[slot];
+
++ if (!vif || !vif->bss_conf.enable_beacon)
++ return;
+
+- bfaddr = 0;
+- if (vif) {
+- bf = ath_beacon_generate(sc->hw, vif);
+- if (bf != NULL) {
+- bfaddr = bf->bf_daddr;
+- bc = 1;
+- }
++ bf = ath9k_beacon_generate(sc->hw, vif);
++ WARN_ON(!bf);
+
+- if (sc->beacon.bmisscnt != 0) {
+- ath_dbg(common, BSTUCK,
+- "resume beacon xmit after %u misses\n",
+- sc->beacon.bmisscnt);
+- sc->beacon.bmisscnt = 0;
+- }
++ if (sc->beacon.bmisscnt != 0) {
++ ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
++ sc->beacon.bmisscnt);
++ sc->beacon.bmisscnt = 0;
+ }
+
+ /*
+@@ -458,39 +384,37 @@ void ath_beacon_tasklet(unsigned long da
+ * set to ATH_BCBUF so this check is a noop.
+ */
+ if (sc->beacon.updateslot == UPDATE) {
+- sc->beacon.updateslot = COMMIT; /* commit next beacon */
++ sc->beacon.updateslot = COMMIT;
+ sc->beacon.slotupdate = slot;
+- } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
++ } else if (sc->beacon.updateslot == COMMIT &&
++ sc->beacon.slotupdate == slot) {
+ ah->slottime = sc->beacon.slottime;
+ ath9k_hw_init_global_settings(ah);
+ sc->beacon.updateslot = OK;
+ }
+- if (bfaddr != 0) {
++
++ if (bf) {
++ ath9k_reset_beacon_status(sc);
++
+ /* NB: cabq traffic should already be queued and primed */
+- ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
++ ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
+
+ if (!edma)
+ ath9k_hw_txstart(ah, sc->beacon.beaconq);
-
--#endif /* INITVALS_9480_2P0_H */
---- a/drivers/net/wireless/ath/ath9k/ath9k.h
-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -458,7 +458,7 @@ void ath9k_btcoex_timer_pause(struct ath
- #define ATH_LED_PIN_9287 8
- #define ATH_LED_PIN_9300 10
- #define ATH_LED_PIN_9485 6
--#define ATH_LED_PIN_9480 0
-+#define ATH_LED_PIN_9462 0
-
- #ifdef CONFIG_MAC80211_LEDS
- void ath_init_leds(struct ath_softc *sc);
---- a/drivers/net/wireless/ath/ath9k/beacon.c
-+++ b/drivers/net/wireless/ath/ath9k/beacon.c
-@@ -515,7 +515,7 @@ static void ath_beacon_config_ap(struct
- sc->sc_flags |= SC_OP_TSF_RESET;
- ath9k_beacon_init(sc, nexttbtt, intval);
- sc->beacon.bmisscnt = 0;
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
- ath9k_hw_enable_interrupts(ah);
+- sc->beacon.ast_be_xmit += bc; /* XXX per-vif? */
+ }
}
-@@ -643,7 +643,7 @@ static void ath_beacon_config_sta(struct
- ath9k_hw_set_sta_beacon_timers(ah, &bs);
- ah->imask |= ATH9K_INT_BMISS;
+-static void ath9k_beacon_init(struct ath_softc *sc,
+- u32 next_beacon,
+- u32 beacon_period)
++static void ath9k_beacon_init(struct ath_softc *sc, u32 nexttbtt, u32 intval)
+ {
+- if (test_bit(SC_OP_TSF_RESET, &sc->sc_flags)) {
+- ath9k_ps_wakeup(sc);
+- ath9k_hw_reset_tsf(sc->sc_ah);
+- }
+-
+- ath9k_hw_beaconinit(sc->sc_ah, next_beacon, beacon_period);
++ struct ath_hw *ah = sc->sc_ah;
-- ath9k_hw_set_interrupts(ah, ah->imask);
+- if (test_bit(SC_OP_TSF_RESET, &sc->sc_flags)) {
+- ath9k_ps_restore(sc);
+- clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
+- }
++ ath9k_hw_disable_interrupts(ah);
++ ath9k_hw_reset_tsf(ah);
++ ath9k_beaconq_config(sc);
++ ath9k_hw_beaconinit(ah, nexttbtt, intval);
++ sc->beacon.bmisscnt = 0;
+ ath9k_hw_set_interrupts(ah);
- ath9k_hw_enable_interrupts(ah);
++ ath9k_hw_enable_interrupts(ah);
}
-@@ -679,7 +679,7 @@ static void ath_beacon_config_adhoc(stru
+ /*
+@@ -498,32 +422,27 @@ static void ath9k_beacon_init(struct ath
+ * burst together. For the former arrange for the SWBA to be delivered for each
+ * slot. Slots that are not occupied will generate nothing.
+ */
+-static void ath_beacon_config_ap(struct ath_softc *sc,
+- struct ath_beacon_config *conf)
++static void ath9k_beacon_config_ap(struct ath_softc *sc,
++ struct ath_beacon_config *conf)
+ {
+ struct ath_hw *ah = sc->sc_ah;
++ struct ath_common *common = ath9k_hw_common(ah);
+ u32 nexttbtt, intval;
+
+ /* NB: the beacon interval is kept internally in TU's */
+ intval = TU_TO_USEC(conf->beacon_interval);
+- intval /= ATH_BCBUF; /* for staggered beacons */
++ intval /= ATH_BCBUF;
+ nexttbtt = intval;
+
+- /*
+- * In AP mode we enable the beacon timers and SWBA interrupts to
+- * prepare beacon frames.
+- */
+- ah->imask |= ATH9K_INT_SWBA;
+- ath_beaconq_config(sc);
++ if (conf->enable_beacon)
++ ah->imask |= ATH9K_INT_SWBA;
++ else
++ ah->imask &= ~ATH9K_INT_SWBA;
+
+- /* Set the computed AP beacon timers */
++ ath_dbg(common, BEACON, "AP nexttbtt: %u intval: %u conf_intval: %u\n",
++ nexttbtt, intval, conf->beacon_interval);
+
+- ath9k_hw_disable_interrupts(ah);
+- set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
ath9k_beacon_init(sc, nexttbtt, intval);
- sc->beacon.bmisscnt = 0;
+- sc->beacon.bmisscnt = 0;
+- ath9k_hw_set_interrupts(ah);
+- ath9k_hw_enable_interrupts(ah);
+ }
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
+ /*
+@@ -534,8 +453,8 @@ static void ath_beacon_config_ap(struct
+ * we'll receive a BMISS interrupt when we stop seeing beacons from the AP
+ * we've associated with.
+ */
+-static void ath_beacon_config_sta(struct ath_softc *sc,
+- struct ath_beacon_config *conf)
++static void ath9k_beacon_config_sta(struct ath_softc *sc,
++ struct ath_beacon_config *conf)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -654,8 +573,8 @@ static void ath_beacon_config_sta(struct
ath9k_hw_enable_interrupts(ah);
}
-@@ -821,11 +821,11 @@ void ath9k_set_beaconing_status(struct a
- if (status) {
- /* Re-enable beaconing */
- ah->imask |= ATH9K_INT_SWBA;
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
- } else {
- /* Disable SWBA interrupt */
- ah->imask &= ~ATH9K_INT_SWBA;
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
- tasklet_kill(&sc->bcon_tasklet);
- ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
+-static void ath_beacon_config_adhoc(struct ath_softc *sc,
+- struct ath_beacon_config *conf)
++static void ath9k_beacon_config_adhoc(struct ath_softc *sc,
++ struct ath_beacon_config *conf)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -669,82 +588,53 @@ static void ath_beacon_config_adhoc(stru
+ tsf = roundup(ath9k_hw_gettsf32(ah) + TU_TO_USEC(FUDGE), intval);
+ nexttbtt = tsf + intval;
+
+- ath_dbg(common, BEACON, "IBSS nexttbtt %u intval %u (%u)\n",
+- nexttbtt, intval, conf->beacon_interval);
+-
+- /*
+- * In IBSS mode enable the beacon timers but only enable SWBA interrupts
+- * if we need to manually prepare beacon frames. Otherwise we use a
+- * self-linked tx descriptor and let the hardware deal with things.
+- */
+- ah->imask |= ATH9K_INT_SWBA;
+-
+- ath_beaconq_config(sc);
++ if (conf->enable_beacon)
++ ah->imask |= ATH9K_INT_SWBA;
++ else
++ ah->imask &= ~ATH9K_INT_SWBA;
+
+- /* Set the computed ADHOC beacon timers */
++ ath_dbg(common, BEACON, "IBSS nexttbtt: %u intval: %u conf_intval: %u\n",
++ nexttbtt, intval, conf->beacon_interval);
+
+- ath9k_hw_disable_interrupts(ah);
+ ath9k_beacon_init(sc, nexttbtt, intval);
+- sc->beacon.bmisscnt = 0;
+-
+- ath9k_hw_set_interrupts(ah);
+- ath9k_hw_enable_interrupts(ah);
+ }
+
+-static bool ath9k_allow_beacon_config(struct ath_softc *sc,
+- struct ieee80211_vif *vif)
++bool ath9k_allow_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
+ {
+- struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+- struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
+ struct ath_vif *avp = (void *)vif->drv_priv;
+
+- /*
+- * Can not have different beacon interval on multiple
+- * AP interface case
+- */
+- if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
+- (sc->nbcnvifs > 1) &&
+- (vif->type == NL80211_IFTYPE_AP) &&
+- (cur_conf->beacon_interval != bss_conf->beacon_int)) {
+- ath_dbg(common, CONFIG,
+- "Changing beacon interval of multiple AP interfaces !\n");
+- return false;
+- }
+- /*
+- * Can not configure station vif's beacon config
+- * while on AP opmode
+- */
+- if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
+- (vif->type != NL80211_IFTYPE_AP)) {
+- ath_dbg(common, CONFIG,
+- "STA vif's beacon not allowed on AP mode\n");
+- return false;
++ if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
++ if ((vif->type != NL80211_IFTYPE_AP) ||
++ (sc->nbcnvifs > 1)) {
++ ath_dbg(common, CONFIG,
++ "An AP interface is already present !\n");
++ return false;
++ }
+ }
+- /*
+- * Do not allow beacon config if HW was already configured
+- * with another STA vif
+- */
+- if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
+- (vif->type == NL80211_IFTYPE_STATION) &&
+- test_bit(SC_OP_BEACONS, &sc->sc_flags) &&
+- !avp->primary_sta_vif) {
+- ath_dbg(common, CONFIG,
+- "Beacon already configured for a station interface\n");
+- return false;
++
++ if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) {
++ if ((vif->type == NL80211_IFTYPE_STATION) &&
++ test_bit(SC_OP_BEACONS, &sc->sc_flags) &&
++ !avp->primary_sta_vif) {
++ ath_dbg(common, CONFIG,
++ "Beacon already configured for a station interface\n");
++ return false;
++ }
}
---- a/drivers/net/wireless/ath/ath9k/common.c
-+++ b/drivers/net/wireless/ath/ath9k/common.c
-@@ -161,10 +161,12 @@ EXPORT_SYMBOL(ath9k_cmn_count_streams);
- void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
- u16 new_txpow, u16 *txpower)
++
+ return true;
+ }
+
+-void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
++static void ath9k_cache_beacon_config(struct ath_softc *sc,
++ struct ieee80211_bss_conf *bss_conf)
+ {
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+- struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
+
+- if (!ath9k_allow_beacon_config(sc, vif))
+- return;
++ ath_dbg(common, BEACON,
++ "Caching beacon data for BSS: %pM\n", bss_conf->bssid);
+
+- /* Setup the beacon configuration parameters */
+ cur_conf->beacon_interval = bss_conf->beacon_int;
+ cur_conf->dtim_period = bss_conf->dtim_period;
+ cur_conf->listen_interval = 1;
+@@ -769,73 +659,59 @@ void ath_beacon_config(struct ath_softc
+ if (cur_conf->dtim_period == 0)
+ cur_conf->dtim_period = 1;
+
+- ath_set_beacon(sc);
+ }
+
+-static bool ath_has_valid_bslot(struct ath_softc *sc)
++void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
++ u32 changed)
{
-- if (cur_txpow != new_txpow) {
-+ struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
+- struct ath_vif *avp;
+- int slot;
+- bool found = false;
++ struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
++ struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+
+- for (slot = 0; slot < ATH_BCBUF; slot++) {
+- if (sc->beacon.bslot[slot]) {
+- avp = (void *)sc->beacon.bslot[slot]->drv_priv;
+- if (avp->is_bslot_active) {
+- found = true;
+- break;
+- }
++ ath9k_cache_beacon_config(sc, bss_conf);
++
++ if (sc->sc_ah->opmode == NL80211_IFTYPE_STATION) {
++ ath9k_set_beacon(sc);
++ set_bit(SC_OP_BEACONS, &sc->sc_flags);
++ } else {
++ /*
++ * Take care of multiple interfaces when
++ * enabling/disabling SWBA.
++ */
++ if (changed & BSS_CHANGED_BEACON_ENABLED) {
++ if (!bss_conf->enable_beacon &&
++ (sc->nbcnvifs <= 1))
++ cur_conf->enable_beacon = false;
++ else if (bss_conf->enable_beacon)
++ cur_conf->enable_beacon = true;
+ }
+
-+ if (reg->power_limit != new_txpow) {
- ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
- /* read back in case value is clamped */
-- *txpower = ath9k_hw_regulatory(ah)->power_limit;
-+ *txpower = reg->max_power_level;
++ ath9k_set_beacon(sc);
++
++ if (cur_conf->enable_beacon)
++ set_bit(SC_OP_BEACONS, &sc->sc_flags);
++ else
++ clear_bit(SC_OP_BEACONS, &sc->sc_flags);
+ }
+- return found;
+ }
+
+-
+-void ath_set_beacon(struct ath_softc *sc)
++void ath9k_set_beacon(struct ath_softc *sc)
+ {
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+ struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+
+ switch (sc->sc_ah->opmode) {
+ case NL80211_IFTYPE_AP:
+- if (ath_has_valid_bslot(sc))
+- ath_beacon_config_ap(sc, cur_conf);
++ ath9k_beacon_config_ap(sc, cur_conf);
+ break;
+ case NL80211_IFTYPE_ADHOC:
+ case NL80211_IFTYPE_MESH_POINT:
+- ath_beacon_config_adhoc(sc, cur_conf);
++ ath9k_beacon_config_adhoc(sc, cur_conf);
+ break;
+ case NL80211_IFTYPE_STATION:
+- ath_beacon_config_sta(sc, cur_conf);
++ ath9k_beacon_config_sta(sc, cur_conf);
+ break;
+ default:
+ ath_dbg(common, CONFIG, "Unsupported beaconing mode\n");
+ return;
}
+-
+- set_bit(SC_OP_BEACONS, &sc->sc_flags);
+-}
+-
+-void ath9k_set_beaconing_status(struct ath_softc *sc, bool status)
+-{
+- struct ath_hw *ah = sc->sc_ah;
+-
+- if (!ath_has_valid_bslot(sc)) {
+- clear_bit(SC_OP_BEACONS, &sc->sc_flags);
+- return;
+- }
+-
+- ath9k_ps_wakeup(sc);
+- if (status) {
+- /* Re-enable beaconing */
+- ah->imask |= ATH9K_INT_SWBA;
+- ath9k_hw_set_interrupts(ah);
+- } else {
+- /* Disable SWBA interrupt */
+- ah->imask &= ~ATH9K_INT_SWBA;
+- ath9k_hw_set_interrupts(ah);
+- tasklet_kill(&sc->bcon_tasklet);
+- ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
+- }
+- ath9k_ps_restore(sc);
}
- EXPORT_SYMBOL(ath9k_cmn_update_txpow);
+--- a/drivers/net/wireless/ath/ath9k/calib.h
++++ b/drivers/net/wireless/ath/ath9k/calib.h
+@@ -30,10 +30,10 @@ struct ar5416IniArray {
+ u32 ia_columns;
+ };
+
+-#define INIT_INI_ARRAY(iniarray, array, rows, columns) do { \
++#define INIT_INI_ARRAY(iniarray, array) do { \
+ (iniarray)->ia_array = (u32 *)(array); \
+- (iniarray)->ia_rows = (rows); \
+- (iniarray)->ia_columns = (columns); \
++ (iniarray)->ia_rows = ARRAY_SIZE(array); \
++ (iniarray)->ia_columns = ARRAY_SIZE(array[0]); \
+ } while (0)
+
+ #define INI_RA(iniarray, row, column) \
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -523,9 +523,22 @@ static ssize_t read_file_wiphy(struct fi
- if (tmp & ATH9K_RX_FILTER_PHYRADAR)
- len += snprintf(buf + len, sizeof(buf) - len, " PHYRADAR");
- if (tmp & ATH9K_RX_FILTER_MCAST_BCAST_ALL)
-- len += snprintf(buf + len, sizeof(buf) - len, " MCAST_BCAST_ALL\n");
-- else
-- len += snprintf(buf + len, sizeof(buf) - len, "\n");
-+ len += snprintf(buf + len, sizeof(buf) - len, " MCAST_BCAST_ALL");
-+
-+ len += snprintf(buf + len, sizeof(buf) - len,
-+ "\n\nReset causes:\n"
-+ " baseband hang: %d\n"
-+ " baseband watchdog: %d\n"
-+ " fatal hardware error interrupt: %d\n"
-+ " tx hardware error: %d\n"
-+ " tx path hang: %d\n"
-+ " pll rx hang: %d\n",
-+ sc->debug.stats.reset[RESET_TYPE_BB_HANG],
-+ sc->debug.stats.reset[RESET_TYPE_BB_WATCHDOG],
-+ sc->debug.stats.reset[RESET_TYPE_FATAL_INT],
-+ sc->debug.stats.reset[RESET_TYPE_TX_ERROR],
-+ sc->debug.stats.reset[RESET_TYPE_TX_HANG],
-+ sc->debug.stats.reset[RESET_TYPE_PLL_HANG]);
-
- if (len > sizeof(buf))
- len = sizeof(buf);
+@@ -206,10 +206,9 @@ static ssize_t write_file_disable_ani(st
+
+ if (disable_ani) {
+ clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- del_timer_sync(&common->ani.timer);
++ ath_stop_ani(sc);
+ } else {
+- set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- ath_start_ani(common);
++ ath_check_ani(sc);
+ }
+
+ return count;
+@@ -1556,6 +1555,14 @@ int ath9k_init_debug(struct ath_hw *ah)
+ &fops_interrupt);
+ debugfs_create_file("xmit", S_IRUSR, sc->debug.debugfs_phy, sc,
+ &fops_xmit);
++ debugfs_create_u32("qlen_bk", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_BK]);
++ debugfs_create_u32("qlen_be", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_BE]);
++ debugfs_create_u32("qlen_vi", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_VI]);
++ debugfs_create_u32("qlen_vo", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
++ &sc->tx.txq_max_pending[WME_AC_VO]);
+ debugfs_create_file("stations", S_IRUSR, sc->debug.debugfs_phy, sc,
+ &fops_stations);
+ debugfs_create_file("misc", S_IRUSR, sc->debug.debugfs_phy, sc,
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
-@@ -25,8 +25,10 @@ struct ath_buf;
-
- #ifdef CONFIG_ATH9K_DEBUGFS
- #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
-+#define RESET_STAT_INC(sc, type) sc->debug.stats.reset[type]++
- #else
- #define TX_STAT_INC(q, c) do { } while (0)
-+#define RESET_STAT_INC(sc, type) do { } while (0)
+@@ -32,6 +32,19 @@ struct ath_buf;
+ #define RESET_STAT_INC(sc, type) do { } while (0)
#endif
- #ifdef CONFIG_ATH9K_DEBUGFS
-@@ -171,10 +173,21 @@ struct ath_rx_stats {
- u8 rs_antenna;
- };
-
+enum ath_reset_type {
+ RESET_TYPE_BB_HANG,
+ RESET_TYPE_BB_WATCHDOG,
+ RESET_TYPE_TX_ERROR,
+ RESET_TYPE_TX_HANG,
+ RESET_TYPE_PLL_HANG,
++ RESET_TYPE_MAC_HANG,
++ RESET_TYPE_BEACON_STUCK,
++ RESET_TYPE_MCI,
+ __RESET_TYPE_MAX
+};
+
+ #ifdef CONFIG_ATH9K_DEBUGFS
+
+ /**
+@@ -209,17 +222,6 @@ struct ath_rx_stats {
+ u32 rx_frags;
+ };
+
+-enum ath_reset_type {
+- RESET_TYPE_BB_HANG,
+- RESET_TYPE_BB_WATCHDOG,
+- RESET_TYPE_FATAL_INT,
+- RESET_TYPE_TX_ERROR,
+- RESET_TYPE_TX_HANG,
+- RESET_TYPE_PLL_HANG,
+- RESET_TYPE_MAC_HANG,
+- __RESET_TYPE_MAX
+-};
+-
struct ath_stats {
struct ath_interrupt_stats istats;
struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
- struct ath_rx_stats rxstats;
-+ u32 reset[__RESET_TYPE_MAX];
- };
-
- #define ATH_DBG_MAX_SAMPLES 10
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
-@@ -108,7 +108,7 @@
- #define EEP_RFSILENT_ENABLED_S 0
- #define EEP_RFSILENT_POLARITY 0x0002
- #define EEP_RFSILENT_POLARITY_S 1
--#define EEP_RFSILENT_GPIO_SEL (AR_SREV_9480(ah) ? 0x00fc : 0x001c)
-+#define EEP_RFSILENT_GPIO_SEL (AR_SREV_9462(ah) ? 0x00fc : 0x001c)
- #define EEP_RFSILENT_GPIO_SEL_S 2
-
- #define AR5416_OPFLAGS_11A 0x01
-@@ -220,7 +220,6 @@ enum eeprom_param {
- EEP_MAC_MID,
- EEP_MAC_LSW,
- EEP_REG_0,
-- EEP_REG_1,
- EEP_OP_CAP,
- EEP_OP_MODE,
- EEP_RF_SILENT,
-@@ -248,7 +247,9 @@ enum eeprom_param {
+@@ -241,16 +241,12 @@ enum eeprom_param {
+ EEP_TEMPSENSE_SLOPE,
+ EEP_TEMPSENSE_SLOPE_PAL_ON,
+ EEP_PWR_TABLE_OFFSET,
+- EEP_DRIVE_STRENGTH,
+- EEP_INTERNAL_REGULATOR,
+- EEP_SWREG,
EEP_PAPRD,
EEP_MODAL_VER,
EEP_ANT_DIV_CTL1,
-- EEP_CHAIN_MASK_REDUCE
-+ EEP_CHAIN_MASK_REDUCE,
-+ EEP_ANTENNA_GAIN_2G,
-+ EEP_ANTENNA_GAIN_5G
+ EEP_CHAIN_MASK_REDUCE,
+ EEP_ANTENNA_GAIN_2G,
+ EEP_ANTENNA_GAIN_5G,
+- EEP_QUICK_DROP
};
enum ar5416_rates {
-@@ -652,8 +653,7 @@ struct eeprom_ops {
- void (*set_addac)(struct ath_hw *hw, struct ath9k_channel *chan);
- void (*set_txpower)(struct ath_hw *hw, struct ath9k_channel *chan,
- u16 cfgCtl, u8 twiceAntennaReduction,
-- u8 twiceMaxRegulatoryPower, u8 powerLimit,
-- bool test);
-+ u8 powerLimit, bool test);
- u16 (*get_spur_channel)(struct ath_hw *ah, u16 i, bool is2GHz);
- };
-
---- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-@@ -322,8 +322,6 @@ static u32 ath9k_hw_4k_get_eeprom(struct
- return get_unaligned_be16(pBase->macAddr + 4);
- case EEP_REG_0:
- return pBase->regDmn[0];
-- case EEP_REG_1:
-- return pBase->regDmn[1];
- case EEP_OP_CAP:
- return pBase->deviceCap;
- case EEP_OP_MODE:
-@@ -350,6 +348,8 @@ static u32 ath9k_hw_4k_get_eeprom(struct
- return pModal->antdiv_ctl1;
- case EEP_TXGAIN_TYPE:
- return pBase->txGainType;
-+ case EEP_ANTENNA_GAIN_2G:
-+ return pModal->antennaGainCh[0];
- default:
- return 0;
+--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
++++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+@@ -1111,7 +1111,7 @@ static int ath9k_htc_add_interface(struc
+
+ if ((priv->ah->opmode == NL80211_IFTYPE_AP) &&
+ !test_bit(OP_ANI_RUNNING, &priv->op_flags)) {
+- ath9k_hw_set_tsfadjust(priv->ah, 1);
++ ath9k_hw_set_tsfadjust(priv->ah, true);
+ ath9k_htc_start_ani(priv);
}
-@@ -462,8 +462,7 @@ static void ath9k_hw_set_4k_power_per_ra
- struct ath9k_channel *chan,
- int16_t *ratesArray,
- u16 cfgCtl,
-- u16 AntennaReduction,
-- u16 twiceMaxRegulatoryPower,
-+ u16 antenna_reduction,
- u16 powerLimit)
- {
- #define CMP_TEST_GRP \
-@@ -472,20 +471,16 @@ static void ath9k_hw_set_4k_power_per_ra
- || (((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == \
- ((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL))
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- int i;
-- int16_t twiceLargestAntenna;
- u16 twiceMinEdgePower;
- u16 twiceMaxEdgePower = MAX_RATE_POWER;
-- u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+ u16 scaledPower = 0, minCtlPower;
- u16 numCtlModes;
- const u16 *pCtlMode;
- u16 ctlMode, freq;
- struct chan_centers centers;
- struct cal_ctl_data_4k *rep;
- struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
-- static const u16 tpScaleReductionTable[5] =
-- { 0, 3, 6, 9, MAX_RATE_POWER };
- struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
- 0, { 0, 0, 0, 0}
- };
-@@ -503,19 +498,7 @@ static void ath9k_hw_set_4k_power_per_ra
-
- ath9k_hw_get_channel_centers(ah, chan, ¢ers);
-
-- twiceLargestAntenna = pEepData->modalHeader.antennaGainCh[0];
-- twiceLargestAntenna = (int16_t)min(AntennaReduction -
-- twiceLargestAntenna, 0);
--
-- maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
-- if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
-- maxRegAllowedPower -=
-- (tpScaleReductionTable[(regulatory->tp_scale)] * 2);
-- }
--
-- scaledPower = min(powerLimit, maxRegAllowedPower);
-- scaledPower = max((u16)0, scaledPower);
--
-+ scaledPower = powerLimit - antenna_reduction;
- numCtlModes = ARRAY_SIZE(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40;
- pCtlMode = ctlModesFor11g;
-
-@@ -671,7 +654,6 @@ static void ath9k_hw_4k_set_txpower(stru
- struct ath9k_channel *chan,
- u16 cfgCtl,
- u8 twiceAntennaReduction,
-- u8 twiceMaxRegulatoryPower,
- u8 powerLimit, bool test)
- {
- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-@@ -691,7 +673,6 @@ static void ath9k_hw_4k_set_txpower(stru
- ath9k_hw_set_4k_power_per_rate_table(ah, chan,
- &ratesArray[0], cfgCtl,
- twiceAntennaReduction,
-- twiceMaxRegulatoryPower,
- powerLimit);
-
- ath9k_hw_set_4k_power_cal_table(ah, chan);
---- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-@@ -308,8 +308,6 @@ static u32 ath9k_hw_ar9287_get_eeprom(st
- return get_unaligned_be16(pBase->macAddr + 4);
- case EEP_REG_0:
- return pBase->regDmn[0];
-- case EEP_REG_1:
-- return pBase->regDmn[1];
- case EEP_OP_CAP:
- return pBase->deviceCap;
- case EEP_OP_MODE:
-@@ -336,6 +334,9 @@ static u32 ath9k_hw_ar9287_get_eeprom(st
- return pBase->tempSensSlopePalOn;
- else
- return 0;
-+ case EEP_ANTENNA_GAIN_2G:
-+ return max_t(u8, pModal->antennaGainCh[0],
-+ pModal->antennaGainCh[1]);
- default:
- return 0;
- }
-@@ -554,8 +555,7 @@ static void ath9k_hw_set_ar9287_power_pe
- struct ath9k_channel *chan,
- int16_t *ratesArray,
- u16 cfgCtl,
-- u16 AntennaReduction,
-- u16 twiceMaxRegulatoryPower,
-+ u16 antenna_reduction,
- u16 powerLimit)
- {
- #define CMP_CTL \
-@@ -569,12 +569,8 @@ static void ath9k_hw_set_ar9287_power_pe
- #define REDUCE_SCALED_POWER_BY_TWO_CHAIN 6
- #define REDUCE_SCALED_POWER_BY_THREE_CHAIN 10
-
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- u16 twiceMaxEdgePower = MAX_RATE_POWER;
-- static const u16 tpScaleReductionTable[5] =
-- { 0, 3, 6, 9, MAX_RATE_POWER };
- int i;
-- int16_t twiceLargestAntenna;
- struct cal_ctl_data_ar9287 *rep;
- struct cal_target_power_leg targetPowerOfdm = {0, {0, 0, 0, 0} },
- targetPowerCck = {0, {0, 0, 0, 0} };
-@@ -582,7 +578,7 @@ static void ath9k_hw_set_ar9287_power_pe
- targetPowerCckExt = {0, {0, 0, 0, 0} };
- struct cal_target_power_ht targetPowerHt20,
- targetPowerHt40 = {0, {0, 0, 0, 0} };
-- u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+ u16 scaledPower = 0, minCtlPower;
- static const u16 ctlModesFor11g[] = {
- CTL_11B, CTL_11G, CTL_2GHT20,
- CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
-@@ -597,24 +593,7 @@ static void ath9k_hw_set_ar9287_power_pe
- tx_chainmask = ah->txchainmask;
-
- ath9k_hw_get_channel_centers(ah, chan, ¢ers);
--
-- /* Compute TxPower reduction due to Antenna Gain */
-- twiceLargestAntenna = max(pEepData->modalHeader.antennaGainCh[0],
-- pEepData->modalHeader.antennaGainCh[1]);
-- twiceLargestAntenna = (int16_t)min((AntennaReduction) -
-- twiceLargestAntenna, 0);
--
-- /*
-- * scaledPower is the minimum of the user input power level
-- * and the regulatory allowed power level.
-- */
-- maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
--
-- if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX)
-- maxRegAllowedPower -=
-- (tpScaleReductionTable[(regulatory->tp_scale)] * 2);
+@@ -1351,7 +1351,7 @@ static int ath9k_htc_conf_tx(struct ieee
+ qi.tqi_aifs = params->aifs;
+ qi.tqi_cwmin = params->cw_min;
+ qi.tqi_cwmax = params->cw_max;
+- qi.tqi_burstTime = params->txop;
++ qi.tqi_burstTime = params->txop * 32;
+
+ qnum = get_hw_qnum(queue, priv->hwq_map);
+
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -671,10 +671,6 @@ static int __ath9k_hw_init(struct ath_hw
+ if (!AR_SREV_9300_20_OR_LATER(ah))
+ ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
+
+- /* disable ANI for 9340 */
+- if (AR_SREV_9340(ah))
+- ah->config.enable_ani = false;
-
-- scaledPower = min(powerLimit, maxRegAllowedPower);
-+ scaledPower = powerLimit - antenna_reduction;
+ ath9k_hw_init_mode_regs(ah);
- /*
- * Reduce scaled Power by number of chains active
-@@ -815,7 +794,6 @@ static void ath9k_hw_set_ar9287_power_pe
- static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,
- struct ath9k_channel *chan, u16 cfgCtl,
- u8 twiceAntennaReduction,
-- u8 twiceMaxRegulatoryPower,
- u8 powerLimit, bool test)
+ if (!ah->is_pciexpress)
+@@ -2916,9 +2912,9 @@ void ath9k_hw_reset_tsf(struct ath_hw *a
+ }
+ EXPORT_SYMBOL(ath9k_hw_reset_tsf);
+
+-void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting)
++void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set)
{
- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-@@ -834,7 +812,6 @@ static void ath9k_hw_ar9287_set_txpower(
- ath9k_hw_set_ar9287_power_per_rate_table(ah, chan,
- &ratesArray[0], cfgCtl,
- twiceAntennaReduction,
-- twiceMaxRegulatoryPower,
- powerLimit);
-
- ath9k_hw_set_ar9287_power_cal_table(ah, chan);
---- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
-@@ -400,6 +400,7 @@ static u32 ath9k_hw_def_get_eeprom(struc
- struct ar5416_eeprom_def *eep = &ah->eeprom.def;
- struct modal_eep_header *pModal = eep->modalHeader;
- struct base_eep_header *pBase = &eep->baseEepHeader;
-+ int band = 0;
-
- switch (param) {
- case EEP_NFTHRESH_5:
-@@ -414,8 +415,6 @@ static u32 ath9k_hw_def_get_eeprom(struc
- return get_unaligned_be16(pBase->macAddr + 4);
- case EEP_REG_0:
- return pBase->regDmn[0];
-- case EEP_REG_1:
-- return pBase->regDmn[1];
- case EEP_OP_CAP:
- return pBase->deviceCap;
- case EEP_OP_MODE:
-@@ -467,6 +466,14 @@ static u32 ath9k_hw_def_get_eeprom(struc
- return pBase->pwr_table_offset;
- else
- return AR5416_PWR_TABLE_OFFSET_DB;
-+ case EEP_ANTENNA_GAIN_2G:
-+ band = 1;
-+ /* fall through */
-+ case EEP_ANTENNA_GAIN_5G:
-+ return max_t(u8, max_t(u8,
-+ pModal[band].antennaGainCh[0],
-+ pModal[band].antennaGainCh[1]),
-+ pModal[band].antennaGainCh[2]);
- default:
- return 0;
+- if (setting)
++ if (set)
+ ah->misc_mode |= AR_PCU_TX_ADD_TSF;
+ else
+ ah->misc_mode &= ~AR_PCU_TX_ADD_TSF;
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -994,7 +994,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
+ u64 ath9k_hw_gettsf64(struct ath_hw *ah);
+ void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
+ void ath9k_hw_reset_tsf(struct ath_hw *ah);
+-void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
++void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set);
+ void ath9k_hw_init_global_settings(struct ath_hw *ah);
+ u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
+ void ath9k_hw_set11nmac2040(struct ath_hw *ah);
+--- a/drivers/net/wireless/ath/ath9k/init.c
++++ b/drivers/net/wireless/ath/ath9k/init.c
+@@ -436,6 +436,7 @@ static int ath9k_init_queues(struct ath_
+ for (i = 0; i < WME_NUM_AC; i++) {
+ sc->tx.txq_map[i] = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, i);
+ sc->tx.txq_map[i]->mac80211_qnum = i;
++ sc->tx.txq_max_pending[i] = ATH_MAX_QDEPTH;
}
-@@ -986,21 +993,15 @@ static void ath9k_hw_set_def_power_per_r
- struct ath9k_channel *chan,
- int16_t *ratesArray,
- u16 cfgCtl,
-- u16 AntennaReduction,
-- u16 twiceMaxRegulatoryPower,
-+ u16 antenna_reduction,
- u16 powerLimit)
- {
- #define REDUCE_SCALED_POWER_BY_TWO_CHAIN 6 /* 10*log10(2)*2 */
- #define REDUCE_SCALED_POWER_BY_THREE_CHAIN 9 /* 10*log10(3)*2 */
-
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- struct ar5416_eeprom_def *pEepData = &ah->eeprom.def;
- u16 twiceMaxEdgePower = MAX_RATE_POWER;
-- static const u16 tpScaleReductionTable[5] =
-- { 0, 3, 6, 9, MAX_RATE_POWER };
--
- int i;
-- int16_t twiceLargestAntenna;
- struct cal_ctl_data *rep;
- struct cal_target_power_leg targetPowerOfdm, targetPowerCck = {
- 0, { 0, 0, 0, 0}
-@@ -1012,7 +1013,7 @@ static void ath9k_hw_set_def_power_per_r
- struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = {
- 0, {0, 0, 0, 0}
- };
-- u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
-+ u16 scaledPower = 0, minCtlPower;
- static const u16 ctlModesFor11a[] = {
- CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
- };
-@@ -1031,27 +1032,7 @@ static void ath9k_hw_set_def_power_per_r
-
- ath9k_hw_get_channel_centers(ah, chan, ¢ers);
-
-- twiceLargestAntenna = max(
-- pEepData->modalHeader
-- [IS_CHAN_2GHZ(chan)].antennaGainCh[0],
-- pEepData->modalHeader
-- [IS_CHAN_2GHZ(chan)].antennaGainCh[1]);
--
-- twiceLargestAntenna = max((u8)twiceLargestAntenna,
-- pEepData->modalHeader
-- [IS_CHAN_2GHZ(chan)].antennaGainCh[2]);
--
-- twiceLargestAntenna = (int16_t)min(AntennaReduction -
-- twiceLargestAntenna, 0);
--
-- maxRegAllowedPower = twiceMaxRegulatoryPower + twiceLargestAntenna;
--
-- if (regulatory->tp_scale != ATH9K_TP_SCALE_MAX) {
-- maxRegAllowedPower -=
-- (tpScaleReductionTable[(regulatory->tp_scale)] * 2);
-- }
--
-- scaledPower = min(powerLimit, maxRegAllowedPower);
-+ scaledPower = powerLimit - antenna_reduction;
-
- switch (ar5416_get_ntxchains(tx_chainmask)) {
- case 1:
-@@ -1256,7 +1237,6 @@ static void ath9k_hw_def_set_txpower(str
- struct ath9k_channel *chan,
- u16 cfgCtl,
- u8 twiceAntennaReduction,
-- u8 twiceMaxRegulatoryPower,
- u8 powerLimit, bool test)
- {
- #define RT_AR_DELTA(x) (ratesArray[x] - cck_ofdm_delta)
-@@ -1278,7 +1258,6 @@ static void ath9k_hw_def_set_txpower(str
- ath9k_hw_set_def_power_per_rate_table(ah, chan,
- &ratesArray[0], cfgCtl,
- twiceAntennaReduction,
-- twiceMaxRegulatoryPower,
- powerLimit);
-
- ath9k_hw_set_def_power_cal_table(ah, chan);
---- a/drivers/net/wireless/ath/ath9k/gpio.c
-+++ b/drivers/net/wireless/ath/ath9k/gpio.c
-@@ -48,8 +48,8 @@ void ath_init_leds(struct ath_softc *sc)
- sc->sc_ah->led_pin = ATH_LED_PIN_9485;
- else if (AR_SREV_9300(sc->sc_ah))
- sc->sc_ah->led_pin = ATH_LED_PIN_9300;
-- else if (AR_SREV_9480(sc->sc_ah))
-- sc->sc_ah->led_pin = ATH_LED_PIN_9480;
-+ else if (AR_SREV_9462(sc->sc_ah))
-+ sc->sc_ah->led_pin = ATH_LED_PIN_9462;
- else
- sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
+ return 0;
+ }
+@@ -560,7 +561,7 @@ static int ath9k_init_softc(u16 devid, s
+ spin_lock_init(&sc->debug.samp_lock);
+ #endif
+ tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
+- tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
++ tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
+ (unsigned long)sc);
+
+ INIT_WORK(&sc->hw_reset_work, ath_reset_work);
+--- a/drivers/net/wireless/ath/ath9k/link.c
++++ b/drivers/net/wireless/ath/ath9k/link.c
+@@ -50,8 +50,7 @@ void ath_tx_complete_poll_work(struct wo
+ if (needreset) {
+ ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
+ "tx hung, resetting the chip\n");
+- RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
+- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++ ath9k_queue_reset(sc, RESET_TYPE_TX_HANG);
+ return;
}
-@@ -155,7 +155,7 @@ static void ath9k_gen_timer_start(struct
- if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
- ath9k_hw_disable_interrupts(ah);
- ah->imask |= ATH9K_INT_GENTIMER;
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
- ath9k_hw_enable_interrupts(ah);
+
+@@ -69,6 +68,7 @@ void ath_hw_check(struct work_struct *wo
+ unsigned long flags;
+ int busy;
+ u8 is_alive, nbeacon = 1;
++ enum ath_reset_type type;
+
+ ath9k_ps_wakeup(sc);
+ is_alive = ath9k_hw_check_alive(sc->sc_ah);
+@@ -78,7 +78,7 @@ void ath_hw_check(struct work_struct *wo
+ else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
+ ath_dbg(common, RESET,
+ "DCU stuck is detected. Schedule chip reset\n");
+- RESET_STAT_INC(sc, RESET_TYPE_MAC_HANG);
++ type = RESET_TYPE_MAC_HANG;
+ goto sched_reset;
}
+
+@@ -90,7 +90,7 @@ void ath_hw_check(struct work_struct *wo
+ busy, sc->hw_busy_count + 1);
+ if (busy >= 99) {
+ if (++sc->hw_busy_count >= 3) {
+- RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
++ type = RESET_TYPE_BB_HANG;
+ goto sched_reset;
+ }
+ } else if (busy >= 0) {
+@@ -102,7 +102,7 @@ void ath_hw_check(struct work_struct *wo
+ goto out;
+
+ sched_reset:
+- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++ ath9k_queue_reset(sc, type);
+ out:
+ ath9k_ps_restore(sc);
}
-@@ -170,7 +170,7 @@ static void ath9k_gen_timer_stop(struct
- if (timer_table->timer_mask.val == 0) {
- ath9k_hw_disable_interrupts(ah);
- ah->imask &= ~ATH9K_INT_GENTIMER;
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
- ath9k_hw_enable_interrupts(ah);
+@@ -119,8 +119,7 @@ static bool ath_hw_pll_rx_hang_check(str
+ count++;
+ if (count == 3) {
+ ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
+- RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
+- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++ ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG);
+ count = 0;
+ return true;
+ }
+@@ -432,26 +431,69 @@ set_timer:
}
}
---- a/drivers/net/wireless/ath/ath9k/hw-ops.h
-+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
-@@ -205,4 +205,11 @@ static inline void ath9k_hw_setup_calibr
- ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
- }
-
-+static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
-+ struct ath9k_channel *chan,
-+ u8 *ini_reloaded)
-+{
-+ return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
-+ ini_reloaded);
-+}
- #endif /* ATH9K_HW_OPS_H */
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -285,7 +285,7 @@ static void ath9k_hw_read_revisions(stru
- (val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S;
- ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
-- if (AR_SREV_9480(ah))
-+ if (AR_SREV_9462(ah))
- ah->is_pciexpress = true;
- else
- ah->is_pciexpress = (val &
-@@ -433,7 +433,6 @@ static void ath9k_hw_init_defaults(struc
+-void ath_start_ani(struct ath_common *common)
++void ath_start_ani(struct ath_softc *sc)
+ {
+- struct ath_hw *ah = common->ah;
++ struct ath_hw *ah = sc->sc_ah;
++ struct ath_common *common = ath9k_hw_common(ah);
+ unsigned long timestamp = jiffies_to_msecs(jiffies);
+- struct ath_softc *sc = (struct ath_softc *) common->priv;
+
+- if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags))
+- return;
+-
+- if (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
++ if (common->disable_ani ||
++ !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) ||
++ (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
+ return;
- regulatory->country_code = CTRY_DEFAULT;
- regulatory->power_limit = MAX_RATE_POWER;
-- regulatory->tp_scale = ATH9K_TP_SCALE_MAX;
+ common->ani.longcal_timer = timestamp;
+ common->ani.shortcal_timer = timestamp;
+ common->ani.checkani_timer = timestamp;
- ah->hw_version.magic = AR5416_MAGIC;
- ah->hw_version.subvendorid = 0;
-@@ -542,6 +541,9 @@ static int __ath9k_hw_init(struct ath_hw
- return -EIO;
- }
++ ath_dbg(common, ANI, "Starting ANI\n");
+ mod_timer(&common->ani.timer,
+ jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
+ }
-+ if (AR_SREV_9462(ah))
-+ ah->WARegVal &= ~AR_WA_D3_L1_DISABLE;
-+
- ath9k_hw_init_defaults(ah);
- ath9k_hw_init_config(ah);
-
-@@ -585,7 +587,7 @@ static int __ath9k_hw_init(struct ath_hw
- case AR_SREV_VERSION_9330:
- case AR_SREV_VERSION_9485:
- case AR_SREV_VERSION_9340:
-- case AR_SREV_VERSION_9480:
-+ case AR_SREV_VERSION_9462:
- break;
- default:
- ath_err(common,
-@@ -670,7 +672,7 @@ int ath9k_hw_init(struct ath_hw *ah)
- case AR9300_DEVID_AR9330:
- case AR9300_DEVID_AR9340:
- case AR9300_DEVID_AR9580:
-- case AR9300_DEVID_AR9480:
-+ case AR9300_DEVID_AR9462:
- break;
- default:
- if (common->bus_ops->ath_bus_type == ATH_USB)
-@@ -1389,11 +1391,17 @@ static bool ath9k_hw_chip_reset(struct a
- static bool ath9k_hw_channel_change(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
- struct ath_common *common = ath9k_hw_common(ah);
-- struct ieee80211_channel *channel = chan->chan;
- u32 qnum;
- int r;
-+ bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
-+ bool band_switch, mode_diff;
-+ u8 ini_reloaded;
++void ath_stop_ani(struct ath_softc *sc)
++{
++ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+
-+ band_switch = (chan->channelFlags & (CHANNEL_2GHZ | CHANNEL_5GHZ)) !=
-+ (ah->curchan->channelFlags & (CHANNEL_2GHZ |
-+ CHANNEL_5GHZ));
-+ mode_diff = (chan->chanmode != ah->curchan->chanmode);
-
- for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
- if (ath9k_hw_numtxpending(ah, qnum)) {
-@@ -1408,6 +1416,18 @@ static bool ath9k_hw_channel_change(stru
- return false;
- }
-
-+ if (edma && (band_switch || mode_diff)) {
-+ ath9k_hw_mark_phy_inactive(ah);
-+ udelay(5);
++ ath_dbg(common, ANI, "Stopping ANI\n");
++ del_timer_sync(&common->ani.timer);
++}
+
-+ ath9k_hw_init_pll(ah, NULL);
++void ath_check_ani(struct ath_softc *sc)
++{
++ struct ath_hw *ah = sc->sc_ah;
++ struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
+
-+ if (ath9k_hw_fast_chan_change(ah, chan, &ini_reloaded)) {
-+ ath_err(common, "Failed to do fast channel change\n");
-+ return false;
++ /*
++ * Check for the various conditions in which ANI has to
++ * be stopped.
++ */
++ if (ah->opmode == NL80211_IFTYPE_ADHOC) {
++ if (!cur_conf->enable_beacon)
++ goto stop_ani;
++ } else if (ah->opmode == NL80211_IFTYPE_AP) {
++ if (!cur_conf->enable_beacon) {
++ /*
++ * Disable ANI only when there are no
++ * associated stations.
++ */
++ if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
++ goto stop_ani;
+ }
++ } else if (ah->opmode == NL80211_IFTYPE_STATION) {
++ if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
++ goto stop_ani;
+ }
+
- ath9k_hw_set_channel_regs(ah, chan);
++ set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
++ ath_start_ani(sc);
++ return;
++
++stop_ani:
++ clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
++ ath_stop_ani(sc);
++}
++
+ void ath_update_survey_nf(struct ath_softc *sc, int channel)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -167,8 +167,6 @@ static void ath_cancel_work(struct ath_s
- r = ath9k_hw_rf_set_freq(ah, chan);
-@@ -1416,14 +1436,7 @@ static bool ath9k_hw_channel_change(stru
- return false;
- }
- ath9k_hw_set_clockrate(ah);
--
-- ah->eep_ops->set_txpower(ah, chan,
-- ath9k_regd_get_ctl(regulatory, chan),
-- channel->max_antenna_gain * 2,
-- channel->max_power * 2,
-- min((u32) MAX_RATE_POWER,
-- (u32) regulatory->power_limit), false);
+ static void ath_restart_work(struct ath_softc *sc)
+ {
+- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-
-+ ath9k_hw_apply_txpower(ah, chan);
- ath9k_hw_rfbus_done(ah);
+ ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
- if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
-@@ -1431,6 +1444,18 @@ static bool ath9k_hw_channel_change(stru
+ if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
+@@ -177,21 +175,18 @@ static void ath_restart_work(struct ath_
+ msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
- ath9k_hw_spur_mitigate_freq(ah, chan);
-
-+ if (edma && (band_switch || mode_diff)) {
-+ ah->ah_flags |= AH_FASTCC;
-+ if (band_switch || ini_reloaded)
-+ ah->eep_ops->set_board_values(ah, chan);
-+
-+ ath9k_hw_init_bb(ah, chan);
-+
-+ if (band_switch || ini_reloaded)
-+ ath9k_hw_init_cal(ah, chan);
-+ ah->ah_flags &= ~AH_FASTCC;
-+ }
-+
- return true;
+ ath_start_rx_poll(sc, 3);
+-
+- if (!common->disable_ani)
+- ath_start_ani(common);
++ ath_start_ani(sc);
}
-@@ -1486,6 +1511,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
- u32 macStaId1;
- u64 tsf = 0;
- int i, r;
-+ bool allow_fbs = false;
+ static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+- struct ath_common *common = ath9k_hw_common(ah);
+ bool ret = true;
- if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
- return -EIO;
-@@ -1504,16 +1530,22 @@ int ath9k_hw_reset(struct ath_hw *ah, st
- }
- ah->noise = ath9k_hw_getchan_noise(ah, chan);
-
-- if ((AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI) ||
-- (AR_SREV_9300_20_OR_LATER(ah) && IS_CHAN_5GHZ(chan)))
-+ if (AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI)
- bChannelChange = false;
-
-+ if (caldata &&
-+ caldata->done_txiqcal_once &&
-+ caldata->done_txclcal_once &&
-+ caldata->rtt_hist.num_readings)
-+ allow_fbs = true;
-+
- if (bChannelChange &&
- (ah->chip_fullsleep != true) &&
- (ah->curchan != NULL) &&
- (chan->channel != ah->curchan->channel) &&
-- ((chan->channelFlags & CHANNEL_ALL) ==
-- (ah->curchan->channelFlags & CHANNEL_ALL))) {
-+ (allow_fbs ||
-+ ((chan->channelFlags & CHANNEL_ALL) ==
-+ (ah->curchan->channelFlags & CHANNEL_ALL)))) {
- if (ath9k_hw_channel_change(ah, chan)) {
- ath9k_hw_loadnf(ah, ah->curchan);
- ath9k_hw_start_nfcal(ah, true);
-@@ -1684,6 +1716,11 @@ int ath9k_hw_reset(struct ath_hw *ah, st
-
- ath9k_hw_init_bb(ah, chan);
-
-+ if (caldata) {
-+ caldata->done_txiqcal_once = false;
-+ caldata->done_txclcal_once = false;
-+ caldata->rtt_hist.num_readings = 0;
-+ }
- if (!ath9k_hw_init_cal(ah, chan))
- return -EIO;
+ ieee80211_stop_queues(sc->hw);
-@@ -1753,7 +1790,7 @@ static void ath9k_set_power_sleep(struct
- {
- REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
- if (setChip) {
-- if (AR_SREV_9480(ah)) {
-+ if (AR_SREV_9462(ah)) {
- REG_WRITE(ah, AR_TIMER_MODE,
- REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00);
- REG_WRITE(ah, AR_NDP2_TIMER_MODE, REG_READ(ah,
-@@ -1771,7 +1808,7 @@ static void ath9k_set_power_sleep(struct
- */
- REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
-
-- if (AR_SREV_9480(ah))
-+ if (AR_SREV_9462(ah))
- udelay(100);
-
- if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
-@@ -1779,15 +1816,14 @@ static void ath9k_set_power_sleep(struct
-
- /* Shutdown chip. Active low */
- if (!AR_SREV_5416(ah) &&
-- !AR_SREV_9271(ah) && !AR_SREV_9480_10(ah)) {
-+ !AR_SREV_9271(ah) && !AR_SREV_9462_10(ah)) {
- REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN);
- udelay(2);
- }
- }
+ sc->hw_busy_count = 0;
+- del_timer_sync(&common->ani.timer);
++ ath_stop_ani(sc);
+ del_timer_sync(&sc->rx_poll_timer);
- /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */
-- if (!AR_SREV_9480(ah))
-- REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
-+ REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
- }
+ ath9k_debug_samp_bb_mac(sc);
+@@ -236,7 +231,7 @@ static bool ath_complete_reset(struct at
+ if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
+ goto work;
- /*
-@@ -1818,7 +1854,7 @@ static void ath9k_set_power_network_slee
- * SYS_WAKING and SYS_SLEEPING messages which will make
- * BT CPU to busy to process.
- */
-- if (AR_SREV_9480(ah)) {
-+ if (AR_SREV_9462(ah)) {
- val = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_EN) &
- ~AR_MCI_INTERRUPT_RX_HW_MSG_MASK;
- REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, val);
-@@ -1830,7 +1866,7 @@ static void ath9k_set_power_network_slee
- REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,
- AR_RTC_FORCE_WAKE_EN);
-
-- if (AR_SREV_9480(ah))
-+ if (AR_SREV_9462(ah))
- udelay(30);
- }
- }
-@@ -2082,11 +2118,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw
- eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
- regulatory->current_rd = eeval;
-
-- eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1);
-- if (AR_SREV_9285_12_OR_LATER(ah))
-- eeval |= AR9285_RDEXT_DEFAULT;
-- regulatory->current_rd_ext = eeval;
--
- if (ah->opmode != NL80211_IFTYPE_AP &&
- ah->hw_version.subvendorid == AR_SUBVENDOR_ID_NEW_A) {
- if (regulatory->current_rd == 0x64 ||
-@@ -2294,6 +2325,14 @@ int ath9k_hw_fill_cap_info(struct ath_hw
- rx_chainmask >>= 1;
- }
+- ath_set_beacon(sc);
++ ath9k_set_beacon(sc);
-+ if (AR_SREV_9300_20_OR_LATER(ah)) {
-+ ah->enabled_cals |= TX_IQ_CAL;
-+ if (!AR_SREV_9330(ah))
-+ ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
-+ }
-+ if (AR_SREV_9462(ah))
-+ pCap->hw_caps |= ATH9K_HW_CAP_RTT;
-+
- return 0;
- }
+ if (ah->opmode == NL80211_IFTYPE_STATION &&
+ test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
+@@ -365,6 +360,7 @@ void ath9k_tasklet(unsigned long data)
+ struct ath_softc *sc = (struct ath_softc *)data;
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
++ enum ath_reset_type type;
+ unsigned long flags;
+ u32 status = sc->intrstatus;
+ u32 rxmask;
+@@ -374,18 +370,13 @@ void ath9k_tasklet(unsigned long data)
-@@ -2454,7 +2493,7 @@ void ath9k_hw_setrxfilter(struct ath_hw
+ if ((status & ATH9K_INT_FATAL) ||
+ (status & ATH9K_INT_BB_WATCHDOG)) {
+-#ifdef CONFIG_ATH9K_DEBUGFS
+- enum ath_reset_type type;
- ENABLE_REGWRITE_BUFFER(ah);
+ if (status & ATH9K_INT_FATAL)
+ type = RESET_TYPE_FATAL_INT;
+ else
+ type = RESET_TYPE_BB_WATCHDOG;
-- if (AR_SREV_9480(ah))
-+ if (AR_SREV_9462(ah))
- bits |= ATH9K_RX_FILTER_CONTROL_WRAPPER;
+- RESET_STAT_INC(sc, type);
+-#endif
+- set_bit(SC_OP_HW_RESET, &sc->sc_flags);
+- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++ ath9k_queue_reset(sc, type);
+ goto out;
+ }
- REG_WRITE(ah, AR_RX_FILTER, bits);
-@@ -2498,23 +2537,56 @@ bool ath9k_hw_disable(struct ath_hw *ah)
+@@ -586,6 +577,15 @@ static int ath_reset(struct ath_softc *s
+ return r;
}
- EXPORT_SYMBOL(ath9k_hw_disable);
-+static int get_antenna_gain(struct ath_hw *ah, struct ath9k_channel *chan)
++void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
+{
-+ enum eeprom_param gain_param;
-+
-+ if (IS_CHAN_2GHZ(chan))
-+ gain_param = EEP_ANTENNA_GAIN_2G;
-+ else
-+ gain_param = EEP_ANTENNA_GAIN_5G;
-+
-+ return ah->eep_ops->get_eeprom(ah, gain_param);
-+}
-+
-+void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan)
-+{
-+ struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
-+ struct ieee80211_channel *channel;
-+ int chan_pwr, new_pwr, max_gain;
-+ int ant_gain, ant_reduction = 0;
-+
-+ if (!chan)
-+ return;
-+
-+ channel = chan->chan;
-+ chan_pwr = min_t(int, channel->max_power * 2, MAX_RATE_POWER);
-+ new_pwr = min_t(int, chan_pwr, reg->power_limit);
-+ max_gain = chan_pwr - new_pwr + channel->max_antenna_gain * 2;
-+
-+ ant_gain = get_antenna_gain(ah, chan);
-+ if (ant_gain > max_gain)
-+ ant_reduction = ant_gain - max_gain;
-+
-+ ah->eep_ops->set_txpower(ah, chan,
-+ ath9k_regd_get_ctl(reg, chan),
-+ ant_reduction, new_pwr, false);
++#ifdef CONFIG_ATH9K_DEBUGFS
++ RESET_STAT_INC(sc, type);
++#endif
++ set_bit(SC_OP_HW_RESET, &sc->sc_flags);
++ ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
+}
+
- void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
+ void ath_reset_work(struct work_struct *work)
{
-- struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
-+ struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
- struct ath9k_channel *chan = ah->curchan;
- struct ieee80211_channel *channel = chan->chan;
-- int reg_pwr = min_t(int, MAX_RATE_POWER, limit);
-- int chan_pwr = channel->max_power * 2;
-
-+ reg->power_limit = min_t(int, limit, MAX_RATE_POWER);
- if (test)
-- reg_pwr = chan_pwr = MAX_RATE_POWER;
-+ channel->max_power = MAX_RATE_POWER / 2;
-
-- regulatory->power_limit = reg_pwr;
-+ ath9k_hw_apply_txpower(ah, chan);
-
-- ah->eep_ops->set_txpower(ah, chan,
-- ath9k_regd_get_ctl(regulatory, chan),
-- channel->max_antenna_gain * 2,
-- chan_pwr, reg_pwr, test);
-+ if (test)
-+ channel->max_power = DIV_ROUND_UP(reg->max_power_level, 2);
+ struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
+@@ -852,16 +852,6 @@ bool ath9k_uses_beacons(int type)
+ }
}
- EXPORT_SYMBOL(ath9k_hw_set_txpowerlimit);
-
-@@ -2713,9 +2785,9 @@ void ath9k_hw_gen_timer_start(struct ath
- REG_SET_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
- gen_tmr_configuration[timer->index].mode_mask);
-
-- if (AR_SREV_9480(ah)) {
-+ if (AR_SREV_9462(ah)) {
- /*
-- * Starting from AR9480, each generic timer can select which tsf
-+ * Starting from AR9462, each generic timer can select which tsf
- * to use. But we still follow the old rule, 0 - 7 use tsf and
- * 8 - 15 use tsf2.
- */
-@@ -2832,7 +2904,7 @@ static struct {
- { AR_SREV_VERSION_9330, "9330" },
- { AR_SREV_VERSION_9340, "9340" },
- { AR_SREV_VERSION_9485, "9485" },
-- { AR_SREV_VERSION_9480, "9480" },
-+ { AR_SREV_VERSION_9462, "9462" },
- };
- /* For devices with external radios */
---- a/drivers/net/wireless/ath/ath9k/hw.h
-+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -46,7 +46,7 @@
- #define AR9300_DEVID_AR9340 0x0031
- #define AR9300_DEVID_AR9485_PCIE 0x0032
- #define AR9300_DEVID_AR9580 0x0033
--#define AR9300_DEVID_AR9480 0x0034
-+#define AR9300_DEVID_AR9462 0x0034
- #define AR9300_DEVID_AR9330 0x0035
-
- #define AR5416_AR9100_DEVID 0x000b
-@@ -202,6 +202,7 @@ enum ath9k_hw_caps {
- ATH9K_HW_CAP_2GHZ = BIT(13),
- ATH9K_HW_CAP_5GHZ = BIT(14),
- ATH9K_HW_CAP_APM = BIT(15),
-+ ATH9K_HW_CAP_RTT = BIT(16),
- };
+-static void ath9k_reclaim_beacon(struct ath_softc *sc,
+- struct ieee80211_vif *vif)
+-{
+- struct ath_vif *avp = (void *)vif->drv_priv;
+-
+- ath9k_set_beaconing_status(sc, false);
+- ath_beacon_return(sc, avp);
+- ath9k_set_beaconing_status(sc, true);
+-}
+-
+ static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
+ {
+ struct ath9k_vif_iter_data *iter_data = data;
+@@ -929,18 +919,14 @@ static void ath9k_calculate_summary_stat
- struct ath9k_hw_capabilities {
-@@ -337,6 +338,16 @@ enum ath9k_int {
- CHANNEL_HT40PLUS | \
- CHANNEL_HT40MINUS)
+ ath9k_calculate_iter_data(hw, vif, &iter_data);
-+#define MAX_RTT_TABLE_ENTRY 6
-+#define RTT_HIST_MAX 3
-+struct ath9k_rtt_hist {
-+ u32 table[AR9300_MAX_CHAINS][RTT_HIST_MAX][MAX_RTT_TABLE_ENTRY];
-+ u8 num_readings;
-+};
-+
-+#define MAX_IQCAL_MEASUREMENT 8
-+#define MAX_CL_TAB_ENTRY 16
-+
- struct ath9k_hw_cal_data {
- u16 channel;
- u32 channelFlags;
-@@ -346,9 +357,15 @@ struct ath9k_hw_cal_data {
- bool paprd_done;
- bool nfcal_pending;
- bool nfcal_interference;
-+ bool done_txiqcal_once;
-+ bool done_txclcal_once;
- u16 small_signal_gain[AR9300_MAX_CHAINS];
- u32 pa_table[AR9300_MAX_CHAINS][PAPRD_TABLE_SZ];
-+ u32 num_measures[AR9300_MAX_CHAINS];
-+ int tx_corr_coeff[MAX_IQCAL_MEASUREMENT][AR9300_MAX_CHAINS];
-+ u32 tx_clcal[AR9300_MAX_CHAINS][MAX_CL_TAB_ENTRY];
- struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
-+ struct ath9k_rtt_hist rtt_hist;
- };
+- /* Set BSSID mask. */
+ memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
+ ath_hw_setbssidmask(common);
- struct ath9k_channel {
-@@ -390,14 +407,6 @@ enum ath9k_power_mode {
- ATH9K_PM_UNDEFINED
- };
+- /* Set op-mode & TSF */
+ if (iter_data.naps > 0) {
+- ath9k_hw_set_tsfadjust(ah, 1);
+- set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
++ ath9k_hw_set_tsfadjust(ah, true);
+ ah->opmode = NL80211_IFTYPE_AP;
+ } else {
+- ath9k_hw_set_tsfadjust(ah, 0);
+- clear_bit(SC_OP_TSF_RESET, &sc->sc_flags);
++ ath9k_hw_set_tsfadjust(ah, false);
+
+ if (iter_data.nmeshes)
+ ah->opmode = NL80211_IFTYPE_MESH_POINT;
+@@ -952,45 +938,14 @@ static void ath9k_calculate_summary_stat
+ ah->opmode = NL80211_IFTYPE_STATION;
+ }
--enum ath9k_tp_scale {
-- ATH9K_TP_SCALE_MAX = 0,
-- ATH9K_TP_SCALE_50,
-- ATH9K_TP_SCALE_25,
-- ATH9K_TP_SCALE_12,
-- ATH9K_TP_SCALE_MIN
--};
+- /*
+- * Enable MIB interrupts when there are hardware phy counters.
+- */
++ ath9k_hw_setopmode(ah);
++
+ if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
+ ah->imask |= ATH9K_INT_TSFOOR;
+ else
+ ah->imask &= ~ATH9K_INT_TSFOOR;
+
+ ath9k_hw_set_interrupts(ah);
-
- enum ser_reg_mode {
- SER_REG_MODE_OFF = 0,
- SER_REG_MODE_ON = 1,
-@@ -591,6 +600,8 @@ struct ath_hw_private_ops {
- void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
- void (*set_radar_params)(struct ath_hw *ah,
- struct ath_hw_radar_conf *conf);
-+ int (*fast_chan_change)(struct ath_hw *ah, struct ath9k_channel *chan,
-+ u8 *ini_reloaded);
-
- /* ANI */
- void (*ani_cache_ini_regs)(struct ath_hw *ah);
-@@ -632,9 +643,16 @@ struct ath_nf_limits {
- s16 nominal;
- };
+- /* Set up ANI */
+- if (iter_data.naps > 0) {
+- sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
+-
+- if (!common->disable_ani) {
+- set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- ath_start_ani(common);
+- }
+-
+- } else {
+- clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- del_timer_sync(&common->ani.timer);
+- }
+-}
+-
+-/* Called with sc->mutex held, vif counts set up properly. */
+-static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
+- struct ieee80211_vif *vif)
+-{
+- struct ath_softc *sc = hw->priv;
+-
+- ath9k_calculate_summary_state(hw, vif);
+-
+- if (ath9k_uses_beacons(vif->type)) {
+- /* Reserve a beacon slot for the vif */
+- ath9k_set_beaconing_status(sc, false);
+- ath_beacon_alloc(sc, vif);
+- ath9k_set_beaconing_status(sc, true);
+- }
+ }
-+enum ath_cal_list {
-+ TX_IQ_CAL = BIT(0),
-+ TX_IQ_ON_AGC_CAL = BIT(1),
-+ TX_CL_CAL = BIT(2),
-+};
+ static int ath9k_add_interface(struct ieee80211_hw *hw,
+@@ -1032,7 +987,10 @@ static int ath9k_add_interface(struct ie
+
+ sc->nvifs++;
+
+- ath9k_do_vif_add_setup(hw, vif);
++ ath9k_calculate_summary_state(hw, vif);
++ if (ath9k_uses_beacons(vif->type))
++ ath9k_beacon_assign_slot(sc, vif);
+
- /* ah_flags */
- #define AH_USE_EEPROM 0x1
- #define AH_UNPLUGGED 0x2 /* The card has been physically removed. */
-+#define AH_FASTCC 0x4
-
- struct ath_hw {
- struct ath_ops reg_ops;
-@@ -692,6 +710,7 @@ struct ath_hw {
- atomic_t intr_ref_cnt;
- bool chip_fullsleep;
- u32 atim_window;
-+ u32 modes_index;
-
- /* Calibration */
- u32 supp_cals;
-@@ -730,6 +749,7 @@ struct ath_hw {
- int32_t sign[AR5416_MAX_CHAINS];
- } meas3;
- u16 cal_samples;
-+ u8 enabled_cals;
-
- u32 sta_id1_defaults;
- u32 misc_mode;
-@@ -968,6 +988,7 @@ void ath9k_hw_htc_resetinit(struct ath_h
- /* PHY */
- void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
- u32 *coef_mantissa, u32 *coef_exponent);
-+void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan);
+ out:
+ mutex_unlock(&sc->mutex);
+ ath9k_ps_restore(sc);
+@@ -1049,6 +1007,7 @@ static int ath9k_change_interface(struct
+ int ret = 0;
- /*
- * Code Specific to AR5008, AR9001 or AR9002,
---- a/drivers/net/wireless/ath/ath9k/init.c
-+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -626,7 +626,6 @@ static void ath9k_init_band_txpower(stru
- struct ieee80211_supported_band *sband;
- struct ieee80211_channel *chan;
- struct ath_hw *ah = sc->sc_ah;
-- struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
- int i;
+ ath_dbg(common, CONFIG, "Change Interface\n");
++
+ mutex_lock(&sc->mutex);
+ ath9k_ps_wakeup(sc);
- sband = &sc->sbands[band];
-@@ -635,7 +634,6 @@ static void ath9k_init_band_txpower(stru
- ah->curchan = &ah->channels[chan->hw_value];
- ath9k_cmn_update_ichannel(ah->curchan, chan, NL80211_CHAN_HT20);
- ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true);
-- chan->max_power = reg->max_power_level / 2;
+@@ -1061,15 +1020,16 @@ static int ath9k_change_interface(struct
+ }
}
- }
---- a/drivers/net/wireless/ath/ath9k/mac.c
-+++ b/drivers/net/wireless/ath/ath9k/mac.c
-@@ -620,8 +620,8 @@ int ath9k_hw_rxprocdesc(struct ath_hw *a
- rs->rs_status |= ATH9K_RXERR_DECRYPT;
- else if (ads.ds_rxstatus8 & AR_MichaelErr)
- rs->rs_status |= ATH9K_RXERR_MIC;
-- else if (ads.ds_rxstatus8 & AR_KeyMiss)
-- rs->rs_status |= ATH9K_RXERR_DECRYPT;
-+ if (ads.ds_rxstatus8 & AR_KeyMiss)
-+ rs->rs_status |= ATH9K_RXERR_KEYMISS;
- }
+- /* Clean up old vif stuff */
+ if (ath9k_uses_beacons(vif->type))
+- ath9k_reclaim_beacon(sc, vif);
++ ath9k_beacon_remove_slot(sc, vif);
+
+- /* Add new settings */
+ vif->type = new_type;
+ vif->p2p = p2p;
+
+- ath9k_do_vif_add_setup(hw, vif);
++ ath9k_calculate_summary_state(hw, vif);
++ if (ath9k_uses_beacons(vif->type))
++ ath9k_beacon_assign_slot(sc, vif);
++
+ out:
+ ath9k_ps_restore(sc);
+ mutex_unlock(&sc->mutex);
+@@ -1089,9 +1049,8 @@ static void ath9k_remove_interface(struc
+
+ sc->nvifs--;
+
+- /* Reclaim beacon resources */
+ if (ath9k_uses_beacons(vif->type))
+- ath9k_reclaim_beacon(sc, vif);
++ ath9k_beacon_remove_slot(sc, vif);
+
+ ath9k_calculate_summary_state(hw, NULL);
+
+@@ -1388,21 +1347,18 @@ static int ath9k_conf_tx(struct ieee8021
+ qi.tqi_aifs = params->aifs;
+ qi.tqi_cwmin = params->cw_min;
+ qi.tqi_cwmax = params->cw_max;
+- qi.tqi_burstTime = params->txop;
++ qi.tqi_burstTime = params->txop * 32;
+
+ ath_dbg(common, CONFIG,
+ "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
+ queue, txq->axq_qnum, params->aifs, params->cw_min,
+ params->cw_max, params->txop);
+
++ ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
+ ret = ath_txq_update(sc, txq->axq_qnum, &qi);
+ if (ret)
+ ath_err(common, "TXQ Update failed\n");
+
+- if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
+- if (queue == WME_AC_BE && !ret)
+- ath_beaconq_config(sc);
+-
+ mutex_unlock(&sc->mutex);
+ ath9k_ps_restore(sc);
- return 0;
-@@ -827,9 +827,9 @@ void ath9k_hw_enable_interrupts(struct a
- }
- EXPORT_SYMBOL(ath9k_hw_enable_interrupts);
+@@ -1471,85 +1427,36 @@ static int ath9k_set_key(struct ieee8021
--void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
-+void ath9k_hw_set_interrupts(struct ath_hw *ah)
+ return ret;
+ }
+-static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
++
++static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
{
-- enum ath9k_int omask = ah->imask;
-+ enum ath9k_int ints = ah->imask;
- u32 mask, mask2;
- struct ath9k_hw_capabilities *pCap = &ah->caps;
- struct ath_common *common = ath9k_hw_common(ah);
-@@ -837,7 +837,7 @@ void ath9k_hw_set_interrupts(struct ath_
- if (!(ints & ATH9K_INT_GLOBAL))
- ath9k_hw_disable_interrupts(ah);
-
-- ath_dbg(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
-+ ath_dbg(common, ATH_DBG_INTERRUPT, "New interrupt mask 0x%x\n", ints);
-
- mask = ints & ATH9K_INT_COMMON;
- mask2 = 0;
---- a/drivers/net/wireless/ath/ath9k/mac.h
-+++ b/drivers/net/wireless/ath/ath9k/mac.h
-@@ -75,9 +75,10 @@
- #define ATH9K_TXERR_XTXOP 0x08
- #define ATH9K_TXERR_TIMER_EXPIRED 0x10
- #define ATH9K_TX_ACKED 0x20
-+#define ATH9K_TX_FLUSH 0x40
- #define ATH9K_TXERR_MASK \
- (ATH9K_TXERR_XRETRY | ATH9K_TXERR_FILT | ATH9K_TXERR_FIFO | \
-- ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED)
-+ ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED | ATH9K_TX_FLUSH)
-
- #define ATH9K_TX_BA 0x01
- #define ATH9K_TX_PWRMGMT 0x02
-@@ -181,6 +182,7 @@ struct ath_htc_rx_status {
- #define ATH9K_RXERR_FIFO 0x04
- #define ATH9K_RXERR_DECRYPT 0x08
- #define ATH9K_RXERR_MIC 0x10
-+#define ATH9K_RXERR_KEYMISS 0x20
-
- #define ATH9K_RX_MORE 0x01
- #define ATH9K_RX_MORE_AGGR 0x02
-@@ -734,7 +736,7 @@ int ath9k_hw_beaconq_setup(struct ath_hw
-
- /* Interrupt Handling */
- bool ath9k_hw_intrpend(struct ath_hw *ah);
--void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints);
-+void ath9k_hw_set_interrupts(struct ath_hw *ah);
- void ath9k_hw_enable_interrupts(struct ath_hw *ah);
- void ath9k_hw_disable_interrupts(struct ath_hw *ah);
-
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -273,7 +273,7 @@ static bool ath_complete_reset(struct at
+ struct ath_softc *sc = data;
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+- struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
+ struct ath_vif *avp = (void *)vif->drv_priv;
++ struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
+ unsigned long flags;
+- /*
+- * Skip iteration if primary station vif's bss info
+- * was not changed
+- */
++
+ if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
+ return;
- ath9k_cmn_update_txpow(ah, sc->curtxpow,
- sc->config.txpowlimit, &sc->curtxpow);
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
- ath9k_hw_enable_interrupts(ah);
+ if (bss_conf->assoc) {
+ set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
+ avp->primary_sta_vif = true;
++
+ memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
+ common->curaid = bss_conf->aid;
+ ath9k_hw_write_associd(sc->sc_ah);
+- ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
+- bss_conf->aid, common->curbssid);
+- ath_beacon_config(sc, vif);
+- /*
+- * Request a re-configuration of Beacon related timers
+- * on the receipt of the first Beacon frame (i.e.,
+- * after time sync with the AP).
+- */
+- spin_lock_irqsave(&sc->sc_pm_lock, flags);
+- sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
+- spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
+
+- /* Reset rssi stats */
+ sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
+ sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
+
+- ath_start_rx_poll(sc, 3);
+-
+- if (!common->disable_ani) {
+- set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- ath_start_ani(common);
+- }
+-
+- }
+-}
+-
+-static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
+-{
+- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+- struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
+- struct ath_vif *avp = (void *)vif->drv_priv;
+-
+- if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
+- return;
+-
+- /* Reconfigure bss info */
+- if (avp->primary_sta_vif && !bss_conf->assoc) {
+- ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
+- common->curaid, common->curbssid);
+- clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
+- clear_bit(SC_OP_BEACONS, &sc->sc_flags);
+- avp->primary_sta_vif = false;
+- memset(common->curbssid, 0, ETH_ALEN);
+- common->curaid = 0;
+- }
+-
+- ieee80211_iterate_active_interfaces_atomic(
+- sc->hw, ath9k_bss_iter, sc);
++ spin_lock_irqsave(&sc->sc_pm_lock, flags);
++ sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
++ spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
- if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
-@@ -679,6 +679,16 @@ void ath9k_tasklet(unsigned long data)
+- /*
+- * None of station vifs are associated.
+- * Clear bssid & aid
+- */
+- if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
+- ath9k_hw_write_associd(sc->sc_ah);
+- clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- del_timer_sync(&common->ani.timer);
+- del_timer_sync(&sc->rx_poll_timer);
+- memset(&sc->caldata, 0, sizeof(sc->caldata));
++ ath_dbg(common, CONFIG,
++ "Primary Station interface: %pM, BSSID: %pM\n",
++ vif->addr, common->curbssid);
+ }
+ }
- if ((status & ATH9K_INT_FATAL) ||
- (status & ATH9K_INT_BB_WATCHDOG)) {
-+#ifdef CONFIG_ATH9K_DEBUGFS
-+ enum ath_reset_type type;
+@@ -1558,6 +1465,11 @@ static void ath9k_bss_info_changed(struc
+ struct ieee80211_bss_conf *bss_conf,
+ u32 changed)
+ {
++#define CHECK_ANI \
++ (BSS_CHANGED_ASSOC | \
++ BSS_CHANGED_IBSS | \
++ BSS_CHANGED_BEACON_ENABLED)
+
-+ if (status & ATH9K_INT_FATAL)
-+ type = RESET_TYPE_FATAL_INT;
-+ else
-+ type = RESET_TYPE_BB_WATCHDOG;
+ struct ath_softc *sc = hw->priv;
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -1568,53 +1480,43 @@ static void ath9k_bss_info_changed(struc
+ mutex_lock(&sc->mutex);
+
+ if (changed & BSS_CHANGED_ASSOC) {
+- ath9k_config_bss(sc, vif);
++ ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
++ bss_conf->bssid, bss_conf->assoc);
+
+- ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
+- common->curbssid, common->curaid);
++ /*
++ * Do not do anything when the opmode is not STATION.
++ */
++ if (ah->opmode == NL80211_IFTYPE_STATION) {
++ if (avp->primary_sta_vif && !bss_conf->assoc) {
++ clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
++ clear_bit(SC_OP_BEACONS, &sc->sc_flags);
++ avp->primary_sta_vif = false;
++ }
+
-+ RESET_STAT_INC(sc, type);
-+#endif
- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
- goto out;
++ ieee80211_iterate_active_interfaces_atomic(sc->hw,
++ ath9k_bss_assoc_iter, sc);
++
++ if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
++ memset(common->curbssid, 0, ETH_ALEN);
++ common->curaid = 0;
++ ath9k_hw_write_associd(sc->sc_ah);
++ }
++ }
}
-@@ -823,7 +833,7 @@ irqreturn_t ath_isr(int irq, void *dev)
- if (status & ATH9K_INT_RXEOL) {
- ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
+ if (changed & BSS_CHANGED_IBSS) {
+- /* There can be only one vif available */
+ memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
+ common->curaid = bss_conf->aid;
+ ath9k_hw_write_associd(sc->sc_ah);
+-
+- if (bss_conf->ibss_joined) {
+- sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
+-
+- if (!common->disable_ani) {
+- set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- ath_start_ani(common);
+- }
+-
+- } else {
+- clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
+- del_timer_sync(&common->ani.timer);
+- del_timer_sync(&sc->rx_poll_timer);
+- }
}
- if (status & ATH9K_INT_MIB) {
-@@ -995,8 +1005,10 @@ void ath_hw_check(struct work_struct *wo
- ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
- "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
- if (busy >= 99) {
-- if (++sc->hw_busy_count >= 3)
-+ if (++sc->hw_busy_count >= 3) {
-+ RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
-+ }
+- /*
+- * In case of AP mode, the HW TSF has to be reset
+- * when the beacon interval changes.
+- */
+- if ((changed & BSS_CHANGED_BEACON_INT) &&
+- (vif->type == NL80211_IFTYPE_AP))
+- set_bit(SC_OP_TSF_RESET, &sc->sc_flags);
+-
+- /* Configure beaconing (AP, IBSS, MESH) */
+- if (ath9k_uses_beacons(vif->type) &&
+- ((changed & BSS_CHANGED_BEACON) ||
+- (changed & BSS_CHANGED_BEACON_ENABLED) ||
+- (changed & BSS_CHANGED_BEACON_INT))) {
+- ath9k_set_beaconing_status(sc, false);
+- if (bss_conf->enable_beacon)
+- ath_beacon_alloc(sc, vif);
+- else
+- avp->is_bslot_active = false;
+- ath_beacon_config(sc, vif);
+- ath9k_set_beaconing_status(sc, true);
++ if ((changed & BSS_CHANGED_BEACON) ||
++ (changed & BSS_CHANGED_BEACON_ENABLED) ||
++ (changed & BSS_CHANGED_BEACON_INT)) {
++ if (ah->opmode == NL80211_IFTYPE_AP)
++ ath9k_set_tsfadjust(sc, vif);
++ if (ath9k_allow_beacon_config(sc, vif))
++ ath9k_beacon_config(sc, vif, changed);
+ }
- } else if (busy >= 0)
- sc->hw_busy_count = 0;
-@@ -1016,6 +1028,7 @@ static void ath_hw_pll_rx_hang_check(str
- /* Rx is hung for more than 500ms. Reset it */
- ath_dbg(common, ATH_DBG_RESET,
- "Possible RX hang, resetting");
-+ RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
- count = 0;
+ if (changed & BSS_CHANGED_ERP_SLOT) {
+@@ -1636,8 +1538,13 @@ static void ath9k_bss_info_changed(struc
}
-@@ -1396,7 +1409,7 @@ static void ath9k_calculate_summary_stat
- ah->imask &= ~ATH9K_INT_TSFOOR;
}
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
++ if (changed & CHECK_ANI)
++ ath_check_ani(sc);
++
+ mutex_unlock(&sc->mutex);
+ ath9k_ps_restore(sc);
++
++#undef CHECK_ANI
+ }
- /* Set up ANI */
- if (iter_data.naps > 0) {
-@@ -1571,7 +1584,7 @@ static void ath9k_enable_ps(struct ath_s
- if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
- if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
- ah->imask |= ATH9K_INT_TIM_TIMER;
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
- }
- ath9k_hw_setrxabort(ah, 1);
- }
-@@ -1591,7 +1604,7 @@ static void ath9k_disable_ps(struct ath_
- PS_WAIT_FOR_TX_ACK);
- if (ah->imask & ATH9K_INT_TIM_TIMER) {
- ah->imask &= ~ATH9K_INT_TIM_TIMER;
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
+ static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
+@@ -1866,10 +1773,11 @@ static int ath9k_tx_last_beacon(struct i
+ if (!vif)
+ return 0;
+
+- avp = (void *)vif->drv_priv;
+- if (!avp->is_bslot_active)
++ if (!vif->bss_conf.enable_beacon)
+ return 0;
+
++ avp = (void *)vif->drv_priv;
++
+ if (!sc->beacon.tx_processed && !edma) {
+ tasklet_disable(&sc->bcon_tasklet);
+
+@@ -1923,12 +1831,29 @@ static u32 fill_chainmask(u32 cap, u32 n
+ return filled;
+ }
+
++static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
++{
++ switch (val & 0x7) {
++ case 0x1:
++ case 0x3:
++ case 0x7:
++ return true;
++ case 0x2:
++ return (ah->caps.rx_chainmask == 1);
++ default:
++ return false;
++ }
++}
++
+ static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
+ {
+ struct ath_softc *sc = hw->priv;
+ struct ath_hw *ah = sc->sc_ah;
+
+- if (!rx_ant || !tx_ant)
++ if (ah->caps.rx_chainmask != 1)
++ rx_ant |= tx_ant;
++
++ if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
+ return -EINVAL;
+
+ sc->ant_rx = rx_ant;
+--- a/drivers/net/wireless/ath/ath9k/mci.c
++++ b/drivers/net/wireless/ath/ath9k/mci.c
+@@ -202,7 +202,7 @@ static void ath_mci_cal_msg(struct ath_s
+ case MCI_GPM_BT_CAL_REQ:
+ if (mci_hw->bt_state == MCI_BT_AWAKE) {
+ ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START);
+- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
++ ath9k_queue_reset(sc, RESET_TYPE_MCI);
}
+ ath_dbg(common, MCI, "MCI State : %d\n", mci_hw->bt_state);
+ break;
+--- a/drivers/net/wireless/ath/ath9k/recv.c
++++ b/drivers/net/wireless/ath/ath9k/recv.c
+@@ -553,7 +553,7 @@ static void ath_rx_ps_beacon(struct ath_
+ sc->ps_flags &= ~PS_BEACON_SYNC;
+ ath_dbg(common, PS,
+ "Reconfigure Beacon timers based on timestamp from the AP\n");
+- ath_set_beacon(sc);
++ ath9k_set_beacon(sc);
}
---- a/drivers/net/wireless/ath/ath9k/pci.c
-+++ b/drivers/net/wireless/ath/ath9k/pci.c
-@@ -33,7 +33,7 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_i
- { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
- { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
- { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
-- { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9480 */
-+ { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
- { 0 }
- };
+ if (ath_beacon_dtim_pending_cab(skb)) {
+@@ -1044,7 +1044,6 @@ int ath_rx_tasklet(struct ath_softc *sc,
+ struct ieee80211_hw *hw = sc->hw;
+ struct ieee80211_hdr *hdr;
+ int retval;
+- bool decrypt_error = false;
+ struct ath_rx_status rs;
+ enum ath9k_rx_qtype qtype;
+ bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
+@@ -1066,6 +1065,7 @@ int ath_rx_tasklet(struct ath_softc *sc,
+ tsf_lower = tsf & 0xffffffff;
+
+ do {
++ bool decrypt_error = false;
+ /* If handling rx interrupt and flush is in progress => exit */
+ if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags) && (flush == 0))
+ break;
+--- a/drivers/net/wireless/ath/ath9k/xmit.c
++++ b/drivers/net/wireless/ath/ath9k/xmit.c
+@@ -29,6 +29,8 @@
+ #define HT_LTF(_ns) (4 * (_ns))
+ #define SYMBOL_TIME(_ns) ((_ns) << 2) /* ns * 4 us */
+ #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) /* ns * 3.6 us */
++#define TIME_SYMBOLS(t) ((t) >> 2)
++#define TIME_SYMBOLS_HALFGI(t) (((t) * 5 - 4) / 18)
+ #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2)
+ #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
+
+@@ -74,33 +76,6 @@ enum {
+ MCS_HT40_SGI,
+ };
+
+-static int ath_max_4ms_framelen[4][32] = {
+- [MCS_HT20] = {
+- 3212, 6432, 9648, 12864, 19300, 25736, 28952, 32172,
+- 6424, 12852, 19280, 25708, 38568, 51424, 57852, 64280,
+- 9628, 19260, 28896, 38528, 57792, 65532, 65532, 65532,
+- 12828, 25656, 38488, 51320, 65532, 65532, 65532, 65532,
+- },
+- [MCS_HT20_SGI] = {
+- 3572, 7144, 10720, 14296, 21444, 28596, 32172, 35744,
+- 7140, 14284, 21428, 28568, 42856, 57144, 64288, 65532,
+- 10700, 21408, 32112, 42816, 64228, 65532, 65532, 65532,
+- 14256, 28516, 42780, 57040, 65532, 65532, 65532, 65532,
+- },
+- [MCS_HT40] = {
+- 6680, 13360, 20044, 26724, 40092, 53456, 60140, 65532,
+- 13348, 26700, 40052, 53400, 65532, 65532, 65532, 65532,
+- 20004, 40008, 60016, 65532, 65532, 65532, 65532, 65532,
+- 26644, 53292, 65532, 65532, 65532, 65532, 65532, 65532,
+- },
+- [MCS_HT40_SGI] = {
+- 7420, 14844, 22272, 29696, 44544, 59396, 65532, 65532,
+- 14832, 29668, 44504, 59340, 65532, 65532, 65532, 65532,
+- 22232, 44464, 65532, 65532, 65532, 65532, 65532, 65532,
+- 29616, 59232, 65532, 65532, 65532, 65532, 65532, 65532,
+- }
+-};
+-
+ /*********************/
+ /* Aggregation logic */
+ /*********************/
+@@ -614,10 +589,8 @@ static void ath_tx_complete_aggr(struct
+
+ rcu_read_unlock();
---- a/drivers/net/wireless/ath/ath9k/recv.c
-+++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -433,12 +433,9 @@ void ath_rx_cleanup(struct ath_softc *sc
+- if (needreset) {
+- RESET_STAT_INC(sc, RESET_TYPE_TX_ERROR);
+- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
+- }
++ if (needreset)
++ ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
+ }
- u32 ath_calcrxfilter(struct ath_softc *sc)
- {
--#define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
--
- u32 rfilt;
+ static bool ath_lookup_legacy(struct ath_buf *bf)
+@@ -650,6 +623,7 @@ static u32 ath_lookup_rate(struct ath_so
+ struct ieee80211_tx_rate *rates;
+ u32 max_4ms_framelen, frmlen;
+ u16 aggr_limit, bt_aggr_limit, legacy = 0;
++ int q = tid->ac->txq->mac80211_qnum;
+ int i;
-- rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
-- | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
-+ rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
- | ATH9K_RX_FILTER_MCAST;
+ skb = bf->bf_mpdu;
+@@ -658,8 +632,7 @@ static u32 ath_lookup_rate(struct ath_so
- if (sc->rx.rxfilter & FIF_PROBE_REQ)
-@@ -811,6 +808,7 @@ static bool ath9k_rx_accept(struct ath_c
- struct ath_rx_status *rx_stats,
- bool *decrypt_error)
- {
-+ struct ath_softc *sc = (struct ath_softc *) common->priv;
- bool is_mc, is_valid_tkip, strip_mic, mic_error;
- struct ath_hw *ah = common->ah;
- __le16 fc;
-@@ -823,7 +821,8 @@ static bool ath9k_rx_accept(struct ath_c
- test_bit(rx_stats->rs_keyix, common->tkip_keymap);
- strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
- !(rx_stats->rs_status &
-- (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
-+ (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
-+ ATH9K_RXERR_KEYMISS));
-
- if (!rx_stats->rs_datalen)
- return false;
-@@ -851,6 +850,8 @@ static bool ath9k_rx_accept(struct ath_c
- * descriptors.
+ /*
+ * Find the lowest frame length among the rate series that will have a
+- * 4ms transmit duration.
+- * TODO - TXOP limit needs to be considered.
++ * 4ms (or TXOP limited) transmit duration.
*/
- if (rx_stats->rs_status != 0) {
-+ u8 status_mask;
-+
- if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
- rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
- mic_error = false;
-@@ -858,7 +859,8 @@ static bool ath9k_rx_accept(struct ath_c
- if (rx_stats->rs_status & ATH9K_RXERR_PHY)
- return false;
-
-- if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
-+ if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
-+ (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
- *decrypt_error = true;
- mic_error = false;
- }
-@@ -868,17 +870,14 @@ static bool ath9k_rx_accept(struct ath_c
- * decryption and MIC failures. For monitor mode,
- * we also ignore the CRC error.
- */
-- if (ah->is_monitoring) {
-- if (rx_stats->rs_status &
-- ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
-- ATH9K_RXERR_CRC))
-- return false;
-- } else {
-- if (rx_stats->rs_status &
-- ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
-- return false;
-- }
-- }
-+ status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
-+ ATH9K_RXERR_KEYMISS;
-+
-+ if (ah->is_monitoring && (sc->rx.rxfilter & FIF_FCSFAIL))
-+ status_mask |= ATH9K_RXERR_CRC;
-+
-+ if (rx_stats->rs_status & ~status_mask)
-+ return false;
- }
+ max_4ms_framelen = ATH_AMPDU_LIMIT_MAX;
- /*
-@@ -1973,7 +1972,7 @@ requeue:
+@@ -682,7 +655,7 @@ static u32 ath_lookup_rate(struct ath_so
+ if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
+ modeidx++;
- if (!(ah->imask & ATH9K_INT_RXEOL)) {
- ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
-- ath9k_hw_set_interrupts(ah, ah->imask);
-+ ath9k_hw_set_interrupts(ah);
+- frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
++ frmlen = sc->tx.max_aggr_framelen[q][modeidx][rates[i].idx];
+ max_4ms_framelen = min(max_4ms_framelen, frmlen);
}
- return 0;
---- a/drivers/net/wireless/ath/ath9k/reg.h
-+++ b/drivers/net/wireless/ath/ath9k/reg.h
-@@ -796,9 +796,9 @@
- #define AR_SREV_VERSION_9340 0x300
- #define AR_SREV_VERSION_9580 0x1C0
- #define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */
--#define AR_SREV_VERSION_9480 0x280
--#define AR_SREV_REVISION_9480_10 0
--#define AR_SREV_REVISION_9480_20 2
-+#define AR_SREV_VERSION_9462 0x280
-+#define AR_SREV_REVISION_9462_10 0
-+#define AR_SREV_REVISION_9462_20 2
-
- #define AR_SREV_5416(_ah) \
- (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
-@@ -895,20 +895,20 @@
- (AR_SREV_9285_12_OR_LATER(_ah) && \
- ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1))
-
--#define AR_SREV_9480(_ah) \
-- (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480))
-+#define AR_SREV_9462(_ah) \
-+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462))
-
--#define AR_SREV_9480_10(_ah) \
-- (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
-- ((_ah)->hw_version.macRev == AR_SREV_REVISION_9480_10))
--
--#define AR_SREV_9480_20(_ah) \
-- (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
-- ((_ah)->hw_version.macRev == AR_SREV_REVISION_9480_20))
--
--#define AR_SREV_9480_20_OR_LATER(_ah) \
-- (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
-- ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9480_20))
-+#define AR_SREV_9462_10(_ah) \
-+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \
-+ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_10))
+@@ -929,6 +902,44 @@ static u32 ath_pkt_duration(struct ath_s
+ return duration;
+ }
+
++static int ath_max_framelen(int usec, int mcs, bool ht40, bool sgi)
++{
++ int streams = HT_RC_2_STREAMS(mcs);
++ int symbols, bits;
++ int bytes = 0;
++
++ symbols = sgi ? TIME_SYMBOLS_HALFGI(usec) : TIME_SYMBOLS(usec);
++ bits = symbols * bits_per_symbol[mcs % 8][ht40] * streams;
++ bits -= OFDM_PLCP_BITS;
++ bytes = bits / 8;
++ bytes -= L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
++ if (bytes > 65532)
++ bytes = 65532;
++
++ return bytes;
++}
+
-+#define AR_SREV_9462_20(_ah) \
-+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \
-+ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9462_20))
++void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop)
++{
++ u16 *cur_ht20, *cur_ht20_sgi, *cur_ht40, *cur_ht40_sgi;
++ int mcs;
++
++ /* 4ms is the default (and maximum) duration */
++ if (!txop || txop > 4096)
++ txop = 4096;
++
++ cur_ht20 = sc->tx.max_aggr_framelen[queue][MCS_HT20];
++ cur_ht20_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT20_SGI];
++ cur_ht40 = sc->tx.max_aggr_framelen[queue][MCS_HT40];
++ cur_ht40_sgi = sc->tx.max_aggr_framelen[queue][MCS_HT40_SGI];
++ for (mcs = 0; mcs < 32; mcs++) {
++ cur_ht20[mcs] = ath_max_framelen(txop, mcs, false, false);
++ cur_ht20_sgi[mcs] = ath_max_framelen(txop, mcs, false, true);
++ cur_ht40[mcs] = ath_max_framelen(txop, mcs, true, false);
++ cur_ht40_sgi[mcs] = ath_max_framelen(txop, mcs, true, true);
++ }
++}
+
-+#define AR_SREV_9462_20_OR_LATER(_ah) \
-+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \
-+ ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9462_20))
-
- #define AR_SREV_9580(_ah) \
- (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \
-@@ -1933,6 +1933,7 @@ enum {
- #define AR_PHY_AGC_CONTROL_NO_UPDATE_NF 0x00020000 /* don't update noise floor automatically */
- #define AR_PHY_AGC_CONTROL_EXT_NF_PWR_MEAS 0x00040000 /* extend noise floor power measurement */
- #define AR_PHY_AGC_CONTROL_CLC_SUCCESS 0x00080000 /* carrier leak calibration done */
-+#define AR_PHY_AGC_CONTROL_PKDET_CAL 0x00100000
- #define AR_PHY_AGC_CONTROL_YCOK_MAX 0x000003c0
- #define AR_PHY_AGC_CONTROL_YCOK_MAX_S 6
+ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
+ struct ath_tx_info *info, int len)
+ {
+@@ -1586,7 +1597,8 @@ void ath_txq_schedule(struct ath_softc *
+ struct ath_atx_ac *ac, *ac_tmp, *last_ac;
+ struct ath_atx_tid *tid, *last_tid;
+
+- if (work_pending(&sc->hw_reset_work) || list_empty(&txq->axq_acq) ||
++ if (test_bit(SC_OP_HW_RESET, &sc->sc_flags) ||
++ list_empty(&txq->axq_acq) ||
+ txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
+ return;
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -373,7 +373,7 @@ static void ath_tx_complete_aggr(struct
- struct ath_frame_info *fi;
- int nframes;
- u8 tidno;
-- bool clear_filter;
-+ bool flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
+@@ -1988,7 +2000,8 @@ int ath_tx_start(struct ieee80211_hw *hw
- skb = bf->bf_mpdu;
- hdr = (struct ieee80211_hdr *)skb->data;
-@@ -462,12 +462,12 @@ static void ath_tx_complete_aggr(struct
- * the un-acked sub-frames
- */
- txfail = 1;
-+ } else if (flush) {
-+ txpending = 1;
- } else if (fi->retries < ATH_MAX_SW_RETRIES) {
-- if (!(ts->ts_status & ATH9K_TXERR_FILT) ||
-- !an->sleeping)
-+ if (txok || !an->sleeping)
- ath_tx_set_retry(sc, txq, bf->bf_mpdu);
-
-- clear_filter = true;
- txpending = 1;
- } else {
- txfail = 1;
-@@ -521,7 +521,8 @@ static void ath_tx_complete_aggr(struct
-
- ath_tx_complete_buf(sc, bf, txq,
- &bf_head,
-- ts, 0, 1);
-+ ts, 0,
-+ !flush);
- break;
- }
-
-@@ -545,11 +546,13 @@ static void ath_tx_complete_aggr(struct
- ieee80211_sta_set_buffered(sta, tid->tidno, true);
-
- spin_lock_bh(&txq->axq_lock);
-- if (clear_filter)
-- tid->ac->clear_ps_filter = true;
- skb_queue_splice(&bf_pending, &tid->buf_q);
-- if (!an->sleeping)
-+ if (!an->sleeping) {
- ath_tx_queue_tid(txq, tid);
-+
-+ if (ts->ts_status & ATH9K_TXERR_FILT)
-+ tid->ac->clear_ps_filter = true;
-+ }
- spin_unlock_bh(&txq->axq_lock);
+ ath_txq_lock(sc, txq);
+ if (txq == sc->tx.txq_map[q] &&
+- ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
++ ++txq->pending_frames > sc->tx.txq_max_pending[q] &&
++ !txq->stopped) {
+ ieee80211_stop_queue(sc->hw, q);
+ txq->stopped = true;
}
+@@ -2047,7 +2060,8 @@ static void ath_tx_complete(struct ath_s
+ if (WARN_ON(--txq->pending_frames < 0))
+ txq->pending_frames = 0;
+
+- if (txq->stopped && txq->pending_frames < ATH_MAX_QDEPTH) {
++ if (txq->stopped &&
++ txq->pending_frames < sc->tx.txq_max_pending[q]) {
+ ieee80211_wake_queue(sc->hw, q);
+ txq->stopped = false;
+ }
+@@ -2191,7 +2205,7 @@ static void ath_tx_processq(struct ath_s
-@@ -564,8 +567,10 @@ static void ath_tx_complete_aggr(struct
-
- rcu_read_unlock();
+ ath_txq_lock(sc, txq);
+ for (;;) {
+- if (work_pending(&sc->hw_reset_work))
++ if (test_bit(SC_OP_HW_RESET, &sc->sc_flags))
+ break;
-- if (needreset)
-+ if (needreset) {
-+ RESET_STAT_INC(sc, RESET_TYPE_TX_ERROR);
- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
-+ }
- }
+ if (list_empty(&txq->axq_q)) {
+@@ -2274,7 +2288,7 @@ void ath_tx_edma_tasklet(struct ath_soft
+ int status;
- static bool ath_lookup_legacy(struct ath_buf *bf)
-@@ -1407,6 +1412,7 @@ static void ath_drain_txq_list(struct at
- struct ath_tx_status ts;
+ for (;;) {
+- if (work_pending(&sc->hw_reset_work))
++ if (test_bit(SC_OP_HW_RESET, &sc->sc_flags))
+ break;
- memset(&ts, 0, sizeof(ts));
-+ ts.ts_status = ATH9K_TX_FLUSH;
- INIT_LIST_HEAD(&bf_head);
+ status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts);
+--- a/drivers/net/wireless/b43/xmit.c
++++ b/drivers/net/wireless/b43/xmit.c
+@@ -663,7 +663,7 @@ void b43_rx(struct b43_wldev *dev, struc
+ u32 uninitialized_var(macstat);
+ u16 chanid;
+ u16 phytype;
+- int padding;
++ int padding, rate_idx;
- while (!list_empty(list)) {
-@@ -1473,7 +1479,8 @@ bool ath_drain_all_txq(struct ath_softc
- struct ath_hw *ah = sc->sc_ah;
- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
- struct ath_txq *txq;
-- int i, npend = 0;
-+ int i;
-+ u32 npend = 0;
-
- if (sc->sc_flags & SC_OP_INVALID)
- return true;
-@@ -1485,11 +1492,12 @@ bool ath_drain_all_txq(struct ath_softc
- if (!ATH_TXQ_SETUP(sc, i))
- continue;
+ memset(&status, 0, sizeof(status));
-- npend += ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum);
-+ if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
-+ npend |= BIT(i);
+@@ -766,16 +766,17 @@ void b43_rx(struct b43_wldev *dev, struc
}
- if (npend)
-- ath_err(common, "Failed to stop TX DMA!\n");
-+ ath_err(common, "Failed to stop TX DMA, queues=0x%03x!\n", npend);
+ if (phystat0 & B43_RX_PHYST0_OFDM)
+- status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
++ rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
+ phytype == B43_PHYTYPE_A);
+ else
+- status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
+- if (unlikely(status.rate_idx == -1)) {
++ rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
++ if (unlikely(rate_idx == -1)) {
+ /* PLCP seems to be corrupted.
+ * Drop the frame, if we are not interested in corrupted frames. */
+ if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
+ goto drop;
+ }
++ status.rate_idx = rate_idx;
+ status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
- for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
- if (!ATH_TXQ_SETUP(sc, i))
-@@ -2211,6 +2219,7 @@ static void ath_tx_complete_poll_work(st
- if (needreset) {
- ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
- "tx hung, resetting the chip\n");
-+ RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
+ /*
+--- a/drivers/net/wireless/libertas/cfg.c
++++ b/drivers/net/wireless/libertas/cfg.c
+@@ -2182,13 +2182,15 @@ int lbs_reg_notifier(struct wiphy *wiphy
+ struct regulatory_request *request)
+ {
+ struct lbs_private *priv = wiphy_priv(wiphy);
+- int ret;
++ int ret = 0;
+
+ lbs_deb_enter_args(LBS_DEB_CFG80211, "cfg80211 regulatory domain "
+ "callback for domain %c%c\n", request->alpha2[0],
+ request->alpha2[1]);
+
+- ret = lbs_set_11d_domain_info(priv, request, wiphy->bands);
++ memcpy(priv->country_code, request->alpha2, sizeof(request->alpha2));
++ if (lbs_iface_active(priv))
++ ret = lbs_set_11d_domain_info(priv);
+
+ lbs_deb_leave(LBS_DEB_CFG80211);
+ return ret;
+--- a/drivers/net/wireless/libertas/cmd.c
++++ b/drivers/net/wireless/libertas/cmd.c
+@@ -733,15 +733,13 @@ int lbs_get_rssi(struct lbs_private *pri
+ * to the firmware
+ *
+ * @priv: pointer to &struct lbs_private
+- * @request: cfg80211 regulatory request structure
+- * @bands: the device's supported bands and channels
+ *
+ * returns: 0 on success, error code on failure
+ */
+-int lbs_set_11d_domain_info(struct lbs_private *priv,
+- struct regulatory_request *request,
+- struct ieee80211_supported_band **bands)
++int lbs_set_11d_domain_info(struct lbs_private *priv)
+ {
++ struct wiphy *wiphy = priv->wdev->wiphy;
++ struct ieee80211_supported_band **bands = wiphy->bands;
+ struct cmd_ds_802_11d_domain_info cmd;
+ struct mrvl_ie_domain_param_set *domain = &cmd.domain;
+ struct ieee80211_country_ie_triplet *t;
+@@ -752,21 +750,23 @@ int lbs_set_11d_domain_info(struct lbs_p
+ u8 first_channel = 0, next_chan = 0, max_pwr = 0;
+ u8 i, flag = 0;
+ size_t triplet_size;
+- int ret;
++ int ret = 0;
+
+ lbs_deb_enter(LBS_DEB_11D);
++ if (!priv->country_code[0])
++ goto out;
+
+ memset(&cmd, 0, sizeof(cmd));
+ cmd.action = cpu_to_le16(CMD_ACT_SET);
+
+ lbs_deb_11d("Setting country code '%c%c'\n",
+- request->alpha2[0], request->alpha2[1]);
++ priv->country_code[0], priv->country_code[1]);
+
+ domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN);
+
+ /* Set country code */
+- domain->country_code[0] = request->alpha2[0];
+- domain->country_code[1] = request->alpha2[1];
++ domain->country_code[0] = priv->country_code[0];
++ domain->country_code[1] = priv->country_code[1];
+ domain->country_code[2] = ' ';
+
+ /* Now set up the channel triplets; firmware is somewhat picky here
+@@ -848,6 +848,7 @@ int lbs_set_11d_domain_info(struct lbs_p
+
+ ret = lbs_cmd_with_response(priv, CMD_802_11D_DOMAIN_INFO, &cmd);
+
++out:
+ lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
+ return ret;
+ }
+@@ -1019,9 +1020,9 @@ static void lbs_submit_command(struct lb
+ if (ret) {
+ netdev_info(priv->dev, "DNLD_CMD: hw_host_to_card failed: %d\n",
+ ret);
+- /* Let the timer kick in and retry, and potentially reset
+- the whole thing if the condition persists */
+- timeo = HZ/4;
++ /* Reset dnld state machine, report failure */
++ priv->dnld_sent = DNLD_RES_RECEIVED;
++ lbs_complete_command(priv, cmdnode, ret);
}
---- a/drivers/net/wireless/ath/carl9170/main.c
-+++ b/drivers/net/wireless/ath/carl9170/main.c
-@@ -1914,7 +1914,6 @@ static int carl9170_parse_eeprom(struct
- ar->hw->channel_change_time = 80 * 1000;
+ if (command == CMD_802_11_DEEP_SLEEP) {
+--- a/drivers/net/wireless/libertas/cmd.h
++++ b/drivers/net/wireless/libertas/cmd.h
+@@ -128,9 +128,7 @@ int lbs_set_monitor_mode(struct lbs_priv
+
+ int lbs_get_rssi(struct lbs_private *priv, s8 *snr, s8 *nf);
+
+-int lbs_set_11d_domain_info(struct lbs_private *priv,
+- struct regulatory_request *request,
+- struct ieee80211_supported_band **bands);
++int lbs_set_11d_domain_info(struct lbs_private *priv);
+
+ int lbs_get_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 *value);
+
+--- a/drivers/net/wireless/libertas/dev.h
++++ b/drivers/net/wireless/libertas/dev.h
+@@ -49,6 +49,7 @@ struct lbs_private {
+ bool wiphy_registered;
+ struct cfg80211_scan_request *scan_req;
+ u8 assoc_bss[ETH_ALEN];
++ u8 country_code[IEEE80211_COUNTRY_STRING_LEN];
+ u8 disassoc_reason;
+
+ /* Mesh */
+--- a/drivers/net/wireless/libertas/if_usb.c
++++ b/drivers/net/wireless/libertas/if_usb.c
+@@ -311,7 +311,6 @@ static void if_usb_disconnect(struct usb
+ cardp->surprise_removed = 1;
+
+ if (priv) {
+- priv->surpriseremoved = 1;
+ lbs_stop_card(priv);
+ lbs_remove_card(priv);
+ }
+--- a/drivers/net/wireless/libertas/main.c
++++ b/drivers/net/wireless/libertas/main.c
+@@ -154,6 +154,12 @@ int lbs_start_iface(struct lbs_private *
+ goto err;
+ }
- regulatory->current_rd = le16_to_cpu(ar->eeprom.reg_domain[0]);
-- regulatory->current_rd_ext = le16_to_cpu(ar->eeprom.reg_domain[1]);
++ ret = lbs_set_11d_domain_info(priv);
++ if (ret) {
++ lbs_deb_net("set 11d domain info failed\n");
++ goto err;
++ }
++
+ lbs_update_channel(priv);
- /* second part of wiphy init */
- SET_IEEE80211_PERM_ADDR(ar->hw, ar->eeprom.mac_address);
+ priv->iface_running = true;
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
-@@ -1119,6 +1119,7 @@ struct cfg80211_ibss_params {
- u8 *ssid;
- u8 *bssid;
- struct ieee80211_channel *channel;
-+ enum nl80211_channel_type channel_type;
- u8 *ie;
- u8 ssid_len, ie_len;
- u16 beacon_interval;
-@@ -3185,6 +3186,16 @@ void cfg80211_gtk_rekey_notify(struct ne
- void cfg80211_pmksa_candidate_notify(struct net_device *dev, int index,
- const u8 *bssid, bool preauth, gfp_t gfp);
-
-+/**
-+ * cfg80211_can_use_ext_chan - test if ht40 on extension channel can be used
-+ * @wiphy: the wiphy
-+ * @chan: main channel
-+ * @channel_type: HT mode
-+ */
-+bool cfg80211_can_beacon_sec_chan(struct wiphy *wiphy,
-+ struct ieee80211_channel *chan,
-+ enum nl80211_channel_type channel_type);
-+
- /* Logging, debugging and troubleshooting/diagnostic helpers. */
+@@ -1504,8 +1504,6 @@ struct cfg80211_gtk_rekey_data {
+ * interfaces are active this callback should reject the configuration.
+ * If no interfaces are active or the device is down, the channel should
+ * be stored for when a monitor interface becomes active.
+- * @set_monitor_enabled: Notify driver that there are only monitor
+- * interfaces running.
+ *
+ * @scan: Request to do a scan. If returning zero, the scan request is given
+ * the driver, and will be valid until passed to cfg80211_scan_done().
+@@ -1612,6 +1610,10 @@ struct cfg80211_gtk_rekey_data {
+ * @get_et_strings: Ethtool API to get a set of strings to describe stats
+ * and perhaps other supported types of ethtool data-sets.
+ * See @ethtool_ops.get_strings
++ *
++ * @get_channel: Get the current operating channel for the virtual interface.
++ * For monitor interfaces, it should return %NULL unless there's a single
++ * current monitoring channel.
+ */
+ struct cfg80211_ops {
+ int (*suspend)(struct wiphy *wiphy, struct cfg80211_wowlan *wow);
+@@ -1820,7 +1822,10 @@ struct cfg80211_ops {
+ void (*get_et_strings)(struct wiphy *wiphy, struct net_device *dev,
+ u32 sset, u8 *data);
+
+- void (*set_monitor_enabled)(struct wiphy *wiphy, bool enabled);
++ struct ieee80211_channel *
++ (*get_channel)(struct wiphy *wiphy,
++ struct wireless_dev *wdev,
++ enum nl80211_channel_type *type);
+ };
- /* wiphy_printk helpers, similar to dev_printk */
+ /*
--- a/net/mac80211/agg-rx.c
+++ b/net/mac80211/agg-rx.c
-@@ -180,6 +180,10 @@ static void ieee80211_send_addba_resp(st
- memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
- else if (sdata->vif.type == NL80211_IFTYPE_STATION)
+@@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
+ else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
+ memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
+ else if (sdata->vif.type == NL80211_IFTYPE_WDS)
+ memcpy(mgmt->bssid, da, ETH_ALEN);
-+ else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
-+ memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
IEEE80211_STYPE_ACTION);
--- a/net/mac80211/agg-tx.c
+++ b/net/mac80211/agg-tx.c
-@@ -77,10 +77,13 @@ static void ieee80211_send_addba_request
- memcpy(mgmt->da, da, ETH_ALEN);
+@@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
if (sdata->vif.type == NL80211_IFTYPE_AP ||
-- sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
-+ sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
+ sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
+- sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
++ sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
+ sdata->vif.type == NL80211_IFTYPE_WDS)
memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
else if (sdata->vif.type == NL80211_IFTYPE_STATION)
memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-+ else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
-+ memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
-
- mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ACTION);
-@@ -397,7 +400,9 @@ int ieee80211_start_tx_ba_session(struct
- */
- if (sdata->vif.type != NL80211_IFTYPE_STATION &&
+@@ -460,6 +461,7 @@ int ieee80211_start_tx_ba_session(struct
+ sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
-- sdata->vif.type != NL80211_IFTYPE_AP)
-+ sdata->vif.type != NL80211_IFTYPE_AP &&
-+ sdata->vif.type != NL80211_IFTYPE_ADHOC &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS)
+ sdata->vif.type != NL80211_IFTYPE_AP &&
++ sdata->vif.type != NL80211_IFTYPE_WDS &&
+ sdata->vif.type != NL80211_IFTYPE_ADHOC)
return -EINVAL;
- if (test_sta_flag(sta, WLAN_STA_BLOCK_BA)) {
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
-@@ -1886,7 +1886,7 @@ ieee80211_offchan_tx_done(struct ieee802
- * so in that case userspace will have to deal with it.
- */
+@@ -2982,14 +2982,14 @@ static int ieee80211_probe_client(struct
+ return 0;
+ }
+
+-static void ieee80211_set_monitor_enabled(struct wiphy *wiphy, bool enabled)
++static struct ieee80211_channel *
++ieee80211_cfg_get_channel(struct wiphy *wiphy, struct wireless_dev *wdev,
++ enum nl80211_channel_type *type)
+ {
+ struct ieee80211_local *local = wiphy_priv(wiphy);
+
+- if (enabled)
+- WARN_ON(ieee80211_add_virtual_monitor(local));
+- else
+- ieee80211_del_virtual_monitor(local);
++ *type = local->_oper_channel_type;
++ return local->oper_channel;
+ }
-- if (wk->offchan_tx.wait && wk->offchan_tx.frame)
-+ if (wk->offchan_tx.wait && !wk->offchan_tx.status)
- cfg80211_mgmt_tx_status(wk->sdata->dev,
- (unsigned long) wk->offchan_tx.frame,
- wk->ie, wk->ie_len, false, GFP_KERNEL);
+ #ifdef CONFIG_PM
+@@ -3066,11 +3066,11 @@ struct cfg80211_ops mac80211_config_ops
+ .tdls_mgmt = ieee80211_tdls_mgmt,
+ .probe_client = ieee80211_probe_client,
+ .set_noack_map = ieee80211_set_noack_map,
+- .set_monitor_enabled = ieee80211_set_monitor_enabled,
+ #ifdef CONFIG_PM
+ .set_wakeup = ieee80211_set_wakeup,
+ #endif
+ .get_et_sset_count = ieee80211_get_et_sset_count,
+ .get_et_stats = ieee80211_get_et_stats,
+ .get_et_strings = ieee80211_get_et_strings,
++ .get_channel = ieee80211_cfg_get_channel,
+ };
--- a/net/mac80211/debugfs_sta.c
+++ b/net/mac80211/debugfs_sta.c
@@ -63,11 +63,11 @@ static ssize_t sta_flags_read(struct fil
test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
int res = scnprintf(buf, sizeof(buf),
-- "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
-+ "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
+- "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
++ "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
TEST(PS_DRIVER), TEST(AUTHORIZED),
- TEST(SHORT_PREAMBLE), TEST(ASSOC_AP),
+ TEST(SHORT_PREAMBLE),
- TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
+ TEST(WME), TEST(CLEAR_PS_FILT),
TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
- TEST(TDLS_PEER_AUTH));
---- a/net/mac80211/ht.c
-+++ b/net/mac80211/ht.c
-@@ -199,6 +199,8 @@ void ieee80211_send_delba(struct ieee802
- memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
- else if (sdata->vif.type == NL80211_IFTYPE_STATION)
- memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-+ else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
-+ memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
-
- mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ACTION);
---- a/net/mac80211/ibss.c
-+++ b/net/mac80211/ibss.c
-@@ -77,6 +77,7 @@ static void __ieee80211_sta_join_ibss(st
- struct cfg80211_bss *bss;
- u32 bss_change;
- u8 supp_rates[IEEE80211_MAX_SUPP_RATES];
-+ enum nl80211_channel_type channel_type;
-
- lockdep_assert_held(&ifibss->mtx);
-
-@@ -104,8 +105,16 @@ static void __ieee80211_sta_join_ibss(st
-
- sdata->drop_unencrypted = capability & WLAN_CAPABILITY_PRIVACY ? 1 : 0;
-
-- local->oper_channel = chan;
-- WARN_ON(!ieee80211_set_channel_type(local, sdata, NL80211_CHAN_NO_HT));
-+ channel_type = ifibss->channel_type;
-+ if (channel_type > NL80211_CHAN_HT20 &&
-+ !cfg80211_can_beacon_sec_chan(local->hw.wiphy, chan, channel_type))
-+ channel_type = NL80211_CHAN_HT20;
-+ if (!ieee80211_set_channel_type(local, sdata, channel_type)) {
-+ /* can only fail due to HT40+/- mismatch */
-+ channel_type = NL80211_CHAN_HT20;
-+ WARN_ON(!ieee80211_set_channel_type(local, sdata,
-+ NL80211_CHAN_HT20));
-+ }
- ieee80211_hw_config(local, IEEE80211_CONF_CHANGE_CHANNEL);
-
- sband = local->hw.wiphy->bands[chan->band];
-@@ -171,6 +180,18 @@ static void __ieee80211_sta_join_ibss(st
- memcpy(skb_put(skb, ifibss->ie_len),
- ifibss->ie, ifibss->ie_len);
-
-+ /* add HT capability and information IEs */
-+ if (channel_type && sband->ht_cap.ht_supported) {
-+ pos = skb_put(skb, 4 +
-+ sizeof(struct ieee80211_ht_cap) +
-+ sizeof(struct ieee80211_ht_info));
-+ pos = ieee80211_ie_build_ht_cap(pos, sband, sband->ht_cap.cap);
-+ pos = ieee80211_ie_build_ht_info(pos,
-+ &sband->ht_cap,
-+ chan,
-+ channel_type);
-+ }
-+
- if (local->hw.queues >= 4) {
- pos = skb_put(skb, 9);
- *pos++ = WLAN_EID_VENDOR_SPECIFIC;
-@@ -194,6 +215,7 @@ static void __ieee80211_sta_join_ibss(st
- bss_change |= BSS_CHANGED_BEACON;
- bss_change |= BSS_CHANGED_BEACON_ENABLED;
- bss_change |= BSS_CHANGED_BASIC_RATES;
-+ bss_change |= BSS_CHANGED_HT;
- bss_change |= BSS_CHANGED_IBSS;
- sdata->vif.bss_conf.ibss_joined = true;
- ieee80211_bss_info_change_notify(sdata, bss_change);
-@@ -266,6 +288,7 @@ static void ieee80211_rx_bss_info(struct
- u64 beacon_timestamp, rx_timestamp;
- u32 supp_rates = 0;
- enum ieee80211_band band = rx_status->band;
-+ struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
-
- if (elems->ds_params && elems->ds_params_len == 1)
- freq = ieee80211_channel_to_frequency(elems->ds_params[0],
-@@ -275,7 +298,10 @@ static void ieee80211_rx_bss_info(struct
-
- channel = ieee80211_get_channel(local->hw.wiphy, freq);
-
-- if (!channel || channel->flags & IEEE80211_CHAN_DISABLED)
-+ if (!channel ||
-+ channel->flags & (IEEE80211_CHAN_DISABLED ||
-+ IEEE80211_CHAN_NO_IBSS ||
-+ IEEE80211_CHAN_RADAR))
- return;
-
- if (sdata->vif.type == NL80211_IFTYPE_ADHOC &&
-@@ -313,8 +339,41 @@ static void ieee80211_rx_bss_info(struct
- GFP_ATOMIC);
- }
-
-- if (sta && elems->wmm_info)
-- set_sta_flag(sta, WLAN_STA_WME);
-+ if (sta) {
-+ if (elems->wmm_info)
-+ set_sta_flag(sta, WLAN_STA_WME);
-+
-+ /* we both use HT */
-+ if (elems->ht_info_elem && elems->ht_cap_elem &&
-+ sdata->u.ibss.channel_type) {
-+ enum nl80211_channel_type channel_type =
-+ ieee80211_ht_info_to_channel_type(
-+ elems->ht_info_elem);
-+ struct ieee80211_sta_ht_cap sta_ht_cap_new;
-+
-+ /*
-+ * fall back to HT20 if we don't use or use
-+ * the other extension channel
-+ */
-+ if (channel_type > NL80211_CHAN_HT20 &&
-+ channel_type != sdata->u.ibss.channel_type)
-+ channel_type = NL80211_CHAN_HT20;
-+
-+ ieee80211_ht_cap_ie_to_sta_ht_cap(sband,
-+ elems->ht_cap_elem,
-+ &sta_ht_cap_new);
-+ if (memcmp(&sta->sta.ht_cap, &sta_ht_cap_new,
-+ sizeof(sta_ht_cap_new))) {
-+ memcpy(&sta->sta.ht_cap,
-+ &sta_ht_cap_new,
-+ sizeof(sta_ht_cap_new));
-+ rate_control_rate_update(local, sband,
-+ sta,
-+ IEEE80211_RC_HT_CHANGED,
-+ channel_type);
-+ }
-+ }
-+ }
-
- rcu_read_unlock();
- }
-@@ -896,10 +955,15 @@ int ieee80211_ibss_join(struct ieee80211
- struct sk_buff *skb;
-
- skb = dev_alloc_skb(sdata->local->hw.extra_tx_headroom +
-- 36 /* bitrates */ +
-- 34 /* SSID */ +
-- 3 /* DS params */ +
-- 4 /* IBSS params */ +
-+ sizeof(struct ieee80211_hdr_3addr) +
-+ 12 /* struct ieee80211_mgmt.u.beacon */ +
-+ 2 + IEEE80211_MAX_SSID_LEN /* max SSID */ +
-+ 2 + 8 /* max Supported Rates */ +
-+ 3 /* max DS params */ +
-+ 4 /* IBSS params */ +
-+ 2 + (IEEE80211_MAX_SUPP_RATES - 8) +
-+ 2 + sizeof(struct ieee80211_ht_cap) +
-+ 2 + sizeof(struct ieee80211_ht_info) +
- params->ie_len);
- if (!skb)
- return -ENOMEM;
-@@ -920,13 +984,15 @@ int ieee80211_ibss_join(struct ieee80211
- sdata->vif.bss_conf.beacon_int = params->beacon_interval;
-
- sdata->u.ibss.channel = params->channel;
-+ sdata->u.ibss.channel_type = params->channel_type;
- sdata->u.ibss.fixed_channel = params->channel_fixed;
-
- /* fix ourselves to that channel now already */
- if (params->channel_fixed) {
- sdata->local->oper_channel = params->channel;
-- WARN_ON(!ieee80211_set_channel_type(sdata->local, sdata,
-- NL80211_CHAN_NO_HT));
-+ if (!ieee80211_set_channel_type(sdata->local, sdata,
-+ params->channel_type))
-+ return -EINVAL;
- }
-
- if (params->ie) {
+ TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
-@@ -346,6 +346,7 @@ struct ieee80211_work {
- struct {
- struct sk_buff *frame;
- u32 wait;
-+ bool status;
- } offchan_tx;
- };
-
-@@ -465,6 +466,7 @@ struct ieee80211_if_ibss {
- u8 ssid_len, ie_len;
- u8 *ie;
- struct ieee80211_channel *channel;
-+ enum nl80211_channel_type channel_type;
+@@ -1496,10 +1496,6 @@ int ieee80211_add_srates_ie(struct ieee8
+ int ieee80211_add_ext_srates_ie(struct ieee80211_sub_if_data *sdata,
+ struct sk_buff *skb, bool need_basic);
- unsigned long ibss_join_req;
- /* probe response/beacon for IBSS */
-@@ -1351,6 +1353,12 @@ void ieee80211_recalc_smps(struct ieee80
- size_t ieee80211_ie_split(const u8 *ies, size_t ielen,
- const u8 *ids, int n_ids, size_t offset);
- size_t ieee80211_ie_split_vendor(const u8 *ies, size_t ielen, size_t offset);
-+u8 *ieee80211_ie_build_ht_cap(u8 *pos, struct ieee80211_supported_band *sband,
-+ u16 cap);
-+u8 *ieee80211_ie_build_ht_info(u8 *pos,
-+ struct ieee80211_sta_ht_cap *ht_cap,
-+ struct ieee80211_channel *channel,
-+ enum nl80211_channel_type channel_type);
-
- /* internal work items */
- void ieee80211_work_init(struct ieee80211_local *local);
-@@ -1379,6 +1387,8 @@ ieee80211_get_channel_mode(struct ieee80
- bool ieee80211_set_channel_type(struct ieee80211_local *local,
- struct ieee80211_sub_if_data *sdata,
- enum nl80211_channel_type chantype);
-+enum nl80211_channel_type
-+ieee80211_ht_info_to_channel_type(struct ieee80211_ht_info *ht_info);
-
- #ifdef CONFIG_MAC80211_NOINLINE
- #define debug_noinline noinline
+-/* virtual monitor */
+-int ieee80211_add_virtual_monitor(struct ieee80211_local *local);
+-void ieee80211_del_virtual_monitor(struct ieee80211_local *local);
+-
+ /* channel management */
+ enum ieee80211_chan_mode {
+ CHAN_MODE_UNDEFINED,
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
-@@ -178,7 +178,6 @@ static int ieee80211_do_open(struct net_
+@@ -331,7 +331,7 @@ static void ieee80211_set_default_queues
+ sdata->vif.cab_queue = IEEE80211_INVAL_HW_QUEUE;
+ }
+
+-int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
++static int ieee80211_add_virtual_monitor(struct ieee80211_local *local)
+ {
+ struct ieee80211_sub_if_data *sdata;
+ int ret = 0;
+@@ -377,7 +377,7 @@ int ieee80211_add_virtual_monitor(struct
+ return ret;
+ }
+
+-void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
++static void ieee80211_del_virtual_monitor(struct ieee80211_local *local)
+ {
+ struct ieee80211_sub_if_data *sdata;
+
+@@ -410,7 +410,6 @@ static int ieee80211_do_open(struct net_
{
struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
struct ieee80211_local *local = sdata->local;
u32 changed = 0;
int res;
u32 hw_reconf_flags = 0;
-@@ -290,27 +289,6 @@ static int ieee80211_do_open(struct net_
+@@ -497,6 +496,12 @@ static int ieee80211_do_open(struct net_
+ break;
+ }
+
++ if (local->monitors == 0 && local->open_count == 0) {
++ res = ieee80211_add_virtual_monitor(local);
++ if (res)
++ goto err_stop;
++ }
++
+ /* must be before the call to ieee80211_configure_filter */
+ local->monitors++;
+ if (local->monitors == 1) {
+@@ -511,6 +516,8 @@ static int ieee80211_do_open(struct net_
+ break;
+ default:
+ if (coming_up) {
++ ieee80211_del_virtual_monitor(local);
++
+ res = drv_add_interface(local, sdata);
+ if (res)
+ goto err_stop;
+@@ -548,28 +555,6 @@ static int ieee80211_do_open(struct net_
set_bit(SDATA_STATE_RUNNING, &sdata->state);
- goto err_del_interface;
- }
-
-- /* no atomic bitop required since STA is not live yet */
-- set_sta_flag(sta, WLAN_STA_AUTHORIZED);
+- sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
+- sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
+- sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
-
- res = sta_info_insert(sta);
- if (res) {
/*
* set_multicast_list will be invoked by the networking core
* which will check whether any increments here were done in
-@@ -344,8 +322,7 @@ static int ieee80211_do_open(struct net_
- netif_tx_start_all_queues(dev);
+@@ -750,6 +735,7 @@ static void ieee80211_do_stop(struct iee
+ if (local->monitors == 0) {
+ local->hw.conf.flags &= ~IEEE80211_CONF_MONITOR;
+ hw_reconf_flags |= IEEE80211_CONF_CHANGE_MONITOR;
++ ieee80211_del_virtual_monitor(local);
+ }
- return 0;
-- err_del_interface:
-- drv_remove_interface(local, &sdata->vif);
+ ieee80211_adjust_monitor_flags(sdata, -1);
+@@ -823,6 +809,9 @@ static void ieee80211_do_stop(struct iee
+ }
+ }
+ spin_unlock_irqrestore(&local->queue_stop_reason_lock, flags);
+
- err_stop:
- if (!local->open_count)
- drv_stop(local);
-@@ -716,6 +693,70 @@ static void ieee80211_if_setup(struct ne
++ if (local->monitors == local->open_count && local->monitors > 0)
++ ieee80211_add_virtual_monitor(local);
+ }
+
+ static int ieee80211_stop(struct net_device *dev)
+@@ -959,6 +948,72 @@ static void ieee80211_if_setup(struct ne
dev->destructor = free_netdev;
}
+ ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
+ skb->len - baselen, &elems);
+
-+ rates = ieee80211_sta_get_rates(local, &elems, band);
++ rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
+
+ rcu_read_lock();
+
+ sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
+
+ if (elems.ht_cap_elem)
-+ ieee80211_ht_cap_ie_to_sta_ht_cap(sband,
++ ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
+ elems.ht_cap_elem, &sta->sta.ht_cap);
+
+ if (elems.wmm_param)
+ set_sta_flag(sta, WLAN_STA_WME);
+
+ if (new) {
-+ set_sta_flag(sta, WLAN_STA_AUTHORIZED);
++ sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
++ sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
++ sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
+ rate_control_rate_init(sta);
+ sta_info_insert_rcu(sta);
+ }
static void ieee80211_iface_work(struct work_struct *work)
{
struct ieee80211_sub_if_data *sdata =
-@@ -820,6 +861,9 @@ static void ieee80211_iface_work(struct
+@@ -1063,6 +1118,9 @@ static void ieee80211_iface_work(struct
break;
ieee80211_mesh_rx_queued_mgmt(sdata, skb);
break;
default:
WARN(1, "frame for unexpected interface type");
break;
+--- a/net/mac80211/offchannel.c
++++ b/net/mac80211/offchannel.c
+@@ -324,6 +324,7 @@ void ieee80211_sw_roc_work(struct work_s
+ container_of(work, struct ieee80211_roc_work, work.work);
+ struct ieee80211_sub_if_data *sdata = roc->sdata;
+ struct ieee80211_local *local = sdata->local;
++ bool started;
+
+ mutex_lock(&local->mtx);
+
+@@ -366,9 +367,10 @@ void ieee80211_sw_roc_work(struct work_s
+ /* finish this ROC */
+ finish:
+ list_del(&roc->list);
++ started = roc->started;
+ ieee80211_roc_notify_destroy(roc);
+
+- if (roc->started) {
++ if (started) {
+ drv_flush(local, false);
+
+ local->tmp_channel = NULL;
+@@ -379,7 +381,7 @@ void ieee80211_sw_roc_work(struct work_s
+
+ ieee80211_recalc_idle(local);
+
+- if (roc->started)
++ if (started)
+ ieee80211_start_next_roc(local);
+ }
+
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
-@@ -2211,7 +2211,9 @@ ieee80211_rx_h_action(struct ieee80211_r
- */
- if (sdata->vif.type != NL80211_IFTYPE_STATION &&
+@@ -2239,6 +2239,7 @@ ieee80211_rx_h_action(struct ieee80211_r
+ sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
-- sdata->vif.type != NL80211_IFTYPE_AP)
-+ sdata->vif.type != NL80211_IFTYPE_AP &&
-+ sdata->vif.type != NL80211_IFTYPE_ADHOC &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS)
+ sdata->vif.type != NL80211_IFTYPE_AP &&
++ sdata->vif.type != NL80211_IFTYPE_WDS &&
+ sdata->vif.type != NL80211_IFTYPE_ADHOC)
break;
- /* verify action_code is present */
-@@ -2426,13 +2428,14 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
+@@ -2456,14 +2457,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
if (!ieee80211_vif_is_mesh(&sdata->vif) &&
sdata->vif.type != NL80211_IFTYPE_ADHOC &&
return RX_DROP_MONITOR;
switch (stype) {
+ case cpu_to_le16(IEEE80211_STYPE_AUTH):
case cpu_to_le16(IEEE80211_STYPE_BEACON):
case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
- /* process for all: mesh, mlme, ibss */
+ /* process for all: mesh, mlme, ibss, wds */
break;
- case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
- case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
-@@ -2775,10 +2778,16 @@ static int prepare_for_handlers(struct i
+ case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
+ case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
+@@ -2788,10 +2790,16 @@ static int prepare_for_handlers(struct i
}
break;
case NL80211_IFTYPE_WDS:
- if (bssid || !ieee80211_is_data(hdr->frame_control))
- return 0;
- if (compare_ether_addr(sdata->u.wds.remote_addr, hdr->addr2))
+ if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
return 0;
+
+ if (ieee80211_is_data(hdr->frame_control) ||
--- a/net/mac80211/sta_info.h
+++ b/net/mac80211/sta_info.h
@@ -32,7 +32,6 @@
+ * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
* frames.
- * @WLAN_STA_ASSOC_AP: We're associated to that station, it is an AP.
* @WLAN_STA_WME: Station is a QoS-STA.
- * @WLAN_STA_WDS: Station is one of our WDS peers.
* @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
* IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
* frame to this station is transmitted.
-@@ -61,7 +60,6 @@ enum ieee80211_sta_info_flags {
+@@ -64,7 +63,6 @@ enum ieee80211_sta_info_flags {
+ WLAN_STA_AUTHORIZED,
WLAN_STA_SHORT_PREAMBLE,
- WLAN_STA_ASSOC_AP,
WLAN_STA_WME,
- WLAN_STA_WDS,
WLAN_STA_CLEAR_PS_FILT,
WLAN_STA_MFP,
WLAN_STA_BLOCK_BA,
---- a/net/mac80211/status.c
-+++ b/net/mac80211/status.c
-@@ -429,7 +429,7 @@ void ieee80211_tx_status(struct ieee8021
- continue;
- if (wk->offchan_tx.frame != skb)
- continue;
-- wk->offchan_tx.frame = NULL;
-+ wk->offchan_tx.status = true;
- break;
- }
- rcu_read_unlock();
---- a/net/mac80211/util.c
-+++ b/net/mac80211/util.c
-@@ -836,23 +836,8 @@ int ieee80211_build_preq_ies(struct ieee
- offset = noffset;
- }
+--- a/net/wireless/chan.c
++++ b/net/wireless/chan.c
+@@ -82,7 +82,6 @@ int cfg80211_set_monitor_channel(struct
+ int freq, enum nl80211_channel_type chantype)
+ {
+ struct ieee80211_channel *chan;
+- int err;
-- if (sband->ht_cap.ht_supported) {
-- u16 cap = sband->ht_cap.cap;
-- __le16 tmp;
--
-- *pos++ = WLAN_EID_HT_CAPABILITY;
-- *pos++ = sizeof(struct ieee80211_ht_cap);
-- memset(pos, 0, sizeof(struct ieee80211_ht_cap));
-- tmp = cpu_to_le16(cap);
-- memcpy(pos, &tmp, sizeof(u16));
-- pos += sizeof(u16);
-- *pos++ = sband->ht_cap.ampdu_factor |
-- (sband->ht_cap.ampdu_density <<
-- IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
-- memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
-- pos += sizeof(sband->ht_cap.mcs);
-- pos += 2 + 4 + 1; /* ext info, BF cap, antsel */
-- }
-+ if (sband->ht_cap.ht_supported)
-+ pos = ieee80211_ie_build_ht_cap(pos, sband, sband->ht_cap.cap);
+ if (!rdev->ops->set_monitor_channel)
+ return -EOPNOTSUPP;
+@@ -93,13 +92,7 @@ int cfg80211_set_monitor_channel(struct
+ if (!chan)
+ return -EINVAL;
- /*
- * If adding more here, adjust code in main.c
-@@ -1443,3 +1428,100 @@ int ieee80211_add_ext_srates_ie(struct i
- }
- return 0;
+- err = rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
+- if (!err) {
+- rdev->monitor_channel = chan;
+- rdev->monitor_channel_type = chantype;
+- }
+-
+- return err;
++ return rdev->ops->set_monitor_channel(&rdev->wiphy, chan, chantype);
}
-+
-+u8 *ieee80211_ie_build_ht_cap(u8 *pos, struct ieee80211_supported_band *sband,
-+ u16 cap)
-+{
-+ __le16 tmp;
-+
-+ *pos++ = WLAN_EID_HT_CAPABILITY;
-+ *pos++ = sizeof(struct ieee80211_ht_cap);
-+ memset(pos, 0, sizeof(struct ieee80211_ht_cap));
-+
-+ /* capability flags */
-+ tmp = cpu_to_le16(cap);
-+ memcpy(pos, &tmp, sizeof(u16));
-+ pos += sizeof(u16);
-+
-+ /* AMPDU parameters */
-+ *pos++ = sband->ht_cap.ampdu_factor |
-+ (sband->ht_cap.ampdu_density <<
-+ IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
-+
-+ /* MCS set */
-+ memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
-+ pos += sizeof(sband->ht_cap.mcs);
-+
-+ /* extended capabilities */
-+ pos += sizeof(__le16);
-+
-+ /* BF capabilities */
-+ pos += sizeof(__le32);
-+
-+ /* antenna selection */
-+ pos += sizeof(u8);
-+
-+ return pos;
-+}
-+
-+u8 *ieee80211_ie_build_ht_info(u8 *pos,
-+ struct ieee80211_sta_ht_cap *ht_cap,
-+ struct ieee80211_channel *channel,
-+ enum nl80211_channel_type channel_type)
-+{
-+ struct ieee80211_ht_info *ht_info;
-+ /* Build HT Information */
-+ *pos++ = WLAN_EID_HT_INFORMATION;
-+ *pos++ = sizeof(struct ieee80211_ht_info);
-+ ht_info = (struct ieee80211_ht_info *)pos;
-+ ht_info->control_chan =
-+ ieee80211_frequency_to_channel(channel->center_freq);
-+ switch (channel_type) {
-+ case NL80211_CHAN_HT40MINUS:
-+ ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
-+ break;
-+ case NL80211_CHAN_HT40PLUS:
-+ ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
-+ break;
-+ case NL80211_CHAN_HT20:
-+ default:
-+ ht_info->ht_param = IEEE80211_HT_PARAM_CHA_SEC_NONE;
-+ break;
-+ }
-+ if (ht_cap->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
-+ ht_info->ht_param |= IEEE80211_HT_PARAM_CHAN_WIDTH_ANY;
-+ ht_info->operation_mode = 0x0000;
-+ ht_info->stbc_param = 0x0000;
-+
-+ /* It seems that Basic MCS set and Supported MCS set
-+ are identical for the first 10 bytes */
-+ memset(&ht_info->basic_set, 0, 16);
-+ memcpy(&ht_info->basic_set, &ht_cap->mcs, 10);
-+
-+ return pos + sizeof(struct ieee80211_ht_info);
-+}
-+
-+enum nl80211_channel_type
-+ieee80211_ht_info_to_channel_type(struct ieee80211_ht_info *ht_info)
-+{
-+ enum nl80211_channel_type channel_type;
-+
-+ if (!ht_info)
-+ return NL80211_CHAN_NO_HT;
-+
-+ switch (ht_info->ht_param & IEEE80211_HT_PARAM_CHA_SEC_OFFSET) {
-+ case IEEE80211_HT_PARAM_CHA_SEC_NONE:
-+ channel_type = NL80211_CHAN_HT20;
-+ break;
-+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
-+ channel_type = NL80211_CHAN_HT40PLUS;
-+ break;
-+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
-+ channel_type = NL80211_CHAN_HT40MINUS;
-+ break;
-+ default:
-+ channel_type = NL80211_CHAN_NO_HT;
-+ }
-+
-+ return channel_type;
-+}
---- a/net/mac80211/work.c
-+++ b/net/mac80211/work.c
-@@ -118,7 +118,6 @@ static void ieee80211_add_ht_ie(struct s
- u8 *pos;
- u32 flags = channel->flags;
- u16 cap = sband->ht_cap.cap;
-- __le16 tmp;
-
- if (!sband->ht_cap.ht_supported)
+
+ void
+@@ -134,9 +127,16 @@ cfg80211_get_chan_state(struct wireless_
+ break;
+ case NL80211_IFTYPE_AP:
+ case NL80211_IFTYPE_P2P_GO:
++ if (wdev->beacon_interval) {
++ *chan = wdev->channel;
++ *chanmode = CHAN_MODE_SHARED;
++ }
++ return;
+ case NL80211_IFTYPE_MESH_POINT:
+- *chan = wdev->channel;
+- *chanmode = CHAN_MODE_SHARED;
++ if (wdev->mesh_id_len) {
++ *chan = wdev->channel;
++ *chanmode = CHAN_MODE_SHARED;
++ }
return;
-@@ -169,34 +168,8 @@ static void ieee80211_add_ht_ie(struct s
- }
+ case NL80211_IFTYPE_MONITOR:
+ case NL80211_IFTYPE_AP_VLAN:
+--- a/net/wireless/core.c
++++ b/net/wireless/core.c
+@@ -747,60 +747,14 @@ static struct device_type wiphy_type = {
+ };
+ #endif
- /* reserve and fill IE */
+-static struct ieee80211_channel *
+-cfg80211_get_any_chan(struct cfg80211_registered_device *rdev)
+-{
+- struct ieee80211_supported_band *sband;
+- int i;
-
- pos = skb_put(skb, sizeof(struct ieee80211_ht_cap) + 2);
-- *pos++ = WLAN_EID_HT_CAPABILITY;
-- *pos++ = sizeof(struct ieee80211_ht_cap);
-- memset(pos, 0, sizeof(struct ieee80211_ht_cap));
+- for (i = 0; i < IEEE80211_NUM_BANDS; i++) {
+- sband = rdev->wiphy.bands[i];
+- if (sband && sband->n_channels > 0)
+- return &sband->channels[0];
+- }
-
-- /* capability flags */
-- tmp = cpu_to_le16(cap);
-- memcpy(pos, &tmp, sizeof(u16));
-- pos += sizeof(u16);
+- return NULL;
+-}
-
-- /* AMPDU parameters */
-- *pos++ = sband->ht_cap.ampdu_factor |
-- (sband->ht_cap.ampdu_density <<
-- IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT);
+-static void cfg80211_init_mon_chan(struct cfg80211_registered_device *rdev)
+-{
+- struct ieee80211_channel *chan;
-
-- /* MCS set */
-- memcpy(pos, &sband->ht_cap.mcs, sizeof(sband->ht_cap.mcs));
-- pos += sizeof(sband->ht_cap.mcs);
+- chan = cfg80211_get_any_chan(rdev);
+- if (WARN_ON(!chan))
+- return;
-
-- /* extended capabilities */
-- pos += sizeof(__le16);
+- mutex_lock(&rdev->devlist_mtx);
+- WARN_ON(cfg80211_set_monitor_channel(rdev, chan->center_freq,
+- NL80211_CHAN_NO_HT));
+- mutex_unlock(&rdev->devlist_mtx);
+-}
-
-- /* BF capabilities */
-- pos += sizeof(__le32);
+ void cfg80211_update_iface_num(struct cfg80211_registered_device *rdev,
+ enum nl80211_iftype iftype, int num)
+ {
+- bool has_monitors_only_old = cfg80211_has_monitors_only(rdev);
+- bool has_monitors_only_new;
-
-- /* antenna selection */
-- pos += sizeof(u8);
-+ ieee80211_ie_build_ht_cap(pos, sband, cap);
- }
-
- static void ieee80211_send_assoc(struct ieee80211_sub_if_data *sdata,
-@@ -592,7 +565,7 @@ ieee80211_offchannel_tx(struct ieee80211
- /*
- * After this, offchan_tx.frame remains but now is no
- * longer a valid pointer -- we still need it as the
-- * cookie for canceling this work.
-+ * cookie for canceling this work/status matching.
- */
- ieee80211_tx_skb(wk->sdata, wk->offchan_tx.frame);
+ ASSERT_RTNL();
---- a/net/wireless/chan.c
-+++ b/net/wireless/chan.c
-@@ -44,9 +44,9 @@ rdev_freq_to_chan(struct cfg80211_regist
- return chan;
+ rdev->num_running_ifaces += num;
+ if (iftype == NL80211_IFTYPE_MONITOR)
+ rdev->num_running_monitor_ifaces += num;
+-
+- has_monitors_only_new = cfg80211_has_monitors_only(rdev);
+- if (has_monitors_only_new != has_monitors_only_old) {
+- if (rdev->ops->set_monitor_enabled)
+- rdev->ops->set_monitor_enabled(&rdev->wiphy,
+- has_monitors_only_new);
+-
+- if (!has_monitors_only_new) {
+- rdev->monitor_channel = NULL;
+- rdev->monitor_channel_type = NL80211_CHAN_NO_HT;
+- } else {
+- cfg80211_init_mon_chan(rdev);
+- }
+- }
}
--static bool can_beacon_sec_chan(struct wiphy *wiphy,
-- struct ieee80211_channel *chan,
-- enum nl80211_channel_type channel_type)
-+bool cfg80211_can_beacon_sec_chan(struct wiphy *wiphy,
-+ struct ieee80211_channel *chan,
-+ enum nl80211_channel_type channel_type)
- {
- struct ieee80211_channel *sec_chan;
- int diff;
-@@ -75,6 +75,7 @@ static bool can_beacon_sec_chan(struct w
+ static int cfg80211_netdev_notifier_call(struct notifier_block *nb,
+@@ -932,6 +886,7 @@ static int cfg80211_netdev_notifier_call
+ mutex_unlock(&rdev->devlist_mtx);
+ dev_put(dev);
+ }
++ cfg80211_update_iface_num(rdev, wdev->iftype, 1);
+ cfg80211_lock_rdev(rdev);
+ mutex_lock(&rdev->devlist_mtx);
+ wdev_lock(wdev);
+@@ -1026,7 +981,6 @@ static int cfg80211_netdev_notifier_call
+ mutex_unlock(&rdev->devlist_mtx);
+ if (ret)
+ return notifier_from_errno(ret);
+- cfg80211_update_iface_num(rdev, wdev->iftype, 1);
+ break;
+ }
- return true;
- }
-+EXPORT_SYMBOL(cfg80211_can_beacon_sec_chan);
-
- int cfg80211_set_freq(struct cfg80211_registered_device *rdev,
- struct wireless_dev *wdev, int freq,
-@@ -109,8 +110,8 @@ int cfg80211_set_freq(struct cfg80211_re
- switch (channel_type) {
- case NL80211_CHAN_HT40PLUS:
- case NL80211_CHAN_HT40MINUS:
-- if (!can_beacon_sec_chan(&rdev->wiphy, chan,
-- channel_type)) {
-+ if (!cfg80211_can_beacon_sec_chan(&rdev->wiphy, chan,
-+ channel_type)) {
- printk(KERN_DEBUG
- "cfg80211: Secondary channel not "
- "allowed to initiate communication\n");
+--- a/net/wireless/core.h
++++ b/net/wireless/core.h
+@@ -61,9 +61,6 @@ struct cfg80211_registered_device {
+ int num_running_ifaces;
+ int num_running_monitor_ifaces;
+
+- struct ieee80211_channel *monitor_channel;
+- enum nl80211_channel_type monitor_channel_type;
+-
+ /* BSSes/scanning */
+ spinlock_t bss_lock;
+ struct list_head bss_list;
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
-@@ -4570,13 +4570,34 @@ static int nl80211_join_ibss(struct sk_b
- ibss.ie_len = nla_len(info->attrs[NL80211_ATTR_IE]);
- }
-
-- ibss.channel = ieee80211_get_channel(wiphy,
-- nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]));
-+ if (info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]) {
+@@ -1759,11 +1759,17 @@ static int nl80211_send_iface(struct sk_
+ (cfg80211_rdev_list_generation << 2)))
+ goto nla_put_failure;
+
+- if (rdev->monitor_channel) {
+- if (nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ,
+- rdev->monitor_channel->center_freq) ||
+- nla_put_u32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE,
+- rdev->monitor_channel_type))
++ if (rdev->ops->get_channel) {
++ struct ieee80211_channel *chan;
+ enum nl80211_channel_type channel_type;
+
-+ channel_type = nla_get_u32(
-+ info->attrs[NL80211_ATTR_WIPHY_CHANNEL_TYPE]);
-+ if (channel_type > NL80211_CHAN_HT40PLUS)
++ chan = rdev->ops->get_channel(&rdev->wiphy, wdev,
++ &channel_type);
++ if (chan &&
++ (nla_put_u32(msg, NL80211_ATTR_WIPHY_FREQ,
++ chan->center_freq) ||
++ nla_put_u32(msg, NL80211_ATTR_WIPHY_CHANNEL_TYPE,
++ channel_type)))
+ goto nla_put_failure;
+ }
+
+--- a/net/wireless/wext-compat.c
++++ b/net/wireless/wext-compat.c
+@@ -827,6 +827,8 @@ static int cfg80211_wext_giwfreq(struct
+ {
+ struct wireless_dev *wdev = dev->ieee80211_ptr;
+ struct cfg80211_registered_device *rdev = wiphy_to_dev(wdev->wiphy);
++ struct ieee80211_channel *chan;
++ enum nl80211_channel_type channel_type;
+
+ switch (wdev->iftype) {
+ case NL80211_IFTYPE_STATION:
+@@ -834,10 +836,13 @@ static int cfg80211_wext_giwfreq(struct
+ case NL80211_IFTYPE_ADHOC:
+ return cfg80211_ibss_wext_giwfreq(dev, info, freq, extra);
+ case NL80211_IFTYPE_MONITOR:
+- if (!rdev->monitor_channel)
++ if (!rdev->ops->get_channel)
+ return -EINVAL;
+
+- freq->m = rdev->monitor_channel->center_freq;
++ chan = rdev->ops->get_channel(wdev->wiphy, wdev, &channel_type);
++ if (!chan)
+ return -EINVAL;
-+ ibss.channel_type = channel_type;
-+ } else {
-+ ibss.channel_type = NL80211_CHAN_NO_HT;
-+ }
++ freq->m = chan->center_freq;
+ freq->e = 6;
+ return 0;
+ default:
+--- a/drivers/net/wireless/ath/ath5k/ath5k.h
++++ b/drivers/net/wireless/ath/ath5k/ath5k.h
+@@ -1331,7 +1331,6 @@ struct ath5k_hw {
+ unsigned int nexttbtt; /* next beacon time in TU */
+ struct ath5k_txq *cabq; /* content after beacon */
+
+- int power_level; /* Requested tx power in dBm */
+ bool assoc; /* associate state */
+ bool enable_beacon; /* true if beacons are on */
+
+@@ -1425,6 +1424,7 @@ struct ath5k_hw {
+ /* Value in dB units */
+ s16 txp_cck_ofdm_pwr_delta;
+ bool txp_setup;
++ int txp_requested; /* Requested tx power in dBm */
+ } ah_txpower;
+
+ struct ath5k_nfcal_hist ah_nfcal_hist;
+--- a/drivers/net/wireless/ath/ath5k/base.c
++++ b/drivers/net/wireless/ath/ath5k/base.c
+@@ -325,6 +325,8 @@ ath5k_setup_channels(struct ath5k_hw *ah
+ if (!ath5k_is_standard_channel(ch, band))
+ continue;
+
++ channels[count].max_power = AR5K_TUNE_MAX_TXPOWER/2;
+
-+ ibss.channel = rdev_freq_to_chan(rdev,
-+ nla_get_u32(info->attrs[NL80211_ATTR_WIPHY_FREQ]),
-+ ibss.channel_type);
- if (!ibss.channel ||
-+ ibss.channel->flags & IEEE80211_CHAN_RADAR ||
- ibss.channel->flags & IEEE80211_CHAN_NO_IBSS ||
- ibss.channel->flags & IEEE80211_CHAN_DISABLED)
- return -EINVAL;
+ count++;
+ }
+
+@@ -725,7 +727,7 @@ ath5k_txbuf_setup(struct ath5k_hw *ah, s
+ ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
+ ieee80211_get_hdrlen_from_skb(skb), padsize,
+ get_hw_packet_type(skb),
+- (ah->power_level * 2),
++ (ah->ah_txpower.txp_requested * 2),
+ hw_rate,
+ info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
+ cts_rate, duration);
+@@ -1780,7 +1782,8 @@ ath5k_beacon_setup(struct ath5k_hw *ah,
+ ds->ds_data = bf->skbaddr;
+ ret = ah->ah_setup_tx_desc(ah, ds, skb->len,
+ ieee80211_get_hdrlen_from_skb(skb), padsize,
+- AR5K_PKT_TYPE_BEACON, (ah->power_level * 2),
++ AR5K_PKT_TYPE_BEACON,
++ (ah->ah_txpower.txp_requested * 2),
+ ieee80211_get_tx_rate(ah->hw, info)->hw_value,
+ 1, AR5K_TXKEYIX_INVALID,
+ antenna, flags, 0, 0);
+--- a/drivers/net/wireless/ath/ath5k/phy.c
++++ b/drivers/net/wireless/ath/ath5k/phy.c
+@@ -3518,6 +3518,7 @@ ath5k_setup_rate_powertable(struct ath5k
+ {
+ unsigned int i;
+ u16 *rates;
++ s16 rate_idx_scaled = 0;
+
+ /* max_pwr is power level we got from driver/user in 0.5dB
+ * units, switch to 0.25dB units so we can compare */
+@@ -3564,20 +3565,32 @@ ath5k_setup_rate_powertable(struct ath5k
+ for (i = 8; i <= 15; i++)
+ rates[i] -= ah->ah_txpower.txp_cck_ofdm_gainf_delta;
+
++ /* Save min/max and current tx power for this channel
++ * in 0.25dB units.
++ *
++ * Note: We use rates[0] for current tx power because
++ * it covers most of the rates, in most cases. It's our
++ * tx power limit and what the user expects to see. */
++ ah->ah_txpower.txp_min_pwr = 2 * rates[7];
++ ah->ah_txpower.txp_cur_pwr = 2 * rates[0];
++
++ /* Set max txpower for correct OFDM operation on all rates
++ * -that is the txpower for 54Mbit-, it's used for the PAPD
++ * gain probe and it's in 0.5dB units */
++ ah->ah_txpower.txp_ofdm = rates[7];
++
+ /* Now that we have all rates setup use table offset to
+ * match the power range set by user with the power indices
+ * on PCDAC/PDADC table */
+ for (i = 0; i < 16; i++) {
+- rates[i] += ah->ah_txpower.txp_offset;
++ rate_idx_scaled = rates[i] + ah->ah_txpower.txp_offset;
+ /* Don't get out of bounds */
+- if (rates[i] > 63)
+- rates[i] = 63;
++ if (rate_idx_scaled > 63)
++ rate_idx_scaled = 63;
++ if (rate_idx_scaled < 0)
++ rate_idx_scaled = 0;
++ rates[i] = rate_idx_scaled;
+ }
+-
+- /* Min/max in 0.25dB units */
+- ah->ah_txpower.txp_min_pwr = 2 * rates[7];
+- ah->ah_txpower.txp_cur_pwr = 2 * rates[0];
+- ah->ah_txpower.txp_ofdm = rates[7];
+ }
+
-+ /* Both channels should be able to initiate communication */
-+ if ((ibss.channel_type == NL80211_CHAN_HT40PLUS ||
-+ ibss.channel_type == NL80211_CHAN_HT40MINUS) &&
-+ !cfg80211_can_beacon_sec_chan(&rdev->wiphy, ibss.channel,
-+ ibss.channel_type))
-+ return -EINVAL;
+@@ -3641,10 +3654,17 @@ ath5k_hw_txpower(struct ath5k_hw *ah, st
+ if (!ah->ah_txpower.txp_setup ||
+ (channel->hw_value != curr_channel->hw_value) ||
+ (channel->center_freq != curr_channel->center_freq)) {
+- /* Reset TX power values */
++ /* Reset TX power values but preserve requested
++ * tx power from above */
++ int requested_txpower = ah->ah_txpower.txp_requested;
+
- ibss.channel_fixed = !!info->attrs[NL80211_ATTR_FREQ_FIXED];
- ibss.privacy = !!info->attrs[NL80211_ATTR_PRIVACY];
+ memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower));
++
++ /* Restore TPC setting and requested tx power */
+ ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER;
+
++ ah->ah_txpower.txp_requested = requested_txpower;
++
+ /* Calculate the powertable */
+ ret = ath5k_setup_channel_powertable(ah, channel,
+ ee_mode, type);
+@@ -3791,8 +3811,9 @@ ath5k_hw_phy_init(struct ath5k_hw *ah, s
+ * RF buffer settings on 5211/5212+ so that we
+ * properly set curve indices.
+ */
+- ret = ath5k_hw_txpower(ah, channel, ah->ah_txpower.txp_cur_pwr ?
+- ah->ah_txpower.txp_cur_pwr / 2 : AR5K_TUNE_MAX_TXPOWER);
++ ret = ath5k_hw_txpower(ah, channel, ah->ah_txpower.txp_requested ?
++ ah->ah_txpower.txp_requested * 2 :
++ AR5K_TUNE_MAX_TXPOWER);
+ if (ret)
+ return ret;
projects / openwrt / svn-archive / archive.git / blobdiff