[ar71xx] fix the PCI byte lane enable generation code, based on a patch by Chris...
[openwrt/svn-archive/archive.git] / target / Config.in
index 780ee421fce4081ab11edfbff26a2dd9d8cbc40c..31f7a50b391188119e7ca368c0b3ca86bb2bd976 100644 (file)
@@ -8,19 +8,22 @@ config LINUX_2_4
 config LINUX_2_6
        bool
 
-config PCI_SUPPORT
+config HAS_FPU
        bool
 
-config PCMCIA_SUPPORT
+config DISPLAY_SUPPORT
        bool
 
-config USB_SUPPORT
+config GPIO_SUPPORT
        bool
 
-config ATM_SUPPORT
+config PCI_SUPPORT
        bool
 
-config VIDEO_SUPPORT
+config PCMCIA_SUPPORT
+       bool
+
+config USB_SUPPORT
        bool
 
 config BIG_ENDIAN
@@ -35,6 +38,12 @@ config USES_JFFS2
 config USES_EXT2
        bool
 
+config USES_TGZ
+       bool
+
+config USES_CPIOGZ
+       bool
+
 config PROFILE_KCONFIG 
        bool
 
@@ -42,7 +51,10 @@ config PROFILE_KCONFIG
 
 config i386
        bool
-       
+
+config i686
+       bool 
+
 config mips
        select BIG_ENDIAN
        bool
@@ -57,6 +69,10 @@ config armeb
        select BIG_ENDIAN
        bool
 
+config avr32
+       select BIG_ENDIAN
+       bool
+
 config cris
        bool
 
@@ -92,8 +108,10 @@ config ARCH
        string
        default "arm"     if arm
        default "armeb"   if armeb
+       default "avr32"   if avr32
        default "cris"    if cris
        default "i386"    if i386
+       default "i686"    if i686
        default "m68k"    if m68k
        default "mips"    if mips
        default "mipsel"  if mipsel